Searched +full:mt7988 +full:- +full:xfi +full:- +full:pll (Results 1 – 2 of 2) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/clock/mediatek,mt7988-xfi-pll.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: MediaTek MT7988 XFI PLL Clock Controller10 - Daniel Golle <daniel@makrotopia.org>13 The MediaTek XFI PLL controller provides the 156.25MHz clock for the18 const: mediatek,mt7988-xfi-pll26 '#clock-cells':30 - compatible[all …]
1 // SPDX-License-Identifier: GPL-2.06 #include <linux/clk-provider.h>11 #include "clk-mtk.h"12 #include "clk-gate.h"13 #include <dt-bindings/clock/mediatek,mt7988-clk.h>15 /* Register to control USXGMII XFI PLL analog */52 struct device_node *node = pdev->dev.of_node; in clk_mt7988_xfipll_probe()56 return -ENOMEM; in clk_mt7988_xfipll_probe()58 /* Apply software workaround for USXGMII PLL TCL issue */ in clk_mt7988_xfipll_probe()66 { .compatible = "mediatek,mt7988-xfi-pll", .data = &xfipll_desc },[all …]