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Searched +full:mt7981 +full:- +full:pinctrl (Results 1 – 5 of 5) sorted by relevance

/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7981b.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 #include <dt-bindings/clock/mediatek,mt7981-clk.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/reset/mt7986-resets.h>
9 interrupt-parent = <&gic>;
10 #address-cells = <2>;
11 #size-cells = <2>;
14 #address-cells = <1>;
15 #size-cells = <0>;
18 compatible = "arm,cortex-a53";
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmediatek,mt7981-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7981-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek MT7981 Pin Controller
10 - Daniel Golle <daniel@makrotopia.org>
13 The MediaTek's MT7981 Pin controller is used to control SoC pins.
18 - mediatek,mt7981-pinctrl
24 reg-names:
26 - const: gpio
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/linux/Documentation/devicetree/bindings/serial/
H A Dmediatek,uart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matthias Brugger <matthias.bgg@gmail.com>
13 - $ref: serial.yaml#
23 - const: mediatek,mt6577-uart
24 - items:
25 - enum:
26 - mediatek,mt2701-uart
27 - mediatek,mt2712-uart
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/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-mt7981.c1 // SPDX-License-Identifier: GPL-2.0
3 * The MT7981 driver based on Linux generic pinctrl binding.
9 #include "pinctrl-moore.h"
1039 { .compatible = "mediatek,mt7981-pinctrl", },
1050 .name = "mt7981-pinctrl",
/linux/drivers/net/ethernet/mediatek/
H A Dmtk_eth_soc.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org>
5 * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org>
6 * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com>
22 #include <linux/pinctrl/devinfo.h>
24 #include <linux/pcs/pcs-mtk-lynxi.h>
34 static int mtk_msg_level = -1;
36 MODULE_PARM_DESC(msg_level, "Message level (-1=defaults,0=none,...,16=all)");
294 __raw_writel(val, eth->base + reg); in mtk_w32()
299 return __raw_readl(eth->base + reg); in mtk_r32()
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