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Searched +full:mt7621 +full:- +full:pci +full:- +full:phy (Results 1 – 3 of 3) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dmediatek,mt7621-pci-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/mediate
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/freebsd/sys/contrib/device-tree/src/mips/ralink/
H A Dmt7621.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 #include <dt-bindings/interrupt-controller/mips-gic.h>
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/clock/mt7621-clk.h>
5 #include <dt-bindings/reset/mt7621-reset.h>
8 compatible = "mediatek,mt7621-soc";
10 #address-cells = <1>;
11 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
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/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dmediatek,mt7621-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/mediatek,mt7621-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek MT7621 PCIe controller
10 - Sergio Paracuellos <sergio.paracuellos@gmail.com>
13 MediaTek MT7621 PCIe subsys supports a single Root Complex (RC)
14 with 3 Root Ports. Each Root Port supports a Gen1 1-lane Link
16 MT7621 PCIe HOST Topology
18 .-------.
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