Searched +full:mt7621 +full:- +full:memc (Results 1 – 4 of 4) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/memory-controllers/mediatek,mt7621-memc.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: MT7621 SDRAM controller10 - Sergio Paracuellos <sergio.paracuellos@gmail.com>15 - const: mediatek,mt7621-memc16 - const: syscon22 - compatible23 - reg[all …]
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2 #include <dt-bindings/interrupt-controller/mips-gic.h>3 #include <dt-bindings/gpio/gpio.h>4 #include <dt-bindings/clock/mt7621-clk.h>5 #include <dt-bindings/reset/mt7621-reset.h>8 compatible = "mediatek,mt7621-soc";10 #address-cells = <1>;11 #size-cells = <1>;14 #address-cells = <1>;15 #size-cells = <0>;[all …]
1 // SPDX-License-Identifier: GPL-2.04 #address-cells = <1>;5 #size-cells = <1>;6 compatible = "ralink,mt7628a-soc";9 #address-cells = <1>;10 #size-cells = <0>;19 resetc: reset-controller {20 compatible = "ralink,rt2880-reset";21 #reset-cells = <1>;24 cpuintc: interrupt-controller {[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/clock/mediatek,mt7621-sysc.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: MT7621 Clock10 - Sergio Paracuellos <sergio.paracuellos@gmail.com>13 The MT7621 has a PLL controller from where the cpu clock is provided21 [1]: <include/dt-bindings/clock/mt7621-clk.h>.28 [2]: <include/dt-bindings/reset/mt7621-reset.h>.33 - const: mediatek,mt7621-sysc[all …]