Searched +full:mt2712 +full:- +full:spi +full:- +full:slave (Results 1 – 6 of 6) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/spi/ |
H A D | mediatek,spi-slave-mt27xx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/mediatek,spi-slave-mt27xx.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: SPI Slave controller for MediaTek ARM SoCs 10 - Leilk Liu <leilk.liu@mediatek.com> 13 - $ref: /schemas/spi/spi-controller.yaml# 18 - mediatek,mt2712-spi-slave 19 - mediatek,mt8195-spi-slave 30 clock-names: [all …]
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H A D | spi-slave-mt27xx.txt | 1 Binding for MTK SPI Slave controller 4 - compatible: should be one of the following. 5 - mediatek,mt2712-spi-slave: for mt2712 platforms 6 - mediatek,mt8195-spi-slave: for mt8195 platforms 7 - reg: Address and length of the register set for the device. 8 - interrupts: Should contain spi interrupt. 9 - clocks: phandles to input clocks. 11 - clock-names: should be "spi" for the clock gate. 14 - assigned-clocks: it's mux clock, should be <&topckgen CLK_TOP_SPISLV_SEL>. 15 - assigned-clock-parents: parent of mux clock. [all …]
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H A D | mediatek,spi-mtk-nor.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/mediatek,spi-mtk-nor.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bayi Cheng <bayi.cheng@mediatek.com> 11 - Chuanhong Guo <gch981213@gmail.com> 14 This spi controller support single, dual, or quad mode transfer for 15 SPI NOR flash. There should be only one spi slave device following 16 generic spi bindings. It's not recommended to use this controller 17 for devices other than SPI NOR flash due to limited transfer [all …]
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H A D | spi-mtk-nor.txt | 4 - compatible: For mt8173, compatible should be "mediatek,mt8173-nor", 6 For every other SoC, should contain both the SoC-specific compatible 7 string and "mediatek,mt8173-nor". 9 "mediatek,mt2701-nor", "mediatek,mt8173-nor" 10 "mediatek,mt2712-nor", "mediatek,mt8173-nor" 11 "mediatek,mt7622-nor", "mediatek,mt8173-nor" 12 "mediatek,mt7623-nor", "mediatek,mt8173-nor" 13 "mediatek,mt7629-nor", "mediatek,mt8173-nor" 14 "mediatek,mt8173-nor" 15 - reg: physical base address and length of the controller's register [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
H A D | mt2712e.dtsi | 5 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/clock/mt2712-clk.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/memory/mt2712-larb-port.h> 12 #include <dt-bindings/phy/phy.h> 13 #include <dt-bindings/power/mt2712-power.h> 14 #include "mt2712-pinfunc.h" 17 compatible = "mediatek,mt2712"; 18 interrupt-parent = <&sysirq>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/mediatek/ |
H A D | mt7629.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/mt7629-clk.h> 11 #include <dt-bindings/power/mt7622-power.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/reset/mt7629-resets.h> 18 interrupt-parent = <&sysirq>; 19 #address-cells = <1>; [all …]
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