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/linux/drivers/net/ethernet/brocade/bna/
H A Dbna.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Linux network driver for QLogic BR-series Converged Network Adapter.
6 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
7 * Copyright (c) 2014-2015 QLogic Corporation
26 * input : _addr-> os dma addr in host endian format,
27 * output : _bna_dma_addr-> pointer to hw dma addr
33 (_bna_dma_addr)->msb = ((struct bna_dma_addr *)&tmp_addr)->msb; \
34 (_bna_dma_addr)->lsb = ((struct bna_dma_addr *)&tmp_addr)->lsb; \
38 * input : _bna_dma_addr-> pointer to hw dma addr
39 * output : _addr-> os dma addr in host endian format
[all …]
/linux/Documentation/filesystems/
H A Disofs.rst1 .. SPDX-License-Identifier: GPL-2.0
22 There is also an option of doing UTF-8 translations with the
24 utf8 Encode Unicode names in UTF-8 format. Default is no.
36 map=off Do not map non-Rock Ridge filenames to lower case
37 map=normal Map non-Rock Ridge filenames to lower case
39 mode=xxx Sets the permissions on files to xxx unless Rock Ridge
41 dmode=xxx Sets the permissions on directories to xxx unless Rock Ridge
44 'mode' and 'dmode' even though Rock Ridge extensions are
54 sbsector=xxx Session begins from sector xxx
59 - http://www.y-adagio.com/
[all …]
/linux/Documentation/devicetree/bindings/power/reset/
H A Dreboot-mode.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/reboot-mode.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic reboot mode core map
10 - Andy Yan <andy.yan@rock-chips.com>
13 This driver get reboot mode arguments and call the write
18 All mode properties are vendor specific, it is a indication to tell
20 as mode-xxx = <magic> (xxx is mode name, magic should be a non-zero value).
23 - normal: Normal reboot mode, system reboot with command "reboot".
[all …]
/linux/drivers/media/rc/keymaps/
H A Drc-manli.c1 // SPDX-License-Identifier: GPL-2.0+
2 // manli.h - Keytable for manli Remote Controller
4 // keymap imported from ir-keymaps.c
8 #include <media/rc-map.h>
14 The "ascii-art picture" below (in comments, first row
26 { 0x1c, KEY_RADIO }, /*XXX*/
52 { 0x0a, KEY_AGAIN }, /*XXX KEY_REWIND? */
54 { 0x17, KEY_DIGITS }, /*XXX*/
73 { 0x16, KEY_OK }, /*XXX KEY_SELECT? KEY_ENTER? */
78 * TV/AV MODE *
[all …]
H A Drc-behold.c1 // SPDX-License-Identifier: GPL-2.0+
2 // behold.h - Keytable for behold Remote Controller
4 // keymap imported from ir-keymaps.c
8 #include <media/rc-map.h>
17 * The "ascii-art picture" below (in comments, first row
28 { 0x866b1c, KEY_TUNER }, /* XXX KEY_TV / KEY_RADIO */
51 * RECALL 0 MODE *
74 { 0x866b16, KEY_OK }, /* XXX KEY_ENTER */
95 { 0x866b1f, KEY_RED }, /*XXX KEY_AUDIO */
104 { 0x866b19, KEY_BLUE }, /* XXX KEY_SAT */
/linux/include/linux/clk/
H A Dti.h1 /* SPDX-License-Identifier: GPL-2.0-only */
10 #include <linux/clk-provider.h>
14 * struct clk_omap_reg - OMAP register declaration
29 * struct dpll_data - DPLL registers and integration data
35 * @control_reg: register containing the DPLL mode bitfield
36 * @enable_mask: mask of the DPLL mode bitfield in @control_reg
43 * @max_multiplier: maximum valid non-bypass multiplier value (actual)
45 * @min_divider: minimum valid non-bypass divider value (actual)
46 * @max_divider: maximum valid non-bypass divider value (actual)
49 * @autoidle_reg: register containing the DPLL autoidle mode bitfield
[all …]
/linux/drivers/video/fbdev/
H A Dpvr2fb.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * Copyright (c) 2001 - 2008 Paul Mundt <lethal@linux-sh.org>
13 * here are some hacked-up formulas:
17 * 'pseudo' values (think of them as placeholders) for the fb video mode, so
19 * values, I could just add mode- specific offsets to get the correct mode
22 * left_margin = diwstart_h - borderstart_h;
23 * right_margin = borderstop_h - (diwstart_h + xres);
24 * upper_margin = diwstart_v - borderstart_v;
25 * lower_margin = borderstop_v - (diwstart_h + yres);
27 * hsync_len = borderstart_h + (hsync_total - borderstop_h);
[all …]
/linux/include/linux/platform_data/
H A Dgpmc-omap.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2014 Texas Instruments, Inc. - https://www.ti.com
31 /* Minimum clock period for synchronous mode (in picoseconds) */
34 /* Chip-select signal timings corresponding to GPMC_CS_CONFIG2 */
59 u32 access; /* Start-cycle to first data valid delay */
80 /* XXX: try to combine t_avdp_r & t_avdp_w. Issue is
112 u32 t_ce_rdyz; /* XXX: description ?, or use t_cez instead */
115 /* XXX: check the possibility of combining
134 #define GPMC_DEVWIDTH_8BIT 1 /* 8-bit device width */
135 #define GPMC_DEVWIDTH_16BIT 2 /* 16-bit device width */
[all …]
/linux/drivers/net/wireless/intel/iwlegacy/
H A Dcsr.h8 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
33 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
70 * low power states due to driver-invoked device resets
71 * (e.g. CSR_RESET_REG_FLAG_SW_RESET) or uCode-driven power-saving modes.
86 #define CSR_INT_COALESCING (CSR_BASE+0x004) /* accum ints, 32-usec units */
100 * 31-8: Reserved
101 * 7-4: Type of device: see CSR_HW_REV_TYPE_xxx definitions
102 * 3-2: Revision step: 0 = A, 1 = B, 2 = C, 3 = D
103 * 1-0: "Dash" (-) value, as in A-1, etc.
[all …]
/linux/arch/arm/mach-omap2/
H A Dvc.h1 /* SPDX-License-Identifier: GPL-2.0-only */
22 * struct omap_vc_common - per-VC register/bitfield data
34 * @i2c_cfg_clear_mask: high-speed mode bit clear mask in I2C config register
35 * @i2c_cfg_hsen_mask: high-speed mode bit field mask in I2C config register
38 * XXX One of cmd_on_mask and cmd_on_shift are not needed
39 * XXX VALID should probably be a shift, not a mask
63 * struct omap_vc_channel - VC per-instance data
69 * @i2c_high_speed: whether or not to use I2C high-speed mode
81 * @flags: VC channel-specific flags (optional)
H A Domap4-restart.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap4-restart.c - Common to OMAP4 and OMAP5
12 * omap44xx_restart - trigger a software restart of the SoC
13 * @mode: the "reboot mode", see arch/arm/kernel/{setup,process}.c
19 void omap44xx_restart(enum reboot_mode mode, const char *cmd) in omap44xx_restart() argument
21 /* XXX Should save 'cmd' into scratchpad for use after reboot */ in omap44xx_restart()
H A Dclockdomain.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * Copyright (C) 2008-2011 Nokia Corporation
22 * XXX Document CLKDM_CAN_* flags
33 * hardware-supervised idle mode, the PRCM may transition the
38 * force-sleep mode, then the HW_AUTO mode will be used to put the
40 * the force-wakeup mode, then it will be used whenever a clock or
42 * HW_AUTO mode.
58 * struct clkdm_autodep - clkdm deps to add when entering/exiting hwsup mode
59 * @clkdm: clockdomain to add wkdep+sleepdep on - set name member only
62 * clockdomain should stay active in hwsup mode; and conversely,
[all …]
/linux/arch/xtensa/kernel/
H A Dalign.S10 * Copyright (C) 2001 - 2005 Tensilica, Inc.
21 #include <asm/asm-offsets.h>
41 /* Big and little endian 16-bit values are located in
43 * abstract the notion of extracting a 16-bit value from a
104 * -------------------
109 * -----------------------------
113 * XXX 0011 ssss tttt 0010
114 * XXX 0100 ssss tttt 0010
117 * XXX 0111 ssss tttt 0010
118 * XXX 1000 ssss tttt 0010
[all …]
/linux/drivers/gpu/drm/nouveau/dispnv50/
H A Dheadc37d.c33 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in headc37d_or()
34 const int i = head->base.index; in headc37d_or()
38 /*XXX: This is a dirty hack until OR depth handling is in headc37d_or()
41 switch (asyh->or.depth) { in headc37d_or()
47 depth = asyh->or.depth; in headc37d_or()
56 NVVAL(NVC37D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, CRC_MODE, asyh->or.crc_raster) | in headc37d_or()
57 NVVAL(NVC37D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, HSYNC_POLARITY, asyh->or.nhsync) | in headc37d_or()
58 NVVAL(NVC37D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, VSYNC_POLARITY, asyh->or.nvsync) | in headc37d_or()
67 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in headc37d_procamp()
68 const int i = head->base.index; in headc37d_procamp()
[all …]
/linux/Documentation/scsi/
H A Dst.rst1 .. SPDX-License-Identifier: GPL-2.0
23 flexible method and applicable to single-user workstations. However,
32 drive performs auto-detection of the tape format well (like some
33 QIC-drives). The result is that any tape can be read, writing can be
37 does not perform auto-detection well enough and there is a single
38 "sensible" mode for the device. An example is a DAT drive that is
39 used only in variable block mode (I don't know if this is sensible
40 or not :-).
48 ST_NBR_MODE_BITS in st.h. Mode 0 corresponds to the defaults discussed
50 system manager (root). When specification of a new mode is started,
[all …]
/linux/Documentation/userspace-api/media/v4l/
H A Dmetafmt-d4xx.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
4 .. _v4l2-meta-fmt-d4xx:
16 Intel D4xx (D435, D455 and others) cameras include per-frame metadata in their UVC
38 .. flat-table:: D4xx metadata
40 :header-rows: 1
41 :stub-columns: 0
43 * - **Field**
44 - **Description**
45 * - :cspan:`1` *Depth Control*
46 * - __u32 ID
[all …]
/linux/arch/mips/pci/
H A Dpci-bcm1480.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
8 * BCM1x80/1x55-specific PCI support
15 * To access configuration space, we use ioremap. In the 32-bit
20 * XXX: AT THIS TIME, ONLY the NATIVE PCI-X INTERFACE IS SUPPORTED.
41 #define CFGADDR(bus, devfn, where) CFGOFFSET((bus)->number, (devfn), where)
53 * Read/write 32-bit values in config space.
68 return -1; in pcibios_map_irq()
70 return K_BCM1480_INT_PCI_INTA - 1 + pin; in pcibios_map_irq()
81 * In PCI Device Mode, hide everything on bus 0 except the LDT host
[all …]
/linux/drivers/comedi/drivers/
H A Ddt2814.c1 // SPDX-License-Identifier: GPL-2.0+
6 * COMEDI - Linux Control and Measurement Device Interface
17 * [0] - I/O port base address
18 * [1] - IRQ
56 status = inb(dev->iobase + DT2814_CSR); in dt2814_ai_notbusy()
60 return -EBUSY; in dt2814_ai_notbusy()
80 inb(dev->iobase + DT2814_DATA); in dt2814_ai_clear()
81 inb(dev->iobase + DT2814_DATA); in dt2814_ai_clear()
93 status = inb(dev->iobase + DT2814_CSR); in dt2814_ai_eoc()
96 return -EBUSY; in dt2814_ai_eoc()
[all …]
/linux/drivers/gpu/drm/i915/gt/
H A Dgen8_engine_cs.c1 // SPDX-License-Identifier: MIT
15 int gen8_emit_flush_rcs(struct i915_request *rq, u32 mode) in gen8_emit_flush_rcs()
23 if (mode & EMIT_FLUSH) { in gen8_emit_flush_rcs()
30 if (mode & EMIT_INVALIDATE) { in gen8_emit_flush_rcs()
44 if (GRAPHICS_VER(rq->i915) == 9) in gen8_emit_flush_rcs()
48 if (IS_KABYLAKE(rq->i915) && IS_GRAPHICS_STEP(rq->i915, 0, STEP_C0)) in gen8_emit_flush_rcs()
81 int gen8_emit_flush_xcs(struct i915_request *rq, u32 mode) in gen8_emit_flush_xcs()
99 if (mode in gen8_emit_flush_xcs()
13 gen8_emit_flush_rcs(struct i915_request * rq,u32 mode) gen8_emit_flush_rcs() argument
79 gen8_emit_flush_xcs(struct i915_request * rq,u32 mode) gen8_emit_flush_xcs() argument
112 gen11_emit_flush_rcs(struct i915_request * rq,u32 mode) gen11_emit_flush_rcs() argument
244 gen12_emit_flush_rcs(struct i915_request * rq,u32 mode) gen12_emit_flush_rcs() argument
362 gen12_emit_flush_xcs(struct i915_request * rq,u32 mode) gen12_emit_flush_xcs() argument
[all...]
/linux/arch/powerpc/kvm/
H A Dbook3s_hv_tm_builtin.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <asm/ppc-opcode.h>
15 * This handles the cases where the guest is in real suspend mode
17 * The caller has checked that the guest is in real-suspend mode
18 * (MSR[TS] = S and the fake-suspend flag is not set).
22 u32 instr = vcpu->arch.emul_inst; in kvmhv_p9_tm_emulation_early()
32 * to handle TM-related invalid forms that have bit 31 = 0. Moreover, in kvmhv_p9_tm_emulation_early()
39 /* XXX do we need to check for PR=0 here? */ in kvmhv_p9_tm_emulation_early()
40 newmsr = vcpu->arch.shregs.srr1; in kvmhv_p9_tm_emulation_early()
41 /* should only get here for Sx -> T1 transition */ in kvmhv_p9_tm_emulation_early()
[all …]
/linux/drivers/gpu/drm/gma500/
H A Dpsb_intel_display.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2006-2011 Intel Corporation
49 /* The single-channel range is 25-112Mhz, and dual-channel
50 * is 80-224Mhz. Prefer single channel as much as possible.
71 clock-> in psb_intel_clock()
94 psb_intel_crtc_mode_set(struct drm_crtc * crtc,struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode,int x,int y,struct drm_framebuffer * old_fb) psb_intel_crtc_mode_set() argument
384 struct drm_display_mode *mode; psb_intel_crtc_mode_get() local
[all...]
/linux/drivers/gpib/tnt4882/
H A Dtnt4882_gpib.c1 // SPDX-License-Identifier: GPL-2.0
4 * National Instruments boards using tnt4882 or compatible chips (at-gpib, etc).
38 // Measurement Computing PCI-488 same design as PCI-GPIB with TNT5004
65 iowrite8(AUX_PAGEIN, priv->nec7210_priv.mmiobase + AUXMR * priv->nec7210_priv.offset); in tnt_paged_readb()
67 return ioread8(priv->nec7210_priv.mmiobase + offset); in tnt_paged_readb()
73 iowrite8(AUX_PAGEIN, priv->nec7210_priv.mmiobase + AUXMR * priv->nec7210_priv.offset); in tnt_paged_writeb()
75 iowrite8(value, priv->nec7210_priv.mmiobase + offset); in tnt_paged_writeb()
81 void __iomem *address = priv->nec7210_priv.mmiobase + offset; in tnt_readb()
84 spinlock_t *register_lock = &priv->nec7210_priv.register_page_lock; in tnt_readb()
92 switch (priv->nec7210_priv.type) { in tnt_readb()
[all …]
/linux/drivers/net/wireless/intel/iwlwifi/
H A Diwl-csr.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2005-2014, 2018-2025 Intel Corporation
4 * Copyright (C) 2013-2014 Intel Mobile Communications GmbH
14 * low power states due to driver-invoked device resets
15 * (e.g. CSR_RESET_REG_FLAG_SW_RESET) or uCode-driven power-saving modes.
30 #define CSR_INT_COALESCING (CSR_BASE+0x004) /* accum ints, 32-usec units */
37 #define CSR_FUNC_SCRATCH (CSR_BASE+0x02c) /* Scratch register - used for FW dbg */
45 * 31-16: Reserved
46 * 15-4: Type of device: see CSR_HW_REV_TYPE_xxx definitions
47 * 3-2: Revision step: 0 = A, 1 = B, 2 = C, 3 = D
[all …]
/linux/Documentation/networking/device_drivers/can/
H A Dcan327.rst1 .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
7 --------
14 -----------
26 -------------
33 order to fake full-duplex operation.
36 enough to implement simple request-response protocols (such as OBD II),
50 -----------
59 ----------------------------------
68 --debug \
69 --speed 38400 \
[all …]
/linux/arch/sparc/kernel/
H A Dldc.c1 // SPDX-License-Identifier: GPL-2.0
2 /* ldc.c: Logical Domain Channel link-layer protocol driver.
19 #include <asm/iommu-common.h>
39 /* Packet header layout for unreliable and reliable mode frames.
40 * When in RAW mode, packets are simply straight 64-byte payloads
70 u8 u_data[LDC_PACKET_SIZE - 8];
74 u8 r_data[LDC_PACKET_SIZE - 8 - 8];
177 do { if (lp->cfg.debug & LDC_DEBUG_##TYPE) \
178 printk(KERN_INFO PFX "ID[%lu] " f, lp->id, ## a); \
212 return __advance(off, lp->rx_num_entries); in rx_advance()
[all …]

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