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/freebsd/sys/contrib/dev/mediatek/mt76/
H A Dmmio.c15 val = readl(dev->mmio.regs + offset); in mt76_mmio_rr()
17 val = readl((u8 *)dev->mmio.regs + offset); in mt76_mmio_rr()
28 writel(val, dev->mmio.regs + offset); in mt76_mmio_wr()
30 writel(val, (u8 *)dev->mmio.regs + offset); in mt76_mmio_wr()
45 __iowrite32_copy(dev->mmio.regs + offset, data, DIV_ROUND_UP(len, 4)); in mt76_mmio_write_copy()
47 __iowrite32_copy((u8 *)dev->mmio.regs + offset, data, DIV_ROUND_UP(len, 4)); in mt76_mmio_write_copy()
55 __ioread32_copy(data, dev->mmio.regs + offset, DIV_ROUND_UP(len, 4)); in mt76_mmio_read_copy()
57 __ioread32_copy(data, (u8 *)dev->mmio.regs + offset, DIV_ROUND_UP(len, 4)); in mt76_mmio_read_copy()
90 spin_lock_irqsave(&dev->mmio.irq_lock, flags); in mt76_set_irq_mask()
91 dev->mmio.irqmask &= ~clear; in mt76_set_irq_mask()
[all …]
H A Dwed.c11 struct mt76_dev *dev = container_of(wed, struct mt76_dev, mmio.wed); in mt76_wed_release_rx_buf()
34 struct mt76_dev *dev = container_of(wed, struct mt76_dev, mmio.wed); in mt76_wed_init_rx_buf()
83 struct mt76_dev *dev = container_of(wed, struct mt76_dev, mmio.wed); in mt76_wed_offload_enable()
167 struct mt76_dev *dev = container_of(wed, struct mt76_dev, mmio.wed); in mt76_wed_offload_disable()
177 struct mt76_dev *dev = container_of(wed, struct mt76_dev, mmio.wed); in mt76_wed_reset_complete()
179 complete(&dev->mmio.wed_reset_complete); in mt76_wed_reset_complete()
188 struct mtk_wed_device *wed = &phy->dev->mmio.wed; in mt76_wed_net_setup_tc()
199 struct mt76_mmio *mmio = &dev->mmio; in mt76_wed_dma_reset() local
204 complete(&mmio->wed_reset); in mt76_wed_dma_reset()
206 if (!wait_for_completion_timeout(&mmio->wed_reset_complete, 3 * HZ)) in mt76_wed_dma_reset()
/freebsd/sys/contrib/device-tree/Bindings/misc/
H A Dpvpanic-mmio.txt1 * QEMU PVPANIC MMIO Configuration bindings
4 MMIO Configuration interface on the "virt" machine.
13 - compatible: "qemu,pvpanic-mmio".
14 - reg: the MMIO region used by the device.
24 pvpanic-mmio@9060000 {
25 compatible = "qemu,pvpanic-mmio";
/freebsd/sys/contrib/dev/mediatek/mt76/mt7996/
H A Dmmio.c374 memcpy_fromio(buf, dev->mt76.mmio.regs + addr, len); in mt7996_memcpy_fromio()
376 memcpy_fromio(buf, (u8 *)dev->mt76.mmio.regs + addr, len); in mt7996_memcpy_fromio()
383 memcpy_fromio(buf, dev->mt76.mmio.regs + in mt7996_memcpy_fromio()
385 memcpy_fromio(buf, (u8 *)dev->mt76.mmio.regs + in mt7996_memcpy_fromio()
439 struct mt76_dev *mdev = container_of(wed, struct mt76_dev, mmio.wed); in mt7996_mmio_wed_reset()
455 if (!wait_for_completion_timeout(&mdev->mmio.wed_reset, 20 * HZ)) { in mt7996_mmio_wed_reset()
471 struct mtk_wed_device *wed = &dev->mt76.mmio.wed; in mt7996_mmio_wed_init()
483 wed = &dev->mt76.mmio.wed_hif2; in mt7996_mmio_wed_init()
660 spin_lock_irqsave(&mdev->mmio.irq_lock, flags); in mt7996_dual_hif_set_irq_mask()
662 mdev->mmio.irqmask &= ~clear; in mt7996_dual_hif_set_irq_mask()
[all …]
H A Ddma.c257 struct mtk_wed_device *wed = &dev->mt76.mmio.wed; in mt7996_dma_start()
402 if (mtk_wed_device_active(&dev->mt76.mmio.wed) && in mt7996_dma_enable()
423 mdev->q_rx[MT_RXQ_RRO_IND].wed = &mdev->mmio.wed; in mt7996_dma_rro_init()
434 mdev->q_rx[MT_RXQ_MSDU_PAGE_BAND0].wed = &mdev->mmio.wed; in mt7996_dma_rro_init()
447 mdev->q_rx[MT_RXQ_MSDU_PAGE_BAND1].wed = &mdev->mmio.wed; in mt7996_dma_rro_init()
461 mdev->q_rx[MT_RXQ_MSDU_PAGE_BAND2].wed = &mdev->mmio.wed; in mt7996_dma_rro_init()
471 irq_mask = mdev->mmio.irqmask | MT_INT_RRO_RX_DONE | in mt7996_dma_rro_init()
474 mtk_wed_device_start_hw_rro(&mdev->mmio.wed, irq_mask, false); in mt7996_dma_rro_init()
483 struct mtk_wed_device *wed = &dev->mt76.mmio.wed; in mt7996_dma_init()
484 struct mtk_wed_device *wed_hif2 = &dev->mt76.mmio.wed_hif2; in mt7996_dma_init()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/security/tpm/
H A Dtpm_tis_mmio.txt1 Trusted Computing Group MMIO Trusted Platform Module
4 is the standard protocol defined to access the TPM via MMIO. Typically
13 "tcg,tpm-tis-mmio". Valid chip strings are:
15 - reg: The location of the MMIO registers, should be at least 0x5000 bytes
21 compatible = "atmel,at97sc3204", "tcg,tpm-tis-mmio";
/freebsd/sys/contrib/device-tree/Bindings/sram/
H A Dsram.yaml30 - mmio-sram
158 compatible = "mmio-sram";
185 // Therefore reserved section sub-nodes have to be added to the mmio-sram
189 compatible = "mmio-sram";
211 // Therefore a reserved section sub-node has to be added to the mmio-sram
214 compatible = "mmio-sram";
228 compatible = "mmio-sram";
242 compatible = "mmio-sram";
260 compatible = "rockchip,rk3288-pmu-sram", "mmio-sram";
274 compatible = "mmio-sram";
[all …]
/freebsd/sys/contrib/dev/mediatek/mt76/mt7915/
H A Ddma.c14 if (mtk_wed_device_active(&dev->mt76.mmio.wed)) { in mt7915_init_tx_queues()
21 wed = &dev->mt76.mmio.wed; in mt7915_init_tx_queues()
87 if (is_mt7916(&dev->mt76) && mtk_wed_device_active(&dev->mt76.mmio.wed)) { in mt7915_dma_config()
309 if (mtk_wed_device_active(&dev->mt76.mmio.wed) && wed_reset) { in mt7915_dma_start()
323 mtk_wed_device_start(&dev->mt76.mmio.wed, wed_irq_mask); in mt7915_dma_start()
424 if (mtk_wed_device_active(&mdev->mmio.wed)) { in mt7915_dma_init()
494 if (mtk_wed_device_active(&mdev->mmio.wed) && is_mt7915(mdev)) { in mt7915_dma_init()
498 mdev->q_rx[MT_RXQ_MCU_WA].wed = &mdev->mmio.wed; in mt7915_dma_init()
511 if (mtk_wed_device_active(&mdev->mmio.wed) && in mt7915_dma_init()
512 mtk_wed_get_rx_capa(&mdev->mmio.wed)) { in mt7915_dma_init()
[all …]
H A Dmmio.c526 memcpy_fromio(buf, dev->mt76.mmio.regs + addr, len); in mt7915_memcpy_fromio()
528 memcpy_fromio(buf, (u8 *)dev->mt76.mmio.regs + addr, len); in mt7915_memcpy_fromio()
535 memcpy_fromio(buf, dev->mt76.mmio.regs + in mt7915_memcpy_fromio()
537 memcpy_fromio(buf, (u8 *)dev->mt76.mmio.regs + in mt7915_memcpy_fromio()
596 dev = container_of(wed, struct mt7915_dev, mt76.mmio.wed); in mt7915_mmio_wed_update_rx_stats()
613 struct mt76_dev *mdev = container_of(wed, struct mt76_dev, mmio.wed); in mt7915_mmio_wed_reset()
629 if (!wait_for_completion_timeout(&mdev->mmio.wed_reset, 20 * HZ)) { in mt7915_mmio_wed_reset()
645 struct mtk_wed_device *wed = &dev->mt76.mmio.wed; in mt7915_mmio_wed_init()
808 spin_lock_irqsave(&mdev->mmio.irq_lock, flags); in mt7915_dual_hif_set_irq_mask()
810 mdev->mmio.irqmask &= ~clear; in mt7915_dual_hif_set_irq_mask()
[all …]
/freebsd/sys/compat/linuxkpi/common/src/
H A Dlinux_pci.c616 TAILQ_INIT(&pdev->mmio);
831 struct pci_mmio_region *mmio, *p; in linuxkpi_pci_iomap_range()
848 TAILQ_FOREACH_SAFE(mmio, &pdev->mmio, next, p) { in linuxkpi_pci_iomap()
849 if (mmio->type == type && mmio->rid == PCIR_BAR(bar)) { in linuxkpi_pci_iomap()
850 return (mmio->res);
854 mmio = malloc(sizeof(*mmio), M_DEVBUF, M_WAITOK | M_ZERO); in linuxkpi_pcim_iomap()
855 mmio in linuxkpi_pcim_iomap()
783 struct pci_mmio_region *mmio, *p; _lkpi_pci_iomap() local
883 struct pci_mmio_region *mmio, *p; linuxkpi_pci_iounmap() local
1171 struct pci_mmio_region *mmio; lkpi_pci_request_region() local
1271 struct pci_mmio_region *mmio, *p; linuxkpi_pci_release_region() local
[all...]
/freebsd/contrib/ofed/include/
H A Dudma_barrier.h48 cached/uncached/non-temporal CPU DRAM, uncached MMIO space in another
66 This should be placed before any MMIO store that could trigger the device
117 from the device - eg by reading a MMIO register or seeing that CPU memory is
174 /* Promptly flush writes to MMIO Write Cominbing memory.
181 If done while holding a lock then the ordering of MMIO writes across CPUs
223 /* Prevent WC writes from being re-ordered relative to other MMIO
240 /* Keep MMIO writes in order.
241 Currently we lack writel macros that universally guarantee MMIO
243 providers haphazardly open code writes to MMIO memory omitting even
247 is a stand in to indicate places where MMIO writes should be switched
/freebsd/sys/contrib/device-tree/src/arc/
H A Dhaps_hs.dts70 compatible = "virtio,mmio";
76 compatible = "virtio,mmio";
82 compatible = "virtio,mmio";
88 compatible = "virtio,mmio";
94 compatible = "virtio,mmio";
/freebsd/sys/contrib/alpine-hal/
H A Dal_hal_plat_services.h156 * Read MMIO 8 bits register
164 * Read MMIO 16 bits register
172 * Read MMIO 32 bits register
180 * Read MMIO 64 bits register
188 * Relaxed read MMIO 32 bits register
203 * Relaxed read MMIO 32 bits register
218 * Relaxed write to MMIO 32 bits register
232 * Write to MMIO 8 bits register
243 * Write to MMIO 16 bits register
254 * Write to MMIO 32 bits register
[all …]
/freebsd/sys/contrib/device-tree/Bindings/virtio/
H A Dmmio.txt7 - compatible: "virtio,mmio" compatibility string
23 does not access memory through an IOMMU, the "virtio,mmio"
30 compatible = "virtio,mmio";
39 compatible = "virtio,mmio";
H A Dmmio.yaml4 $id: http://devicetree.org/schemas/virtio/mmio.yaml#
18 const: virtio,mmio
51 compatible = "virtio,mmio";
60 compatible = "virtio,mmio";
H A Dvirtio-device.yaml14 are bound to, like mmio or pci.
16 # We need a select here so we don't match all nodes with 'virtio,mmio'
33 compatible = "virtio,mmio";
/freebsd/sys/contrib/device-tree/Bindings/mtd/
H A Dti,am654-hbmc.txt8 MMIO access to attached flash devices
9 - ranges : Address translation from offset within CS to allocated MMIO
17 for mmio-mux binding details
29 compatible = "mmio-mux";
/freebsd/lib/libpmc/pmu-events/arch/x86/cascadelakex/
H A Duncore-other.json30 "BriefDescription": "MMIO reads. Derived from unc_cha_tor_inserts.ia_miss",
40 "BriefDescription": "MMIO reads",
50 "BriefDescription": "MMIO writes. Derived from unc_cha_tor_inserts.ia_miss",
60 "BriefDescription": "MMIO writes",
776 …y a unit on the main die (generally a core) or by another IIO unit to the MMIO space of a card on …
788 …y a unit on the main die (generally a core) or by another IIO unit to the MMIO space of a card on …
800 …y a unit on the main die (generally a core) or by another IIO unit to the MMIO space of a card on …
812 …y a unit on the main die (generally a core) or by another IIO unit to the MMIO space of a card on …
824 …"PublicDescription": "Counts every write request of 4 bytes of data made to the MMIO space of a ca…
836 …"PublicDescription": "Counts every write request of 4 bytes of data made to the MMIO space of a ca…
[all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/tremontx/
H A Duncore-other.json35 "BriefDescription": "MMIO reads. Derived from unc_cha_tor_inserts.ia_miss",
47 "BriefDescription": "MMIO reads",
59 "BriefDescription": "MMIO writes. Derived from unc_cha_tor_inserts.ia_miss",
71 "BriefDescription": "MMIO writes",
1375 "BriefDescription": "Data requested by the CPU : Core writing to Card's MMIO space",
1383 …"PublicDescription": "Data requested by the CPU : Core writing to Card's MMIO space : Number of DW…
1388 "BriefDescription": "Data requested by the CPU : Core writing to Card's MMIO space",
1396 …"PublicDescription": "Data requested by the CPU : Core writing to Card's MMIO space : Number of DW…
1401 "BriefDescription": "Data requested by the CPU : Core writing to Card's MMIO space",
1409 …"PublicDescription": "Data requested by the CPU : Core writing to Card's MMIO space : Number of DW…
[all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/skylakex/
H A Duncore-other.json30 "BriefDescription": "MMIO reads. Derived from unc_cha_tor_inserts.ia_miss",
40 "BriefDescription": "MMIO reads",
50 "BriefDescription": "MMIO writes. Derived from unc_cha_tor_inserts.ia_miss",
60 "BriefDescription": "MMIO writes",
755 …y a unit on the main die (generally a core) or by another IIO unit to the MMIO space of a card on …
767 …y a unit on the main die (generally a core) or by another IIO unit to the MMIO space of a card on …
779 …y a unit on the main die (generally a core) or by another IIO unit to the MMIO space of a card on …
791 …y a unit on the main die (generally a core) or by another IIO unit to the MMIO space of a card on …
803 …"PublicDescription": "Counts every write request of 4 bytes of data made to the MMIO space of a ca…
815 …"PublicDescription": "Counts every write request of 4 bytes of data made to the MMIO space of a ca…
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/arm/
H A Drtsm_ve-motherboard-rs2.dtsi14 compatible = "virtio,mmio";
20 compatible = "virtio,mmio";
26 compatible = "virtio,mmio";
/freebsd/sys/dev/virtio/mmio/
H A Dvirtio_mmio_fdt.c36 * VirtIO MMIO interface.
43 * compatible = "virtio,mmio";
63 #include <dev/virtio/mmio/virtio_mmio.h>
89 if (!ofw_bus_is_compatible(dev, "virtio,mmio")) in vtmmio_fdt_probe()
/freebsd/sys/contrib/device-tree/src/arm/nxp/lpc/
H A Dlpc4350.dtsi25 compatible = "mmio-sram";
30 compatible = "mmio-sram";
35 compatible = "mmio-sram";
H A Dlpc4357.dtsi25 compatible = "mmio-sram";
30 compatible = "mmio-sram";
35 compatible = "mmio-sram";
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dfixed-mmio-clock.yaml4 $id: http://devicetree.org/schemas/clock/fixed-mmio-clock.yaml#
21 const: fixed-mmio-clock
42 compatible = "fixed-mmio-clock";

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