| /freebsd/lib/libpmc/pmu-events/arch/x86/goldmont/ |
| H A D | cache.json | 22 "BriefDescription": "Cycles code-fetch stalled due to an outstanding ICache miss.",
27 …anding ICache miss. That is, the decoder queue is able to accept bytes, but the fetch unit is unab…
45 "EventName": "LONGEST_LAT_CACHE.MISS",
46 …"PublicDescription": "Counts memory requests originating from the core that miss in the L2 cache.",
68 …e speculative loads are ignored. A memory load can hit (or miss) the L1 cache, hit (or miss) the …
104 "PublicDescription": "Counts load uops retired that miss the L1 data cache.",
128 "PublicDescription": "Counts load uops retired that miss in the L2 cache.",
251 "BriefDescription": "Counts data reads (demand & prefetch) that miss the L2 cache.",
259 …"PublicDescription": "Counts data reads (demand & prefetch) that miss the L2 cache. Requires MSR_O…
264 …"BriefDescription": "Counts data reads (demand & prefetch) that miss the L2 cache with a snoop hit…
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/arm64/arm/cortex-a65/ |
| H A D | ifu.json | 3 "PublicDescription": "I-Cache miss on an access from the prefetch block",
6 "BriefDescription": "I-Cache miss on an access from the prefetch block"
9 …ription": "Counts the cycles spent on a request for Level 2 TLB lookup after a Level 1l ITLB miss",
12 …cription": "Counts the cycles spent on a request for Level 2 TLB lookup after a Level 1l ITLB miss"
51 "PublicDescription": "Micro-predictor miss",
54 "BriefDescription": "Micro-predictor miss"
57 "PublicDescription": "Thread flushed due to TLB miss",
60 "BriefDescription": "Thread flushed due to TLB miss"
63 "PublicDescription": "Thread flushed due to reasons other than TLB miss",
66 "BriefDescription": "Thread flushed due to reasons other than TLB miss"
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/goldmontplus/ |
| H A D | cache.json | 26 "BriefDescription": "Cycles code-fetch stalled due to an outstanding ICache miss.",
33 …anding ICache miss. That is, the decoder queue is able to accept bytes, but the fetch unit is unab…
53 "EventName": "LONGEST_LAT_CACHE.MISS",
56 …"PublicDescription": "Counts memory requests originating from the core that miss in the L2 cache.",
81 …e speculative loads are ignored. A memory load can hit (or miss) the L1 cache, hit (or miss) the …
120 "PublicDescription": "Counts load uops retired that miss the L1 data cache.",
146 "PublicDescription": "Counts load uops retired that miss in the L2 cache.",
296 …"BriefDescription": "Counts data reads (demand & prefetch) miss the L2 cache with a snoop hit in t…
306 …"PublicDescription": "Counts data reads (demand & prefetch) miss the L2 cache with a snoop hit in …
311 …escription": "Counts data reads (demand & prefetch) true miss for the L2 cache with a snoop miss i…
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/silvermont/ |
| H A D | cache.json | 11 "BriefDescription": "Cycles code-fetch stalled due to an outstanding ICache miss.",
15 …miss. That is, the decoder queue is able to accept bytes, but the fetch unit is unable to provide …
31 "EventName": "LONGEST_LAT_CACHE.MISS",
78 …"PublicDescription": "This event counts the number of load ops retired that miss in L1 Data cache.…
98 … "PublicDescription": "This event counts the number of load ops retired that miss in the L2.",
107 "PublicDescription": "This event counts the number of load ops retired that had UTLB miss.",
132 "BriefDescription": "Counts any code reads (demand & prefetch) that miss L2.",
154 …"BriefDescription": "Counts any code reads (demand & prefetch) that miss L2 and the snoops to sibl…
165 …efDescription": "Counts any code reads (demand & prefetch) that miss L2 with a snoop miss response…
187 "BriefDescription": "Counts any data read (demand & prefetch) that miss L2.",
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/haswellx/ |
| H A D | memory.json | 228 "BriefDescription": "Counts all demand & prefetch code reads miss in the L3",
236 "PublicDescription": "Counts all demand & prefetch code reads miss in the L3",
241 …"BriefDescription": "Counts all demand & prefetch code reads miss the L3 and the data is returned …
249 …"PublicDescription": "Counts all demand & prefetch code reads miss the L3 and the data is returned…
254 "BriefDescription": "Counts all demand & prefetch data reads miss in the L3",
262 "PublicDescription": "Counts all demand & prefetch data reads miss in the L3",
267 …"BriefDescription": "Counts all demand & prefetch data reads miss the L3 and the data is returned …
275 …"PublicDescription": "Counts all demand & prefetch data reads miss the L3 and the data is returned…
280 …"BriefDescription": "Counts all demand & prefetch data reads miss the L3 and the data is returned …
288 …"PublicDescription": "Counts all demand & prefetch data reads miss the L3 and the data is returned…
[all …]
|
| H A D | virtual-memory.json | 23 …"BriefDescription": "Load operations that miss the first DTLB level but hit the second and do not …
33 "BriefDescription": "Load misses that miss the DTLB and hit the STLB (2M)",
38 …"PublicDescription": "This event counts load operations from a 2M page that miss the first DTLB le…
43 "BriefDescription": "Load misses that miss the DTLB and hit the STLB (4K)",
48 …"PublicDescription": "This event counts load operations from a 4K page that miss the first DTLB le…
53 …"BriefDescription": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a pa…
63 "BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (1G)",
72 …"BriefDescription": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a pa…
82 …"BriefDescription": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a pa…
97 …"PublicDescription": "This event counts cycles when the page miss handler (PMH) is servicing page…
[all …]
|
| /freebsd/share/man/man9/ |
| H A D | ieee80211_bmiss.9 | 31 .Nd 802.11 beacon miss support
41 handling beacon miss events in station mode.
42 Drivers can dispatch beacon miss events that are recognized in hardware or
44 can detect beacon miss if the driver dispatches received beacon frames
46 Software beacon miss support is especially useful when multiple vaps
47 are operating and any hardware beacon miss support is not available
51 Drivers should dispatch beacon miss events recognized in the driver with
67 The number of beacon miss events (without a ProbeResponse) is user
72 Software beacon miss detection is enabled per-vap by setting the
80 beacon miss.
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/haswell/ |
| H A D | memory.json | 228 "BriefDescription": "Counts all demand & prefetch code reads miss in the L3",
236 "PublicDescription": "Counts all demand & prefetch code reads miss in the L3",
241 …"BriefDescription": "Counts all demand & prefetch code reads miss the L3 and the data is returned …
249 …"PublicDescription": "Counts all demand & prefetch code reads miss the L3 and the data is returned…
254 "BriefDescription": "Counts all demand & prefetch data reads miss in the L3",
262 "PublicDescription": "Counts all demand & prefetch data reads miss in the L3",
267 …"BriefDescription": "Counts all demand & prefetch data reads miss the L3 and the data is returned …
275 …"PublicDescription": "Counts all demand & prefetch data reads miss the L3 and the data is returned…
280 "BriefDescription": "miss in the L3",
288 "PublicDescription": "miss in the L3",
[all …]
|
| H A D | virtual-memory.json | 23 …"BriefDescription": "Load operations that miss the first DTLB level but hit the second and do not …
33 "BriefDescription": "Load misses that miss the DTLB and hit the STLB (2M)",
38 …"PublicDescription": "This event counts load operations from a 2M page that miss the first DTLB le…
43 "BriefDescription": "Load misses that miss the DTLB and hit the STLB (4K)",
48 …"PublicDescription": "This event counts load operations from a 4K page that miss the first DTLB le…
53 …"BriefDescription": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a pa…
63 "BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (1G)",
72 …"BriefDescription": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a pa…
82 …"BriefDescription": "Demand load Miss in all translation lookaside buffer (TLB) levels causes a pa…
97 …"PublicDescription": "This event counts cycles when the page miss handler (PMH) is servicing page…
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/skylakex/ |
| H A D | memory.json | 3 "BriefDescription": "Cycles while L3 cache miss demand load is outstanding.",
13 "BriefDescription": "Execution stalls while L3 cache miss demand load is outstanding.",
231 "BriefDescription": "Demand Data Read requests who miss L3 cache",
236 "PublicDescription": "Demand Data Read requests who miss L3 cache.",
241 …"BriefDescription": "Cycles with at least 1 Demand Data Read requests who miss L3 cache in the sup…
251 …on": "Counts number of Offcore outstanding Demand Data Read requests that miss L3 cache in the sup…
260 …"BriefDescription": "Cycles with at least 6 Demand Data Read requests that miss L3 cache in the su…
270 "BriefDescription": "Counts all demand & prefetch data reads that miss in the L3.",
282 …"BriefDescription": "Counts all demand & prefetch data reads that miss the L3 and the modified dat…
294 …"BriefDescription": "Counts all demand & prefetch data reads that miss the L3 and clean or shared …
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/westmereep-dp/ |
| H A D | virtual-memory.json | 11 "BriefDescription": "DTLB load miss large page walks",
19 "BriefDescription": "DTLB load miss caused by low part of address",
35 "BriefDescription": "DTLB load miss page walks complete",
43 "BriefDescription": "DTLB load miss page walk cycles",
59 "BriefDescription": "DTLB miss large page walks",
83 "BriefDescription": "DTLB miss page walks",
91 "BriefDescription": "DTLB miss page walk cycles",
115 "BriefDescription": "ITLB miss",
123 "BriefDescription": "ITLB miss large page walks",
131 "BriefDescription": "ITLB miss page walks",
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/westmereex/ |
| H A D | virtual-memory.json | 11 "BriefDescription": "DTLB load miss large page walks",
19 "BriefDescription": "DTLB load miss caused by low part of address",
35 "BriefDescription": "DTLB load miss page walks complete",
43 "BriefDescription": "DTLB load miss page walk cycles",
59 "BriefDescription": "DTLB miss large page walks",
83 "BriefDescription": "DTLB miss page walks",
91 "BriefDescription": "DTLB miss page walk cycles",
115 "BriefDescription": "ITLB miss",
123 "BriefDescription": "ITLB miss large page walks",
131 "BriefDescription": "ITLB miss page walks",
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/arm64/arm/cortex-a55/ |
| H A D | pipeline.json | 9 …ed due to the frontend, cache miss.This event counts every cycle the DPU IQ is empty and there is …
12 …ed due to the frontend, cache miss.This event counts every cycle the DPU IQ is empty and there is …
15 …ued due to the frontend, TLB miss.This event counts every cycle the DPU IQ is empty and there is a…
18 …ued due to the frontend, TLB miss.This event counts every cycle the DPU IQ is empty and there is a…
57 …"PublicDescription": "No operation issued due to the backend, load, cache miss.This event counts e…
60 …"BriefDescription": "No operation issued due to the backend, load, cache miss.This event counts ev…
63 …"PublicDescription": "No operation issued due to the backend, load, TLB miss.This event counts eve…
66 …"BriefDescription": "No operation issued due to the backend, load, TLB miss.This event counts ever…
75 …"PublicDescription": "No operation issued due to the backend, store, TLB miss.This event counts ev…
78 …"BriefDescription": "No operation issued due to the backend, store, TLB miss.This event counts eve…
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/broadwellx/ |
| H A D | memory.json | 242 "BriefDescription": "Counts all demand & prefetch code reads miss in the L3",
250 "PublicDescription": "Counts all demand & prefetch code reads miss in the L3",
255 …"BriefDescription": "Counts all demand & prefetch code reads miss the L3 and the data is returned …
263 …"PublicDescription": "Counts all demand & prefetch code reads miss the L3 and the data is returned…
268 "BriefDescription": "Counts all demand & prefetch data reads miss in the L3",
276 "PublicDescription": "Counts all demand & prefetch data reads miss in the L3",
281 …"BriefDescription": "Counts all demand & prefetch data reads miss the L3 and the data is returned …
289 …"PublicDescription": "Counts all demand & prefetch data reads miss the L3 and the data is returned…
294 …"BriefDescription": "Counts all demand & prefetch data reads miss the L3 and the data is returned …
302 …"PublicDescription": "Counts all demand & prefetch data reads miss the L3 and the data is returned…
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/ivytown/ |
| H A D | memory.json | 156 "BriefDescription": "Counts all demand & prefetch code reads that miss the LLC",
168 …"BriefDescription": "Counts all demand & prefetch code reads that miss the LLC and the data retur…
180 …"BriefDescription": "Counts all demand & prefetch code reads that miss the LLC and the data forwa…
216 …"BriefDescription": "Counts all data/code/rfo reads (demand & prefetch) that miss the LLC and the…
228 …"BriefDescription": "Counts all data/code/rfo reads (demand & prefetch) that miss the LLC the dat…
240 …"BriefDescription": "Counts all data/code/rfo reads (demand & prefetch) that miss the LLC and the…
252 "BriefDescription": "Counts all demand code reads that miss the LLC",
264 …"BriefDescription": "Counts all demand code reads that miss the LLC and the data returned from lo…
276 …"BriefDescription": "Counts all demand code reads that miss the LLC and the data returned from re…
288 …"BriefDescription": "Counts all demand code reads that miss the LLC the data is found in M state …
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/westmereep-sp/ |
| H A D | virtual-memory.json | 11 "BriefDescription": "DTLB load miss caused by low part of address",
27 "BriefDescription": "DTLB load miss page walks complete",
35 "BriefDescription": "DTLB load miss page walk cycles",
51 "BriefDescription": "DTLB miss large page walks",
67 "BriefDescription": "DTLB miss page walks",
75 "BriefDescription": "DTLB miss page walk cycles",
99 "BriefDescription": "ITLB miss",
107 "BriefDescription": "ITLB miss page walks",
115 "BriefDescription": "ITLB miss page walk cycles",
132 "BriefDescription": "Retired loads that miss the DTLB (Precise Event)",
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/arm64/arm/cortex-a510/ |
| H A D | pipeline.json | 21 …, cache miss. This event counts every cycle that the Data Processing Unit (DPU) instruction queue …
24 …, cache miss. This event counts every cycle that the Data Processing Unit (DPU) instruction queue …
27 … the frontend, TLB miss. This event counts every cycle that the DPU instruction queue is empty and…
30 … the frontend, TLB miss. This event counts every cycle that the DPU instruction queue is empty and…
69 …"PublicDescription": "No operation issued due to the backend, load, cache miss. This event counts …
72 …"BriefDescription": "No operation issued due to the backend, load, cache miss. This event counts e…
75 …"PublicDescription": "No operation issued due to the backend, load, TLB miss. This event counts ev…
78 …"BriefDescription": "No operation issued due to the backend, load, TLB miss. This event counts eve…
87 …"PublicDescription": "No operation issued due to the backend, store, TLB miss. This event counts e…
90 …"BriefDescription": "No operation issued due to the backend, store, TLB miss. This event counts ev…
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/amdzen3/ |
| H A D | cache.json | 41 … Prefetcher. All prefetches accepted by L2 pipeline, hit or miss. Types of PF and L2 hit/miss brok…
160 …ble request access status (not including L2 Prefetch). Data cache request miss in L2 (all types). …
178 …uest access status (not including L2 Prefetch). Instruction cache request miss in L2. Use l2_cache…
190 …s (not including L2 Prefetch). Instruction cache request miss in L2 and Data cache request miss in…
214 …er hits in L3. Counts all L2 prefetches accepted by the L2 pipeline which miss the L2 cache and hi…
220 … misses in L3. Counts all L2 prefetches accepted by the L2 pipeline which miss the L2 and the L3 c…
246 …"BriefDescription": "L1 ITLB Miss, L2 ITLB Hit. The number of instruction fetches that miss in the…
251 "BriefDescription": "The number of instruction fetches that miss in both the L1 and L2 TLBs.",
316 …"BriefDescription": "All Instruction Cache Accesses. Counts various IC tag related hit and miss ev…
322 … "BriefDescription": "Instruction Cache Miss. Counts various IC tag related hit and miss events.",
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/powerpc/power8/ |
| H A D | translation.json | 5 "BriefDescription": "Data ERAT Miss (Data TLB Access) page size 16G",
11 "BriefDescription": "Data ERAT Miss (Data TLB Access) page size 16M",
17 "BriefDescription": "Data ERAT Miss (Data TLB Access) page size 4K",
23 "BriefDescription": "Data ERAT Miss (Data TLB Access) page size 64K",
138 "PublicDescription": "Data PTEG Reloaded (DTLB Miss)"
143 "BriefDescription": "Data TLB Miss page size 16G",
149 "BriefDescription": "Data TLB Miss page size 16M",
155 "BriefDescription": "Data TLB Miss page size 4k",
161 "BriefDescription": "Data TLB Miss page size 64K",
167 "BriefDescription": "DERAT Reloaded due to a DERAT miss",
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/icelake/ |
| H A D | virtual-memory.json | 3 "BriefDescription": "Loads that miss the DTLB and hit the STLB.",
9 …"PublicDescription": "Counts loads that miss the DTLB (Data TLB) and hit the STLB (Second level TL…
22 …"PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page …
28 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
70 …s the number of page walks outstanding for a demand load in the PMH (Page Miss Handler) each cycle…
76 "BriefDescription": "Stores that miss the DTLB and hit the STLB.",
82 …"PublicDescription": "Counts stores that miss the DTLB (Data TLB) and hit the STLB (2nd Level TLB)…
95 …"PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page …
143 …"Counts the number of page walks outstanding for a store in the PMH (Page Miss Handler) each cycle…
149 "BriefDescription": "Instruction fetch requests that miss the ITLB and hit the STLB.",
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/sapphirerapids/ |
| H A D | virtual-memory.json | 3 "BriefDescription": "Loads that miss the DTLB and hit the STLB.",
9 …"PublicDescription": "Counts loads that miss the DTLB (Data TLB) and hit the STLB (Second level TL…
21 …"PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page …
26 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
76 …s the number of page walks outstanding for a demand load in the PMH (Page Miss Handler) each cycle…
81 "BriefDescription": "Stores that miss the DTLB and hit the STLB.",
87 …"PublicDescription": "Counts stores that miss the DTLB (Data TLB) and hit the STLB (2nd Level TLB)…
99 …"PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page …
154 …"Counts the number of page walks outstanding for a store in the PMH (Page Miss Handler) each cycle…
159 "BriefDescription": "Instruction fetch requests that miss the ITLB and hit the STLB.",
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/tigerlake/ |
| H A D | virtual-memory.json | 3 "BriefDescription": "Loads that miss the DTLB and hit the STLB.",
9 …"PublicDescription": "Counts loads that miss the DTLB (Data TLB) and hit the STLB (Second level TL…
21 …"PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page …
26 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
65 …s the number of page walks outstanding for a demand load in the PMH (Page Miss Handler) each cycle…
70 "BriefDescription": "Stores that miss the DTLB and hit the STLB.",
76 …"PublicDescription": "Counts stores that miss the DTLB (Data TLB) and hit the STLB (2nd Level TLB)…
88 …"PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page …
132 …"Counts the number of page walks outstanding for a store in the PMH (Page Miss Handler) each cycle…
137 "BriefDescription": "Instruction fetch requests that miss the ITLB and hit the STLB.",
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/jaketown/ |
| H A D | memory.json | 183 "BriefDescription": "Counts all demand code reads that miss the LLC",
195 …"BriefDescription": "Counts all demand code reads that miss the LLC and the data returned from lo…
207 …"BriefDescription": "Counts all demand code reads that miss the LLC and the data returned from re…
219 …"BriefDescription": "Counts all demand code reads that miss the LLC the data is found in M state …
231 …"BriefDescription": "Counts all demand code reads that miss the LLC and the data forwarded from r…
243 …"BriefDescription": "Counts demand data reads that miss the LLC and the data returned from remote…
255 "BriefDescription": "Counts demand data reads that miss in the LLC",
267 …"BriefDescription": "Counts demand data reads that miss the LLC and the data returned from local …
279 …"BriefDescription": "Counts demand data reads that miss the LLC and the data returned from remote…
291 …"BriefDescription": "Counts demand data reads that miss the LLC the data is found in M state in r…
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/x86/icelakex/ |
| H A D | virtual-memory.json | 3 "BriefDescription": "Loads that miss the DTLB and hit the STLB.",
9 …"PublicDescription": "Counts loads that miss the DTLB (Data TLB) and hit the STLB (Second level TL…
22 …"PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page …
28 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
82 …s the number of page walks outstanding for a demand load in the PMH (Page Miss Handler) each cycle…
88 "BriefDescription": "Stores that miss the DTLB and hit the STLB.",
94 …"PublicDescription": "Counts stores that miss the DTLB (Data TLB) and hit the STLB (2nd Level TLB)…
107 …"PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page …
167 …"Counts the number of page walks outstanding for a store in the PMH (Page Miss Handler) each cycle…
173 "BriefDescription": "Instruction fetch requests that miss the ITLB and hit the STLB.",
[all …]
|
| /freebsd/contrib/libfido2/fuzz/ |
| H A D | functions.txt | 2 Name Regions Miss Cover Lines Miss Cover
16 Name Regions Miss Cover Lines Miss Cover
85 Name Regions Miss Cover Lines Miss Cover
96 Name Regions Miss Cover Lines Miss Cover
151 Name Regions Miss Cover Lines Miss Cove
[all...] |