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/linux/drivers/gpu/host1x/
H A Dmipi.c131 struct tegra_mipi *mipi; member
136 static inline u32 tegra_mipi_readl(struct tegra_mipi *mipi, in tegra_mipi_readl() argument
139 return readl(mipi->regs + (offset << 2)); in tegra_mipi_readl()
142 static inline void tegra_mipi_writel(struct tegra_mipi *mipi, u32 value, in tegra_mipi_writel() argument
145 writel(value, mipi->regs + (offset << 2)); in tegra_mipi_writel()
148 static int tegra_mipi_power_up(struct tegra_mipi *mipi) in tegra_mipi_power_up() argument
153 err = clk_enable(mipi->clk); in tegra_mipi_power_up()
157 value = tegra_mipi_readl(mipi, MIPI_CAL_BIAS_PAD_CFG0); in tegra_mipi_power_up()
160 if (mipi->soc->needs_vclamp_ref) in tegra_mipi_power_up()
163 tegra_mipi_writel(mipi, value, MIPI_CAL_BIAS_PAD_CFG0); in tegra_mipi_power_up()
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Dsamsung,mipi-video-phy.yaml4 $id: http://devicetree.org/schemas/phy/samsung,mipi-video-phy.yaml#
7 title: Samsung S5P/Exynos SoC MIPI CSIS/DSIM DPHY
15 For samsung,s5pv210-mipi-video-phy compatible PHYs the second cell in the
17 0 - MIPI CSIS 0,
18 1 - MIPI DSIM 0,
19 2 - MIPI CSIS 1,
20 3 - MIPI DSIM 1.
22 samsung,exynos5420-mipi-video-phy and samsung,exynos5433-mipi-video-phy
24 4 - MIPI CSIS 2.
29 - samsung,s5pv210-mipi-video-phy
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H A Dmediatek,dsi-phy.yaml8 title: MediaTek MIPI Display Serial Interface (DSI) PHY
15 description: The MIPI DSI PHY supports up to 4-lane output.
25 - mediatek,mt7623-mipi-tx
26 - const: mediatek,mt2701-mipi-tx
29 - mediatek,mt6795-mipi-tx
30 - const: mediatek,mt8173-mipi-tx
33 - mediatek,mt6893-mipi-tx
34 - mediatek,mt8188-mipi-tx
35 - mediatek,mt8195-mipi-tx
36 - mediatek,mt8365-mipi-tx
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H A Dallwinner,sun6i-a31-mipi-dphy.yaml4 $id: http://devicetree.org/schemas/phy/allwinner,sun6i-a31-mipi-dphy.yaml#
7 title: Allwinner A31 MIPI D-PHY Controller
19 - const: allwinner,sun6i-a31-mipi-dphy
20 - const: allwinner,sun50i-a100-mipi-dphy
22 - const: allwinner,sun50i-a64-mipi-dphy
23 - const: allwinner,sun6i-a31-mipi-dphy
25 - const: allwinner,sun20i-d1-mipi-dphy
26 - const: allwinner,sun50i-a100-mipi-dphy
51 - "rx" for receiving (e.g. when used with MIPI CSI-2);
52 - "tx" for transmitting (e.g. when used with MIPI DSI).
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H A Drockchip-mipi-dphy-rx0.yaml4 $id: http://devicetree.org/schemas/phy/rockchip-mipi-dphy-rx0.yaml#
7 title: Rockchip SoC MIPI RX0 D-PHY
14 The Rockchip SoC has a MIPI D-PHY bus with an RX0 entry which connects to
19 const: rockchip,rk3399-mipi-dphy-rx0
23 - description: MIPI D-PHY ref clock
24 - description: MIPI D-PHY RX0 cfg clock
53 * MIPI D-PHY RX0 use registers in "general register files", it
65 mipi_dphy_rx0: mipi-dphy-rx0 {
66 compatible = "rockchip,rk3399-mipi-dphy-rx0";
H A Dmixel,mipi-dsi-phy.yaml4 $id: http://devicetree.org/schemas/phy/mixel,mipi-dsi-phy.yaml#
13 The Mixel MIPI-DSI PHY IP block is e.g. found on i.MX8 platforms (along the
14 MIPI-DSI IP from Northwest Logic). It represents the physical layer for the
18 in either MIPI-DSI PHY mode or LVDS PHY mode.
23 - fsl,imx8mq-mipi-dphy
24 - fsl,imx8qxp-mipi-dphy
59 const: fsl,imx8mq-mipi-dphy
73 const: fsl,imx8qxp-mipi-dphy
84 compatible = "fsl,imx8mq-mipi-dphy";
/linux/drivers/soundwire/
H A Dmipi_disco.c5 * MIPI Discovery And Configuration (DisCo) Specification for SoundWire
61 "mipi-sdw-sw-interface-revision", in sdw_master_read_prop()
66 "mipi-sdw-link-%d-subproperties", bus->link_id); in sdw_master_read_prop()
75 "mipi-sdw-clock-stop-mode0-supported")) in sdw_master_read_prop()
79 "mipi-sdw-clock-stop-mode1-supported")) in sdw_master_read_prop()
83 "mipi-sdw-max-clock-frequency", in sdw_master_read_prop()
86 nval = fwnode_property_count_u32(link, "mipi-sdw-clock-frequencies-supported"); in sdw_master_read_prop()
98 "mipi-sdw-clock-frequencies-supported", in sdw_master_read_prop()
116 scales_prop = "mipi-sdw-supported-clock-scales"; in sdw_master_read_prop()
119 scales_prop = "mipi-sdw-supported-clock-gears"; in sdw_master_read_prop()
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/linux/Documentation/devicetree/bindings/display/tegra/
H A Dnvidia,tegra114-mipi.yaml4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra114-mipi.yaml#
7 title: NVIDIA Tegra MIPI pad calibration controller
15 pattern: "^mipi@[0-9a-f]+$"
19 - nvidia,tegra114-mipi
20 - nvidia,tegra124-mipi
21 - nvidia,tegra210-mipi
22 - nvidia,tegra186-mipi
33 - const: mipi-cal
38 "#nvidia,mipi-calibrate-cells":
39 description: The number of cells in a MIPI calibration specifier.
[all …]
/linux/include/video/
H A Dmipi_display.h3 * Defines for Mobile Industry Processor Interface (MIPI(R))
13 /* MIPI DSI Processor-to-Peripheral transaction types */
66 /* MIPI DSI Peripheral-to-Processor transaction types */
78 /* MIPI DCS commands */
111 MIPI_DCS_SET_PARTIAL_ROWS = 0x30, /* MIPI DCS 1.02 - MIPI_DCS_SET_PARTIAL_AREA before that */
128 MIPI_DCS_SET_DISPLAY_BRIGHTNESS = 0x51, /* MIPI DCS 1.3 */
129 MIPI_DCS_GET_DISPLAY_BRIGHTNESS = 0x52, /* MIPI DCS 1.3 */
130 MIPI_DCS_WRITE_CONTROL_DISPLAY = 0x53, /* MIPI DCS 1.3 */
131 MIPI_DCS_GET_CONTROL_DISPLAY = 0x54, /* MIPI DCS 1.3 */
132 MIPI_DCS_WRITE_POWER_SAVE = 0x55, /* MIPI DCS 1.3 */
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/linux/Documentation/devicetree/bindings/display/
H A Dallwinner,sun6i-a31-mipi-dsi.yaml4 $id: http://devicetree.org/schemas/display/allwinner,sun6i-a31-mipi-dsi.yaml#
7 title: Allwinner A31 MIPI-DSI Controller
17 - allwinner,sun6i-a31-mipi-dsi
18 - allwinner,sun50i-a64-mipi-dsi
19 - allwinner,sun50i-a100-mipi-dsi
21 - const: allwinner,sun20i-d1-mipi-dsi
22 - const: allwinner,sun50i-a100-mipi-dsi
76 - allwinner,sun6i-a31-mipi-dsi
77 - allwinner,sun50i-a100-mipi-dsi
97 - allwinner,sun6i-a31-mipi-dsi
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/linux/Documentation/devicetree/bindings/display/bridge/
H A Dintel,keembay-dsi.yaml7 title: Intel Keem Bay mipi dsi controller
19 - description: MIPI registers range
23 - const: mipi
27 - description: MIPI DSI clock
28 - description: MIPI DSI econfig clock
29 - description: MIPI DSI config clock
43 description: MIPI DSI input port.
65 mipi-dsi@20900000 {
68 reg-names = "mipi";
H A Dfsl,imx93-mipi-dsi.yaml4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx93-mipi-dsi.yaml#
7 title: Freescale i.MX93 specific extensions to Synopsys Designware MIPI DSI
13 There is a Synopsys Designware MIPI DSI Host Controller and a Synopsys
14 Designware MIPI DPHY embedded in Freescale i.MX93 SoC. Some configurations
18 - $ref: snps,dw-mipi-dsi.yaml#
22 const: fsl,imx93-mipi-dsi
45 configurations from LCDIF display controller to the MIPI DSI host
46 controller and MIPI DPHY PLL related configurations through PLL SoC
68 compatible = "fsl,imx93-mipi-dsi";
H A Dlontium,lt9211.yaml41 Primary MIPI DSI port-1 for MIPI input or
47 Additional MIPI port-2 for MIPI input or LVDS port-2
54 Primary MIPI DSI port-1 for MIPI output or
60 Additional MIPI port-2 for MIPI output or LVDS port-2
H A Dtoshiba,tc358762.yaml7 title: Toshiba TC358762 MIPI DSI to MIPI DPI bridge
13 The TC358762 is bridge device which converts MIPI DSI to MIPI DPI.
37 Video port for MIPI DSI input
42 Video port for MIPI DPI output (panel or connector).
/linux/Documentation/devicetree/bindings/i3c/
H A Dmipi-i3c-hci.yaml4 $id: http://devicetree.org/schemas/i3c/mipi-i3c-hci.yaml#
7 title: MIPI I3C HCI
16 MIPI I3C Host Controller Interface
18 The MIPI I3C HCI (Host Controller Interface) specification defines
19 a common software driver interface to support compliant MIPI I3C
27 https://www.mipi.org/specifications/i3c-hci
31 const: mipi-i3c-hci
47 compatible = "mipi-i3c-hci";
/linux/Documentation/admin-guide/media/
H A Dimx7.rst16 - MIPI CSI-2 Receiver
20 MIPI Camera Input ---> MIPI CSI-2 --- > |\
36 imx-mipi-csi2
39 This is the MIPI CSI-2 receiver entity. It has one sink pad to receive the pixel
40 data from MIPI CSI-2 camera sensor. It has one source pad, corresponding to the
48 sensor with a parallel interface or from MIPI CSI-2 virtual channel 0. It has
55 can interface directly with Parallel and MIPI CSI-2 buses. It has 256 x 64 FIFO
76 On this platform an OV2680 MIPI CSI-2 module is connected to the internal MIPI
83 media-ctl -l "'ov2680 1-0036':0 -> 'imx7-mipi-csis.0':0[1]"
84 media-ctl -l "'imx7-mipi-csis.0':1 -> 'csi-mux':1[1]"
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/linux/Documentation/devicetree/bindings/media/
H A Dallwinner,sun6i-a31-mipi-csi2.yaml4 $id: http://devicetree.org/schemas/media/allwinner,sun6i-a31-mipi-csi2.yaml#
7 title: Allwinner A31 MIPI CSI-2
15 - const: allwinner,sun6i-a31-mipi-csi2
17 - const: allwinner,sun8i-v3s-mipi-csi2
18 - const: allwinner,sun6i-a31-mipi-csi2
38 description: MIPI D-PHY
53 description: Input port, connect to a MIPI CSI-2 sensor
101 compatible = "allwinner,sun8i-v3s-mipi-csi2",
102 "allwinner,sun6i-a31-mipi-csi2";
H A Dallwinner,sun8i-a83t-mipi-csi2.yaml4 $id: http://devicetree.org/schemas/media/allwinner,sun8i-a83t-mipi-csi2.yaml#
7 title: Allwinner A83T MIPI CSI-2
14 const: allwinner,sun8i-a83t-mipi-csi2
26 - description: MIPI-specific Clock
33 - const: mipi
45 description: Input port, connect to a MIPI CSI-2 sensor
91 compatible = "allwinner,sun8i-a83t-mipi-csi2";
98 clock-names = "bus", "mod", "mipi", "misc";
/linux/Documentation/driver-api/media/drivers/ccs/
H A Dccs.rst7 MIPI CCS camera sensor driver
10 The MIPI CCS camera sensor driver is a generic driver for `MIPI CCS
11 <https://www.mipi.org/specifications/camera-command-set>`_ compliant
19 The MIPI CCS driver supports CCS static data for all compliant devices,
35 vvvv or vv denotes MIPI and SMIA manufacturer IDs respectively, mmmm model ID
41 `CCS tools <https://github.com/MIPI-Alliance/ccs-tools/>`_ is a set of
49 The ccs-regs.asc file contains MIPI CCS register definitions that are used
78 The PLL model implemented by the PLL calculator corresponds to MIPI CCS 1.1.
/linux/Documentation/devicetree/bindings/media/xilinx/
H A Dxlnx,csi2rxss.yaml7 title: Xilinx MIPI CSI-2 Receiver Subsystem
13 The Xilinx MIPI CSI-2 Receiver Subsystem is used to capture MIPI CSI-2
16 The subsystem consists of a MIPI D-PHY in slave mode which captures the
17 data packets. This is passed along the MIPI CSI-2 Rx IP which extracts the
20 For more details, please refer to PG232 Xilinx MIPI CSI-2 Receiver Subsystem.
21 Please note that this bindings includes only the MIPI CSI-2 Rx controller
28 - xlnx,mipi-csi2-rx-subsystem-5.0
118 connects to MIPI CSI-2 source like sensor.
174 compatible = "xlnx,mipi-csi2-rx-subsystem-5.0";
196 /* MIPI CSI-2 Camera handle */
/linux/drivers/phy/rockchip/
H A DKconfig13 tristate "Rockchip MIPI Synopsys DPHY RX0 driver"
18 Enable this to support the Rockchip MIPI Synopsys DPHY RX0
52 tristate "Rockchip Innosilicon MIPI CSI PHY driver"
57 Enable this to support the Rockchip MIPI CSI PHY with
61 tristate "Rockchip Innosilicon MIPI/LVDS/TTL PHY driver"
66 Enable this to support the Rockchip MIPI/LVDS/TTL PHY with
87 tristate "Rockchip Samsung MIPI DCPHY driver"
92 Enable this to support the Rockchip MIPI DCPHY with
/linux/Documentation/devicetree/bindings/soc/imx/
H A Dfsl,imx8mp-media-blk-ctrl.yaml41 - const: mipi-dsi1
42 - const: mipi-csi1
45 - const: mipi-csi2
49 - const: mipi-dsi2
60 - description: The MIPI-PHY reference clock used by DSI
117 power-domain-names = "bus", "mipi-dsi1", "mipi-csi1", "lcdif1", "isi",
118 "mipi-csi2", "lcdif2", "isp", "dwe", "mipi-dsi2";
/linux/drivers/phy/amlogic/
H A DKconfig41 tristate "Meson G12A MIPI Analog DPHY driver"
48 Enable this to support the Meson MIPI Analog DPHY found in Meson G12A
81 Enable this to support the Meson MIPI + PCIE PHY found
86 tristate "Meson AXG MIPI + PCIE analog PHY driver"
93 Enable this to support the Meson MIPI + PCIE analog PHY
98 tristate "Meson AXG MIPI DPHY driver"
105 Enable this to support the Meson MIPI DPHY found in Meson AXG
/linux/sound/soc/sdca/
H A Dsdca_functions.c5 * The MIPI SDCA specification is available for public downloads at
6 * https://www.mipi.org/mipi-sdca-v1-0-download
25 * Should be long enough to encompass all the MIPI DisCo properties.
127 "mipi-sdca-control-0x5-subproperties"); in find_sdca_function()
131 ret = fwnode_property_read_u32(control5, "mipi-sdca-control-dc-value", in find_sdca_function()
208 "mipi-sdca-function-initialization-table"); in find_sdca_init_table()
228 "mipi-sdca-function-initialization-table", in find_sdca_init_table()
791 num_range = fwnode_property_count_u8(control_node, "mipi-sdca-control-range"); in find_sdca_control_range()
801 fwnode_property_read_u8_array(control_node, "mipi-sdca-control-range", in find_sdca_control_range()
830 snprintf(property, sizeof(property), "mipi-sdca-control-%s", label); in find_sdca_control_value()
[all …]
/linux/include/drm/
H A Ddrm_mipi_dbi.h3 * MIPI Display Bus Interface (DBI) LCD controller support
23 * struct mipi_dbi - MIPI DBI interface
81 * struct mipi_dbi_dev - MIPI DBI device
147 * @dbi: MIPI DBI interface
210 * mipi_dbi_command - MIPI DCS command with optional parameter(s)
211 * @dbi: MIPI DBI structure
215 * Send MIPI DCS command to the controller. Use mipi_dbi_command_read() for
240 * for MIPI-DBI devices
244 * values for MIPI-DBI-based devices. The only callback that depends on the
246 * MIPI-based drivers are encouraged to use this macro for initialization.

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