Searched +full:mipi +full:- +full:dphy +full:- +full:rx0 (Results 1 – 5 of 5) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT)3 ---4 $id: http://devicetree.org/schemas/phy/rockchip-mipi-dphy-rx0.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Rockchip SoC MIPI RX0 D-PHY10 - Helen Koike <helen.koike@collabora.com>11 - Ezequiel Garcia <ezequiel@collabora.com>14 The Rockchip SoC has a MIPI D-PHY bus with an RX0 entry which connects to19 const: rockchip,rk3399-mipi-dphy-rx023 - description: MIPI D-PHY ref clock[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/phy/rockchip-inno-csi-dphy.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Rockchip SoC MIPI RX0 D-PHY10 - Heiko Stuebner <heiko@sntech.de>13 The Rockchip SoC has a MIPI CSI D-PHY based on an Innosilicon IP which19 - rockchip,px30-csi-dphy20 - rockchip,rk1808-csi-dphy21 - rockchip,rk3326-csi-dphy[all …]
1 # SPDX-License-Identifier: GPL-2.0-only13 tristate "Rockchip MIPI Synopsys DPHY RX0 driver"18 Enable this to support the Rockchip MIPI Synopsys DPHY RX022 will be called phy-rockchip-dphy-rx0.52 tristate "Rockchip Innosilicon MIPI CSI PHY driver"57 Enable this to support the Rockchip MIPI CSI PHY with61 tristate "Rockchip Innosilicon MIPI/LVDS/TTL PHY driver"66 Enable this to support the Rockchip MIPI/LVDS/TTL PHY with87 tristate "Rockchip Samsung MIPI DCPHY driver"92 Enable this to support the Rockchip MIPI DCPHY with[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)3 * Rockchip MIPI Synopsys DPHY RX0 driver11 * chromeos-4.4 branch.14 * Jacob Chen <jacob2.chen@rock-chips.com>15 * Shunqian Zheng <zhengsq@rock-chips.com>25 #include <linux/phy/phy-mipi-dphy.h>64 "dphy-ref",65 "dphy-cfg",110 { .offset = _offset, .mask = BIT(_width) - 1, .shift = _shift, }162 const struct dphy_reg *reg = &priv->drv_data->regs[index]; in rk_dphy_write_grf()[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/clock/rk3399-cru.h>7 #include <dt-bindings/gpio/gpio.h>8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include <dt-bindings/interrupt-controller/irq.h>10 #include <dt-bindings/pinctrl/rockchip.h>11 #include <dt-bindings/power/rk3399-power.h>12 #include <dt-bindings/thermal/thermal.h>17 interrupt-parent = <&gic>;18 #address-cells = <2>;[all …]