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/linux/Documentation/devicetree/bindings/soc/tegra/
H A Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
19 - nvidia,tegra124-pmc
[all …]
/linux/Documentation/devicetree/bindings/arm/tegra/
H A Dnvidia,tegra186-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra186-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra186-pmc
17 - nvidia,tegra194-pmc
18 - nvidia,tegra234-pmc
24 reg-names:
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsc7180-trogdor-wormdingler.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "sc7180-trogdor.dtsi"
11 #include "sc7180-trogdor-detachable.dtsi"
14 avdd_lcd: avdd-lcd-regulator {
15 compatible = "regulator-fixed";
16 regulator-name = "avdd_lcd";
19 enable-active-high;
20 pinctrl-names = "default";
21 pinctrl-0 = <&avdd_lcd_en>;
[all …]
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-apq8064-ifc6410.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/gpio/gpio.h>
3 #include <dt-bindings/leds/common.h>
4 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
6 #include "qcom-apq8064-v2.0.dtsi"
12 compatible = "qcom,apq8064-ifc6410", "qcom,apq8064";
25 stdout-path = "serial0:115200n8";
29 compatible = "gpio-leds";
30 pinctrl-names = "default";
31 pinctrl-0 = <&notify_led>;
[all …]
/linux/drivers/gpu/host1x/
H A Dmipi.c102 /* bias pad configuration settings */
131 struct tegra_mipi *mipi; member
136 static inline u32 tegra_mipi_readl(struct tegra_mipi *mipi, in tegra_mipi_readl() argument
139 return readl(mipi->regs + (offset << 2)); in tegra_mipi_readl()
142 static inline void tegra_mipi_writel(struct tegra_mipi *mipi, u32 value, in tegra_mipi_writel() argument
145 writel(value, mipi->regs + (offset << 2)); in tegra_mipi_writel()
148 static int tegra_mipi_power_up(struct tegra_mipi *mipi) in tegra_mipi_power_up() argument
153 err = clk_enable(mipi->clk); in tegra_mipi_power_up()
157 value = tegra_mipi_readl(mipi, MIPI_CAL_BIAS_PAD_CFG0); in tegra_mipi_power_up()
160 if (mipi->soc->needs_vclamp_ref) in tegra_mipi_power_up()
[all …]
/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-g12-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/phy/phy.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/clock/g12a-clkc.h>
9 #include <dt-bindings/clock/g12a-aoclkc.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/amlogic,meson-g12a-gpio-intc.h>
13 #include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
14 #include <dt-bindings/thermal/thermal.h>
[all …]
H A Dmeson-axg.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/axg-aoclkc.h>
7 #include <dt-bindings/clock/axg-audio-clkc.h>
8 #include <dt-bindings/clock/axg-clkc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/gpio/meson-axg-gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
14 #include <dt-bindings/reset/amlogic,meson-axg-reset.h>
[all …]
/linux/arch/riscv/boot/dts/starfive/
H A Djh7110-common.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include "jh7110-pinfunc.h"
10 #include <dt-bindings/gpio/gpio.h>
25 stdout-path = "serial0:115200n8";
33 gpio-restart {
34 compatible = "gpio-restart";
39 pwmdac_codec: audio-codec {
40 compatible = "linux,spdif-dit";
41 #sound-dai-cells = <0>;
[all …]
/linux/Documentation/devicetree/bindings/sound/
H A Dcirrus,cs42l43.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
13 The CS42L43 is an audio CODEC with integrated MIPI SoundWire interface
21 - $ref: dai-common.yaml#
26 - cirrus,cs42l43
31 vdd-p-supply:
35 vdd-a-supply:
39 vdd-d-supply:
[all …]
/linux/arch/arm/boot/dts/allwinner/
H A Dsun6i-a31s-primo81.dts4 * Copyright 2015 Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 /dts-v1/;
46 #include "sun6i-a31s.dtsi"
47 #include "sunxi-common-regulators.dtsi"
49 #include <dt-bindings/gpio/gpio.h>
50 #include <dt-bindings/input/input.h>
54 compatible = "msi,primo81", "allwinner,sun6i-a31s";
56 hdmi-connector {
57 compatible = "hdmi-connector";
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8395-radxa-nio-12l.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
13 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h>
14 #include <dt-bindings/spmi/spmi.h>
15 #include <dt-bindings/usb/pd.h>
19 chassis-type = "embedded";
20 compatible = "radxa,nio-12l", "mediatek,mt8395", "mediatek,mt8195";
36 stdout-path = "serial0:921600n8";
[all …]
H A Dmt8173.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/mt8173-clk.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/memory/mt8173-larb-port.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/power/mt8173-power.h>
13 #include <dt-bindings/reset/mt8173-resets.h>
14 #include <dt-bindings/gce/mt8173-gce.h>
15 #include <dt-bindings/thermal/thermal.h>
[all …]
/linux/arch/arm/boot/dts/mediatek/
H A Dmt7623n.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright © 2017-2020 MediaTek Inc.
10 #include <dt-bindings/memory/mt2701-larb-port.h>
19 compatible = "mediatek,mt7623-g3dsys",
20 "mediatek,mt2701-g3dsys",
23 #clock-cells = <1>;
24 #reset-cells = <1>;
28 compatible = "mediatek,mt7623-mali", "arm,mali-450";
41 interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1",
46 clock-names = "bus", "core";
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-base.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3399-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3399-power.h>
12 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
[all …]
H A Dpx30.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/px30-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/px30-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
[all …]
/linux/drivers/gpu/drm/panel/
H A Dpanel-raydium-rm68200.c1 // SPDX-License-Identifier: GPL-2.0
30 #define MCS_STBCTR 0x12 /* TE1 Output Setting Zig-Zag Connection */
31 #define MCS_SGOPCTR 0x16 /* Source Bias Current */
43 #define MCS_SW_CTRL 0x5F /* Interface Control for PFM and MIPI */
45 /* CMD2 P2 commands (GOA Timing Control) - no description in datasheet */
105 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in rm68200_dcs_write_buf()
110 dev_err_ratelimited(ctx->dev, "MIPI DSI DCS write buffer failed: %d\n", err); in rm68200_dcs_write_buf()
115 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in rm68200_dcs_write_cmd()
120 dev_err_ratelimited(ctx->dev, "MIPI DSI DCS write failed: %d\n", err); in rm68200_dcs_write_cmd()
131 * This panel is not able to auto-increment all cmd addresses so for some of
[all …]
/linux/drivers/soc/tegra/
H A Dpmc.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2018-2024, NVIDIA CORPORATION. All rights reserved.
12 #define pr_fmt(fmt) "tegra-pmc: " fmt
14 #include <linux/arm-smccc.h>
16 #include <linux/clk-provider.h>
18 #include <linux/clk/clk-conf.h>
37 #include <linux/pinctrl/pinconf-generic.h>
56 #include <dt-bindings/interrupt-controller/arm-gic.h>
57 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
58 #include <dt-bindings/gpio/tegra186-gpio.h>
[all …]
/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-a64-pine64.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 /dts-v1/;
6 #include "sun50i-a64.dtsi"
7 #include "sun50i-a64-cpu-opp.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
13 compatible = "pine64,pine64", "allwinner,sun50i-a64";
25 stdout-path = "serial0:115200n8";
28 hdmi-connector {
29 compatible = "hdmi-connector";
34 remote-endpoint = <&hdmi_out_con>;
[all …]
H A Dsun50i-a64.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/sun50i-a64-ccu.h>
7 #include <dt-bindings/clock/sun6i-rtc.h>
8 #include <dt-bindings/clock/sun8i-de2.h>
9 #include <dt-bindings/clock/sun8i-r-ccu.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/sun50i-a64-ccu.h>
12 #include <dt-bindings/reset/sun8i-de2.h>
13 #include <dt-bindings/reset/sun8i-r-ccu.h>
14 #include <dt-bindings/thermal/thermal.h>
[all …]
H A Dsun50i-a64-amarula-relic.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 /dts-v1/;
7 #include "sun50i-a64.dtsi"
8 #include "sun50i-a64-cpu-opp.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
13 model = "Amarula A64-Relic";
14 compatible = "amarula,a64-relic", "allwinner,sun50i-a64";
21 stdout-path = "serial0:115200n8";
25 compatible = "i2c-gpio";
26 sda-gpios = <&pio 4 13 GPIO_ACTIVE_HIGH>;
[all …]
/linux/drivers/media/i2c/ccs/
H A Dccs-reg-access.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/media/i2c/ccs/ccs-reg-access.c
5 * Generic driver for MIPI CCS/SMIA/SMIA++ compliant camera sensors
8 * Copyright (C) 2011--2012 Nokia Corporation
18 #include "ccs-limits.h"
26 dev_err(&client->dev, "this is a negative number\n"); in float_to_u32_mul_1000000()
34 dev_err(&client->dev, "NaN or other special number\n"); in float_to_u32_mul_1000000()
49 exp = ((int32_t)phloat >> 23) - 127; in float_to_u32_mul_1000000()
55 man >>= -exp; in float_to_u32_mul_1000000()
59 man >>= 23; /* Remove mantissa bias */ in float_to_u32_mul_1000000()
[all …]
H A Dccs-quirk.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/media/i2c/ccs/ccs-quirk.c
5 * Generic driver for MIPI CCS/SMIA/SMIA++ compliant camera sensors
8 * Copyright (C) 2011--2012 Nokia Corporation
15 #include "ccs-limits.h"
20 struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd); in ccs_write_addr_8s()
23 for (; len > 0; len--, regs++) { in ccs_write_addr_8s()
24 rval = ccs_write_addr(sensor, regs->reg, regs->val); in ccs_write_addr_8s()
26 dev_err(&client->dev, in ccs_write_addr_8s()
28 rval, regs->reg, regs->val); in ccs_write_addr_8s()
[all …]
/linux/drivers/media/i2c/
H A Dar0521.c1 // SPDX-License-Identifier: GPL-2.0
4 * - Przemysłowy Instytut Automatyki i Pomiarów PIAP
12 #include <media/v4l2-ctrls.h>
13 #include <media/v4l2-fwnode.h>
14 #include <media/v4l2-subdev.h>
89 "vdd", /* Core, PLL and MIPI (1.2V) supply */
145 return &container_of(ctrl->handler, struct ar0521_dev, in ctrl_to_sd()
146 ctrls.handler)->sd; in ctrl_to_sd()
156 return div_u64(v + d - 1, d); in div64_round_up()
161 switch (sensor->fmt.code) { in ar0521_code_to_bpp()
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6dl-riotboard.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
12 compatible = "riot,imx6s-riotboard", "fsl,imx6dl";
20 stdout-path = "serial1:115200n8";
24 compatible = "gpio-leds";
25 pinctrl-names = "default";
26 pinctrl-0 = <&pinctrl_led>;
28 led0: led-user1 {
31 default-state = "on";
[all …]
/linux/drivers/media/i2c/s5c73m3/
H A Ds5c73m3.h1 /* SPDX-License-Identifier: GPL-2.0-only */
16 #include <media/v4l2-common.h>
17 #include <media/v4l2-ctrls.h>
18 #include <media/v4l2-subdev.h>
229 /* 0x00000 (-2.0 EV)...0x0008 (2.0 EV), 0.5EV step */
262 /* 0x0000...0x0004 -> sharpness: 0, 1, 2, -1, -2 */
265 /* 0x0000...0x0004 -> saturation: 0, 1, 2, -1, -2 */
268 /* 0x0000...0x0004 -> contrast: 0, 1, 2, -1, -2 */
322 /* exposure/exposure bias cluster */
387 /* Video bus type - MIPI-CSI2/parallel */
[all …]

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