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/linux/tools/power/cpupower/utils/
H A Dcpufreq-set.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * (C) 2004-2009 Dominik Brodowski <linux@dominikbrodowski.de>
24 {"min", required_argument, NULL, 'd'},
27 {"freq", required_argument, NULL, 'f'},
35 "- Do you have proper administration rights? (super-user?)\n" in print_error()
36 "- Is the governor you requested available and modprobed?\n" in print_error()
37 "- Trying to set an invalid policy?\n" in print_error()
38 "- Trying to set a specific frequency, but userspace governor is not available,\n" in print_error()
49 {"hz", -3},
68 unsigned long freq; in string_to_frequency() local
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H A Dcpufreq-info.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * (C) 2004-2009 Dominik Brodowski <linux@dominikbrodowski.de>
39 value[LINE_LEN - 1] = '\0'; in count_cpus()
40 if (strlen(value) < (LINE_LEN - 2)) in count_cpus()
62 unsigned long min, max; in proc_cpufreq_output() local
64 printf(_(" minimum CPU frequency - maximum CPU frequency - governor\n")); in proc_cpufreq_output()
72 if (cpufreq_get_hardware_limits(cpu, &min, &max)) { in proc_cpufreq_output()
75 min_pctg = (policy->min * 100) / max; in proc_cpufreq_output()
76 max_pctg = (policy->max * 100) / max; in proc_cpufreq_output()
78 printf("CPU%3d %9lu kHz (%3d %%) - %9lu kHz (%3d %%) - %s\n", in proc_cpufreq_output()
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/linux/arch/arm/boot/dts/ti/omap/
H A Delpida_ecb240abacn.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 compatible = "elpida,ECB240ABACN","jedec,lpddr2-s4";
10 io-width = <32>;
12 tRPab-min-tck = <3>;
13 tRCD-min-tck = <3>;
14 tWR-min-tck = <3>;
15 tRASmin-min-tck = <3>;
16 tRRD-min-tck = <2>;
17 tWTR-min-tck = <2>;
18 tXP-min-tck = <2>;
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/linux/Documentation/devicetree/bindings/memory-controllers/ddr/
H A Djedec,lpddr2-timings.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr2-timings.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR2 SDRAM AC timing parameters for a given speed-bin
10 - Krzysztof Kozlowski <krzk@kernel.org>
14 const: jedec,lpddr2-timings
16 max-freq:
19 Maximum DDR clock frequency for the speed-bin, in Hz.
21 min-freq:
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H A Djedec,lpddr2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR2 SDRAM compliant to JEDEC JESD209-2
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 - $ref: jedec,lpddr-props.yaml#
18 - items:
19 - enum:
20 - elpida,ECB240ABACN
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H A Djedec,lpddr3-timings.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr3-timings.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR3 SDRAM AC timing parameters for a given speed-bin
10 - Krzysztof Kozlowski <krzk@kernel.org>
14 const: jedec,lpddr3-timings
19 Maximum DDR clock frequency for the speed-bin, in Hz.
20 Property is deprecated, use max-freq.
23 max-freq:
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/linux/Documentation/devicetree/bindings/sound/
H A Datmel,sama5d2-pdmic.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/sound/atmel,sama5d2-pdmic.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Claudiu Beznea <claudiu.beznea@microchip.com>
20 const: atmel,sama5d2-pdmic
30 - description: peripheral clock
31 - description: generated clock
33 clock-names:
35 - const: pclk
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/linux/drivers/cpufreq/
H A Dcpufreq_userspace.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
25 * cpufreq_set - set the CPU frequency
26 * @policy: pointer to policy struct where freq is being set
27 * @freq: target frequency in kHz
29 * Sets the CPU frequency to freq.
31 static int cpufreq_set(struct cpufreq_policy *policy, unsigned int freq) in cpufreq_set() argument
33 int ret = -EINVAL; in cpufreq_set()
34 struct userspace_policy *userspace = policy->governor_data; in cpufreq_set()
36 pr_debug("cpufreq_set for cpu %u, freq %u kHz\n", policy->cpu, freq); in cpufreq_set()
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/linux/drivers/crypto/intel/qat/qat_common/
H A Dadf_clock.c1 // SPDX-License-Identifier: GPL-2.0-only
58 delta_us = timespec_to_us(&ts2) - timespec_to_us(&ts1); in measure_clock()
59 } while (delta_us > MEASURE_CLOCK_DELTA_THRESHOLD_US && --tries); in measure_clock()
63 return -ETIMEDOUT; in measure_clock()
74 return -EIO; in measure_clock()
77 delta_us = timespec_to_us(&ts4) - timespec_to_us(&ts3); in measure_clock()
78 } while (delta_us > MEASURE_CLOCK_DELTA_THRESHOLD_US && --tries); in measure_clock()
82 return -ETIMEDOUT; in measure_clock()
85 delta_us = timespec_to_us(&ts3) - timespec_to_us(&ts1); in measure_clock()
87 return -EINVAL; in measure_clock()
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/linux/arch/arm/boot/dts/samsung/
H A Dexynos5250-spring.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include <dt-bindings/clock/samsung,s2mps11.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/input/input.h>
19 chassis-type = "laptop";
33 stdout-path = "serial3:115200n8";
36 gpio-keys {
37 compatible = "gpio-keys";
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H A Dexynos5250-snow-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/maxim,max77686.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/sound/samsung-i2s.h>
30 stdout-path = "serial3:115200n8";
33 gpio-keys {
34 compatible = "gpio-keys";
35 pinctrl-names = "default";
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/linux/drivers/media/tuners/
H A Dr820t.c1 // SPDX-License-Identifier: GPL-2.0
7 // that it is part of rtl-sdr git tree, released under GPLv2:
8 // https://groups.google.com/forum/#!topic/ultra-cheap-sdr/Y3rBEOFtHug
9 // https://github.com/n1gp/gr-baz
30 #include "tuner-i2c.h"
96 u32 freq; member
130 .freq = 0,
139 .freq = 50, /* Start freq, in MHz */
148 .freq = 55, /* Start freq, in MHz */
157 .freq = 60, /* Start freq, in MHz */
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/linux/drivers/sh/clk/
H A Dcore.c4 * Copyright (C) 2005 - 2010 Paul Mundt
8 * Copyright (C) 2004 - 2008 Nokia Corporation
46 unsigned long freq; in clk_rate_table_build() local
49 clk->nr_freqs = nr_freqs; in clk_rate_table_build()
55 if (src_table->divisors && i < src_table->nr_divisors) in clk_rate_table_build()
56 div = src_table->divisors[i]; in clk_rate_table_build()
58 if (src_table->multipliers && i < src_table->nr_multipliers) in clk_rate_table_build()
59 mult = src_table->multipliers[i]; in clk_rate_table_build()
62 freq = CPUFREQ_ENTRY_INVALID; in clk_rate_table_build()
64 freq = clk->parent->rate * mult / div; in clk_rate_table_build()
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/linux/drivers/memory/
H A Dof_memory.c1 // SPDX-License-Identifier: GPL-2.0-or-later
19 * of_get_min_tck() - extract min timing values for ddr
21 * @dev: device requesting for min timing values
26 * default min timings provided by JEDEC.
32 struct lpddr2_min_tck *min; in of_get_min_tck() local
34 min = devm_kzalloc(dev, sizeof(*min), GFP_KERNEL); in of_get_min_tck()
35 if (!min) in of_get_min_tck()
38 ret |= of_property_read_u32(np, "tRPab-min-tck", &min->tRPab); in of_get_min_tck()
39 ret |= of_property_read_u32(np, "tRCD-min-tck", &min->tRCD); in of_get_min_tck()
40 ret |= of_property_read_u32(np, "tWR-min-tck", &min->tWR); in of_get_min_tck()
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/linux/drivers/gpu/drm/i915/gt/
H A Dselftest_llc.c1 // SPDX-License-Identifier: MIT
11 struct drm_i915_private *i915 = llc_to_gt(llc)->i915; in gen6_verify_ring_freq()
17 wakeref = intel_runtime_pm_get(llc_to_gt(llc)->uncore->rpm); in gen6_verify_ring_freq()
25 struct intel_rps *rps = &llc_to_gt(llc)->rps; in gen6_verify_ring_freq()
33 if (snb_pcode_read(llc_to_gt(llc)->uncore, GEN6_PCODE_READ_MIN_FREQ_TABLE, in gen6_verify_ring_freq()
35 pr_err("Failed to read freq table[%d], range [%d, %d]\n", in gen6_verify_ring_freq()
37 err = -ENXIO; in gen6_verify_ring_freq()
43 …pr_err("Min freq table(%d/[%d, %d]):%dMHz did not match expected CPU freq, found %d, expected %d\n… in gen6_verify_ring_freq()
47 err = -EINVAL; in gen6_verify_ring_freq()
53 …pr_err("Min freq table(%d/[%d, %d]):%dMHz did not match expected ring freq, found %d, expected %d\… in gen6_verify_ring_freq()
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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dbase.c44 struct nvkm_bios *bios = clk->subdev.device->bios; in nvkm_clk_adjust()
55 input = max(boostE.min, input); in nvkm_clk_adjust()
56 input = min(boostE.max, input); in nvkm_clk_adjust()
65 input = max(boostS.min, input); in nvkm_clk_adjust()
66 input = min(boostS.max, input); in nvkm_clk_adjust()
76 * C-States
82 const struct nvkm_domain *domain = clk->domains; in nvkm_cstate_valid()
83 struct nvkm_volt *volt = clk->subdev.device->volt; in nvkm_cstate_valid()
86 while (domain && domain->name != nv_clk_src_max) { in nvkm_cstate_valid()
87 if (domain->flags & NVKM_CLK_DOM_FLAG_VPSTATE) { in nvkm_cstate_valid()
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H A Dpllgt215.c31 u32 freq, int *pN, int *pfN, int *pM, int *P) in gt215_pll_calc() argument
36 *P = info->vco1.max_freq / freq; in gt215_pll_calc()
37 if (*P > info->max_p) in gt215_pll_calc()
38 *P = info->max_p; in gt215_pll_calc()
39 if (*P < info->min_p) in gt215_pll_calc()
40 *P = info->min_p; in gt215_pll_calc()
42 lM = (info->refclk + info->vco1.max_inputfreq) / info->vco1.max_inputfreq; in gt215_pll_calc()
43 lM = max(lM, (int)info->vco1.min_m); in gt215_pll_calc()
44 hM = (info->refclk + info->vco1.min_inputfreq) / info->vco1.min_inputfreq; in gt215_pll_calc()
45 hM = min(hM, (int)info->vco1.max_m); in gt215_pll_calc()
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/linux/drivers/watchdog/
H A Drti_wdt.c1 // SPDX-License-Identifier: GPL-2.0
5 * (c) Copyright 2019-2020 Texas Instruments Inc.
68 * @base - base io address of WD device
69 * @freq - source clock frequency of WDT
70 * @wdd - hold watchdog device as is in WDT core
74 unsigned long freq; member
84 ret = pm_runtime_resume_and_get(wdd->parent); in rti_wdt_start()
89 timer_margin = (u64)wdd->timeout * wdt->freq; in rti_wdt_start()
93 writel_relaxed(timer_margin, wdt->base + RTIDWDPRLD); in rti_wdt_start()
102 wdd->min_hw_heartbeat_ms = 520 * wdd->timeout + MAX_HW_ERROR; in rti_wdt_start()
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/linux/drivers/net/wireless/ath/ath9k/
H A Dar9002_phy.c2 * Copyright (c) 2008-2011 Atheros Communications Inc.
20 * AR5416 MAC based PCI devices and AR518 MAC based PCI-Express
27 * into a single-chip and require less programming.
29 * The following single-chips exist with a respective embedded radio:
31 * AR9280 - 11n dual-band 2x2 MIMO for PCIe
32 * AR9281 - 11n single-band 1x2 MIMO for PCIe
33 * AR9285 - 11n single-band 1x1 for PCIe
34 * AR9287 - 11n single-band 2x2 MIMO for PCIe
36 * AR9220 - 11n dual-band 2x2 MIMO for PCI
37 * AR9223 - 11n single-band 2x2 MIMO for PCI
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/linux/Documentation/admin-guide/pm/
H A Dintel-speed-select.rst1 .. SPDX-License-Identifier: GPL-2.0
14 - https://www.intel.com/content/www/us/en/architecture-and-technology/speed-select-technology-artic…
15 - https://builders.intel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enha…
19 dynamically without pre-configuring via BIOS setup options. This dynamic
29 intel-speed-select configuration tool
32 Most Linux distribution packages may include the "intel-speed-select" tool. If not,
38 # cd tools/power/x86/intel-speed-select/
43 ------------
47 # intel-speed-select --help
49 The top-level help describes arguments and features. Notice that there is a
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/linux/drivers/i2c/busses/
H A Di2c-meson.c1 // SPDX-License-Identifier: GPL-2.0-only
68 * struct meson_i2c - Meson I2C device private data
108 void (*set_clk_div)(struct meson_i2c *i2c, unsigned int freq);
116 data = readl(i2c->regs + reg); in meson_i2c_set_mask()
119 writel(data, i2c->regs + reg); in meson_i2c_set_mask()
124 i2c->tokens[0] = 0; in meson_i2c_reset_tokens()
125 i2c->tokens[1] = 0; in meson_i2c_reset_tokens()
126 i2c->num_tokens = 0; in meson_i2c_reset_tokens()
131 if (i2c->num_tokens < 8) in meson_i2c_add_token()
132 i2c->tokens[0] |= (token & 0xf) << (i2c->num_tokens * 4); in meson_i2c_add_token()
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/linux/tools/power/cpupower/man/
H A Dcpupower-frequency-set.11 .TH "CPUPOWER\-FREQUENCY\-SET" "1" "0.1" "" "cpupower Manual"
4 cpupower\-frequency\-set \- A small tool which allows to modify cpufreq settings.
7 cpupower [ \-c cpu ] frequency\-set [\fIoptions\fP]
10 cpupower frequency\-set allows you to modify cpufreq settings without having to type e.g. "/sys/dev…
14 \fB\-d\fR \fB\-\-min\fR <FREQ>
17 \fB\-u\fR \fB\-\-max\fR <FREQ>
20 \fB\-g\fR \fB\-\-governor\fR <GOV>
23 \fB\-f\fR \fB\-\-freq\fR <FREQ>
26 \fB\-r\fR \fB\-\-related\fR
27 modify all hardware-related CPUs at the same time
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/linux/tools/power/cpupower/po/
H A Dfr.po9 "Project-Id-Version: cpufrequtils 0.1-pre2\n"
10 "Report-Msgid-Bugs-To: \n"
11 "POT-Creation-Date: 2011-03-08 17:03+0100\n"
12 "PO-Revision-Date: 2004-11-17 15:53+1000\n"
13 "Last-Translator: Bruno Ducrot <ducrot@poupinou.org>\n"
14 "Language-Team: NONE\n"
16 "MIME-Version: 1.0\n"
17 "Content-Type: text/plain; charset=ISO-8859-1\n"
18 "Content-Transfer-Encoding: 8bit\n"
72 #: utils/idle_monitor/cpupower-monitor.c:66
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H A Dcs.po10 "Project-Id-Version: cs\n"
11 "Report-Msgid-Bugs-To: \n"
12 "POT-Creation-Date: 2011-03-08 17:03+0100\n"
13 "PO-Revision-Date: 2008-06-11 16:26+0200\n"
14 "Last-Translator: Karel Volný <kavol@seznam.cz>\n"
15 "Language-Team: Czech <diskuze@lists.l10n.cz>\n"
17 "MIME-Version: 1.0\n"
18 "Content-Type: text/plain; charset=UTF-8\n"
19 "Content-Transfer-Encoding: 8bit\n"
20 "Plural-Forms: nplurals=3; plural=(n==1) ? 0 : (n>=2 && n<=4) ? 1 : 2;\n"
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/linux/drivers/net/can/rockchip/
H A Drockchip_canfd-timestamp.c1 // SPDX-License-Identifier: GPL-2.0
4 // Marc Kleine-Budde <kernel@pengutronix.de>
24 ns = timecounter_cyc2time(&priv->tc, timestamp); in rkcanfd_skb_set_timestamp()
26 hwtstamps->hwtstamp = ns_to_ktime(ns); in rkcanfd_skb_set_timestamp()
35 timecounter_read(&priv->tc); in rkcanfd_timestamp_work()
37 schedule_delayed_work(&priv->timestamp, priv->work_delay_jiffies); in rkcanfd_timestamp_work()
42 const struct can_bittiming *dbt = &priv->can.fd.data_bittiming; in rkcanfd_timestamp_init()
43 const struct can_bittiming *bt = &priv->can.bittiming; in rkcanfd_timestamp_init()
44 struct cyclecounter *cc = &priv->cc; in rkcanfd_timestamp_init()
56 bitrate = max(bt->bitrate, dbt->bitrate); in rkcanfd_timestamp_init()
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