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/freebsd/sys/contrib/device-tree/Bindings/net/pcs/
H A Drenesas,rzn1-miic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/pcs/renesas,rzn1-miic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/N1 MII converter
10 - Clément Léger <clement.leger@bootlin.com>
13 This MII converter is present on the Renesas RZ/N1 SoC family. It is
14 responsible to do MII passthrough or convert it to RMII/RGMII.
17 '#address-cells':
20 '#size-cells':
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/freebsd/sys/contrib/device-tree/src/arm/renesas/
H A Dr9a06g032.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r9a06g032-sysctrl.h>
14 #address-cells = <1>;
15 #size-cell
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp1 //===- SIInstrInfo.cpp - SI Instruction Information ----------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
38 #define DEBUG_TYPE "si-instr-info"
54 BranchOffsetBits("amdgpu-s-branch-bits", cl::ReallyHidden, cl::init(16),
58 "amdgpu-fix-16-bit-physreg-copies",
69 //===----------------------------------------------------------------------===//
71 //===----------------------------------------------------------------------===//
74 unsigned N = Node->getNumOperands(); in getNumOperandsNoGlue()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp1 //===-- SystemZISelLowering.cpp - SystemZ DAG lowering implementation -----===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
35 #define DEBUG_TYPE "systemz-lower"
47 // Chain if this is a strict floating-point comparison.
127 setStackPointerRegisterToSaveRestore(Regs->getStackPointerRegister()); in SystemZTargetLowering()
129 // TODO: It may be better to default to latency-oriented scheduling, however in SystemZTargetLowering()
130 // LLVM's current latency-oriented scheduler can't handle physreg definitions in SystemZTargetLowering()
131 // such as SystemZ has with CC, so set this to the register-pressure in SystemZTargetLowering()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp1 //===- ARMISelLowering.cpp - ARM DAG Lowering Implementation --------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
122 #define DEBUG_TYPE "arm-isel"
131 ARMInterworking("arm-interworking", cl::Hidden,
136 "arm-promote-constant", cl::Hidden,
141 "arm-promote-constant-max-size", cl::Hidden,
145 "arm-promote-constant-max-total", cl::Hidden,
150 MVEMaxSupportedInterleaveFactor("mve-max-interleave-factor", cl::Hidden,
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