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/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dqcom,lpass-cpu.txt11 * "mi2s-osr-clk"
12 * "mi2s-bit-clk"
15 * "mi2s-bit-clk0"
16 * "mi2s-bit-clk1"
17 * "mi2s-bit-clk2"
18 * "mi2s-bit-clk3"
42 By default, the driver uses up to 4 MI2S SD lines, for a total of 8 channels.
61 clock-names = "ahbix-clk", "mi2s-osr-clk", "mi2s-bit-clk";
74 /* Optional to set different MI2S SD lines */
H A Dqcom,lpass-cpu.yaml15 of MI2S interface for audio data transfer on external codecs. LPASS cpu driver
94 description: list of MI2S data lines for playback
98 description: list of MI2S data lines for capture
132 - const: mi2s-osr-clk
133 - const: mi2s-bit-clk
149 - const: mi2s-bit-clk0
150 - const: mi2s-bit-clk1
151 - const: mi2s-bit-clk2
152 - const: mi2s-bit-clk3
173 - const: mi2s-bit-clk0
[all …]
H A Dqcom,sdm845.txt81 pri-mi2s-dai-link {
82 link-name = "PRI MI2S Playback";
H A Dgoogle,sc7280-herobrine.yaml148 link-name = "MI2S Playback";
H A Dqcom,q6dsp-lpass-ports.yaml128 # MI2S DAI ID range PRIMARY_MI2S_RX - QUATERNARY_MI2S_TX and
H A Dqcom,sm8250.yaml314 link-name = "Primary MI2S";
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dmsm8916.dtsi1357 pri_mi2s_default: mi2s-pri-default-state {
1364 pri_mi2s_sleep: mi2s-pri-sleep-state {
1371 pri_mi2s_mclk_default: mi2s-pri-mclk-default-state {
1378 pri_mi2s_mclk_sleep: mi2s-pri-mclk-sleep-state {
1385 pri_mi2s_ws_default: mi2s-pri-ws-default-state {
1392 pri_mi2s_ws_sleep: mi2s-pri-ws-sleep-state {
1399 sec_mi2s_default: mi2s-sec-default-state {
1406 sec_mi2s_sleep: mi2s-sec-sleep-state {
2062 * is actually only used by Tertiary MI2S while
2063 * Primary/Secondary MI2S bot
[all...]
H A Dmsm8939.dtsi1027 pri_mi2s_default: mi2s-pri-default-state {
1034 pri_mi2s_sleep: mi2s-pri-sleep-state {
1041 pri_mi2s_mclk_default: mi2s-pri-mclk-default-state {
1048 pri_mi2s_mclk_sleep: mi2s-pri-mclk-sleep-state {
1055 pri_mi2s_ws_default: mi2s-pri-ws-default-state {
1062 pri_mi2s_ws_sleep: mi2s-pri-ws-sleep-state {
1069 sec_mi2s_default: mi2s-sec-default-state {
1076 sec_mi2s_sleep: mi2s-sec-sleep-state {
1680 "mi2s-bit-clk0",
1681 "mi2s
[all...]
H A Dmsm8916-pins.dtsi470 /* secondary Mi2S */
H A Dsdm845.dtsi3201 quat_mi2s_sleep: quat-mi2s-sleep-state {
3208 quat_mi2s_active: quat-mi2s-active-state {
3216 quat_mi2s_sd0_sleep: quat-mi2s-sd0-sleep-state {
3223 quat_mi2s_sd0_active: quat-mi2s-sd0-active-state {
3230 quat_mi2s_sd1_sleep: quat-mi2s-sd1-sleep-state {
3237 quat_mi2s_sd1_active: quat-mi2s-sd1-active-state {
3244 quat_mi2s_sd2_sleep: quat-mi2s-sd2-sleep-state {
3251 quat_mi2s_sd2_active: quat-mi2s-sd2-active-state {
3258 quat_mi2s_sd3_sleep: quat-mi2s-sd3-sleep-state {
3265 quat_mi2s_sd3_active: quat-mi2s
[all...]
H A Dsc7180.dtsi2035 sec_mi2s_active: sec-mi2s-active-state {
2040 pri_mi2s_active: pri-mi2s-active-state {
2045 pri_mi2s_mclk_active: pri-mi2s-mclk-active-state {
2050 ter_mi2s_active: ter-mi2s-active-state {
3931 "mi2s-bit-clk0", "mi2s-bit-clk1";
H A Dsm8250.dtsi5150 pri_mi2s_active: pri-mi2s-active-state {
5666 tert_mi2s_active: tert-mi2s-active-state {
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dqcom,lcc.yaml57 - description: MI2S codec clock
91 - description: MI2S codec clock
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dqcom,msm8660-pinctrl.yaml74 hdmi, i2s, lcdc, mdp_vsync, mi2s, pcm, ps_hold, sdc1, sdc2,
H A Dqcom,apq8064-pinctrl.txt58 gsbi7_spi_cs2, gsbi7_spi_cs3, gsbi_cam_i2c, hdmi, mi2s, riva_bt, riva_fm,
H A Dqcom,ipq8064-pinctrl.txt59 mdio, mi2s, pdm, ssbi, spmi, audio_pcm, gpio, gsbi1, gsbi2, gsbi4, gsbi5,
H A Dqcom,msm8660-pinctrl.txt59 lcdc, mdp_vsync, mi2s, pcm, ps_hold, sdc1, sdc2, sdc5, tsif1, tsif2, usb_fs1,
H A Dqcom,msm8960-pinctrl.yaml82 mdp_vsync, mi2s, mic_i2s, pmb_clk, pmb_ext_ctrl, ps_hold,
H A Dqcom,msm8960-pinctrl.txt112 hdmi_hot_plug_detect, hsic, mdp_vsync, mi2s, mic_i2s,
/freebsd/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-ipq8064.dtsi1251 "mi2s-osr-clk",
1252 "mi2s-bit-clk";