Searched +full:meson8 +full:- +full:ao +full:- +full:arc (Results 1 – 5 of 5) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/remoteproc/ |
H A D | amlogic,meson-mx-ao-arc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/amlogic,meson-mx-ao-arc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Amlogic Meson AO ARC Remote Processor 10 Amlogic Meson6, Meson8, Meson8b and Meson8m2 SoCs embed an ARC core 11 controller for always-on operations, typically used for managing 12 system suspend. Meson6 and older use a ARC core based on the ARCv1 13 ISA, while Meson8, Meson8b and Meson8m2 use an ARC EM4 (ARCv2 ISA) 17 - Martin Blumenstingl <martin.blumenstingl@googlemail.com> [all …]
|
/freebsd/sys/contrib/device-tree/src/arm/amlogic/ |
H A D | meson8.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 6 #include <dt-bindings/clock/meson8-ddr-clkc.h> 7 #include <dt-bindings/clock/meson8b-clkc.h> 8 #include <dt-bindings/gpio/meson8-gpio.h> 9 #include <dt-bindings/power/meson8-power.h> 10 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h> 11 #include <dt-bindings/reset/amlogic,meson8b-reset.h> 12 #include <dt-bindings/thermal/thermal.h> 16 model = "Amlogic Meson8 SoC"; 17 compatible = "amlogic,meson8"; [all …]
|
H A D | meson8b.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 7 #include <dt-bindings/clock/meson8-ddr-clkc.h> 8 #include <dt-bindings/clock/meson8b-clkc.h> 9 #include <dt-bindings/gpio/meson8b-gpio.h> 10 #include <dt-bindings/power/meson8-power.h> 11 #include <dt-bindings/reset/amlogic,meson8b-reset.h> 12 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h> 13 #include <dt-bindings/thermal/thermal.h> 18 #address-cells = <1>; 19 #size-cells = <0>; [all …]
|
/freebsd/sys/contrib/device-tree/Bindings/arm/amlogic/ |
H A D | amlogic,meson-mx-secbus2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/arm/amlogic/amlogic,meson-mx-secbus2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Amlogic Meson8/Meson8b/Meson8m2 SECBUS2 register interface 10 - Martin Blumenstingl <martin.blumenstingl@googlemail.com> 13 The Meson8/Meson8b/Meson8m2 SoCs have a register bank called SECBUS2 which 14 contains registers for various IP blocks such as pin-controller bits for 15 the BSD_EN and TEST_N GPIOs as well as some AO ARC core control bits. 23 - enum: [all …]
|
/freebsd/sys/contrib/device-tree/Bindings/sram/ |
H A D | sram.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Generic on-chip SRAM 10 - Rob Herring <robh@kernel.org> 19 Following the generic-names recommended practice, node names should 30 - mmio-sram 31 - amlogic,meson-gxbb-sram 32 - arm,juno-sram-ns 33 - atmel,sama5d2-securam [all …]
|