memcpy\-channels (full) in projects: freebsd

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Searched +full:memcpy +full:- +full:channels (Results 1 – 25 of 158) sorted by relevance

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/freebsd/sys/contrib/device-tree/Bindings/dma/
H A D	ste-dma40.txt	4 - compatible: "stericsson,dma40" 5 - reg: Address range of the DMAC registers 6 - reg-names: Names of the above areas to use during resource look-up 7 - interrupt: Should contain the DMAC interrupt number 8 - #dma-cells: must be <3> 9 - memcpy-channels: Channels to be used for memcpy 12 - dma-channels: Number of channels supported by hardware - if not present 14 - disabled-channels: Channels which can not be used 18 dma: dma-controller@801c0000 { 19 compatible = "stericsson,db8500-dma40", "stericsson,dma40"; [all …]
H A D	stericsson,dma40.yaml	`1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ST-Ericsso [all...]`
H A D	ti-edma.txt	8 ------------------------------------------------------------------------------ 12 -------------------- 13 - compatible: Should be: 14 - "ti,edma3-tpcc" for the channel controller(s) on OMAP, 16 - "ti,k2g-edma3-tpcc", "ti,edma3-tpcc" for the 18 - #dma-cells: Should be set to <2>. The first number is the DMA request 20 - reg: Memory map of eDMA CC 21 - reg-names: "edma3_cc" 22 - interrupts: Interrupt lines for CCINT, MPERR and CCERRINT. 23 - interrupt-names: "edma3_ccint", "edma3_mperr" and "edma3_ccerrint" [all …]
H A D	qcom_hidma_mgmt.txt	4 memcpy and memset capabilities. It has been designed for virtualized 7 Each HIDMA HW instance consists of multiple DMA channels. These channels 9 among channels based on the priority and weight assignments. 18 - compatible: "qcom,hidma-mgmt-1.0"; 19 - reg: Address range for DMA device 20 - dma-channels: Number of channels supported by this DMA controller. 21 - max-write-burst-bytes: Maximum write burst in bytes that HIDMA can 22 occupy the bus for in a single transaction. A memcpy requested is 26 - max-read-burst-bytes: Maximum read burst in bytes that HIDMA can 27 occupy the bus for in a single transaction. A memcpy request is [all …]
H A D	arm-pl08x.txt	4 - compatible: "arm,pl080", "arm,primecell"; 7 - arm,primecell-periphid: on the FTDMAC020 the primecell ID is not hard-coded 11 - reg: Address range of the PL08x registers 12 - interrupt: The PL08x interrupt number 13 - clocks: The clock running the IP core clock 14 - clock-names: Must contain "apb_pclk" 15 - lli-bus-interface-ahb1: if AHB master 1 is eligible for fetching LLIs 16 - lli-bus-interface-ahb2: if AHB master 2 is eligible for fetching LLIs 17 - mem-bus-interface-ahb1: if AHB master 1 is eligible for fetching memory contents 18 - mem-bus-interface-ahb2: if AHB master 2 is eligible for fetching memory contents [all …]
H A D	lpc1850-dmamux.txt	4 - compatible: "nxp,lpc1850-dmamux" 5 - reg: Memory map for accessing module 6 - #dma-cells: Should be set to <3>. 8 * 2nd cell contain the mux value (0-3) for the peripheral 11 - dma-requests: Number of DMA requests for the mux 12 - dma-masters: phandle pointing to the DMA controller 15 - dma-requests: Number of DMA requests the controller can handle 20 compatible = "nxp,lpc1850-gpdma", "arm,pl080", "arm,primecell"; 21 arm,primecell-periphid = <0x00041080>; 25 clock-names = "apb_pclk"; [all …]
H A D	ti-dma-crossbar.txt	4 - compatible: "ti,dra7-dma-crossbar" for DRA7xx DMA crossbar 5 "ti,am335x-edma-crossbar" for AM335x and AM437x 6 - reg: Memory map for accessing module 7 - #dma-cells: Should be set to match with the DMA controller's dma-cells 8 for ti,dra7-dma-crossbar and <3> for ti,am335x-edma-crossbar. 9 - dma-requests: Number of DMA requests the crossbar can receive 10 - dma-masters: phandle pointing to the DMA controller 13 - dma-requests: Number of DMA requests the controller can handle 16 - ti,dma-safe-map: Safe routing value for unused request lines 17 - ti,reserved-dma-request-ranges: DMA request ranges which should not be used [all …]
/freebsd/sys/contrib/dev/iwlwifi/mvm/
H A D	scan.c	1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 3 * Copyright (C) 2012-2014, 2018-2024 Intel Corporation 4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 5 * Copyright (C) 2016-2017 Intel Deutschland GmbH 13 #include "iwl-i 87 struct ieee80211_channel *channels; global() member 677 iwl_mvm_lmac_scan_cfg_channels(struct iwl_mvm mvm,struct ieee80211_channel ** channels,int n_channels,u32 ssid_bitmap,struct iwl_scan_req_lmac * cmd) iwl_mvm_lmac_scan_cfg_channels() argument 1058 iwl_mvm_fill_channels(struct iwl_mvm * mvm,u8 * channels,u32 max_channels) iwl_mvm_fill_channels() argument 1581 iwl_mvm_umac_scan_cfg_channels(struct iwl_mvm * mvm,struct ieee80211_channel ** channels,int n_channels,u32 flags,struct iwl_scan_channel_cfg_umac * channel_cfg) iwl_mvm_umac_scan_cfg_channels() argument 1606 iwl_mvm_umac_scan_cfg_channels_v4(struct iwl_mvm * mvm,struct ieee80211_channel ** channels,struct iwl_scan_channel_params_v4 * cp,int n_channels,u32 flags,enum nl80211_iftype vif_type) iwl_mvm_umac_scan_cfg_channels_v4() argument 1635 iwl_mvm_umac_scan_cfg_channels_v7(struct iwl_mvm * mvm,struct ieee80211_channel ** channels,struct iwl_scan_channel_params_v7 * cp,int n_channels,u32 flags,enum nl80211_iftype vif_type,u32 version) iwl_mvm_umac_scan_cfg_channels_v7() argument [all...]
H A D	nvm.c	`1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 3 * Copyright (C) 2012-2014, 2018-2019, 2021-2024 Intel Corporation 4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH 5 * Copyright (C) 2016-201 [all...]`
/freebsd/contrib/wpa/src/drivers/
H A D	driver_hostap.c	3 * Copyright (c) 2003-2005, Jouni Malinen <j@w1.fi> 71 fc = le_to_host16(hdr->frame_control); in handle_data() 78 sa = hdr->addr2; in handle_data() 82 wpa_supplicant_event(drv->hapd, EVENT_RX_FROM_UNKNOWN, &event); in handle_data() 85 left = len - sizeof(*hdr); in handle_data() 97 left -= sizeof(rfc1042_header); in handle_data() 106 left -= 2; in handle_data() 109 drv_event_eapol_rx(drv->hapd, sa, pos, left); in handle_data() 127 fc = le_to_host16(hdr->frame_control); in handle_tx_callback() 132 event.tx_status.dst = hdr->addr1; in handle_tx_callback() [all …]
/freebsd/usr.sbin/bhyve/
H A D	audio.c	1 /- 2 SPDX-License-Identifier: BSD-2-Clause 65 * audio_init - initialize an instance of audio player 66 * @dev_name - the backend sound device used to play / capture 67 * @dir - dir = 1 for write mode, dir = 0 for read mode 92 if (nlen < sizeof(aud->dev_name)) in audio_init() 93 memcpy(aud->dev_name, dev_name, nlen + 1); in audio_init() 100 aud->dir = dir; in audio_init() 102 aud->fd = open(aud->dev_name, aud->dir ? O_WRONLY : O_RDONLY, 0); in audio_init() 103 if (aud->fd == -1) { in audio_init() [all …]
/freebsd/sys/net80211/
H A D	ieee80211_regdomain.c	1 /- 2 SPDX-License-Identifier: BSD-2-Clause 4 * Copyright (c) 2005-2008 Sam Leffler, Errno Consulting 53 if (maxchan > ic->ic_nchans) in null_getradiocaps() 54 maxchan = ic->ic_nchans; in null_getradiocaps() 55 memcpy(c, ic->ic_channels, maxchansizeof(struct ieee80211_channel)); in null_getradiocaps() 70 if (ic->ic_regdomain.regdomain == 0 && in ieee80211_regdomain_attach() 71 ic->ic_regdomain.country == CTRY_DEFAULT) { in ieee80211_regdomain_attach() 72 ic->ic_regdomain.location = ' '; / both */ in ieee80211_regdomain_attach() 75 ic->ic_getradiocaps = null_getradiocaps; in ieee80211_regdomain_attach() [all …]
H A D	ieee80211_scan_sta.c	`1 /- 2 SPDX-License-Identifier: BSD-2-Clause 4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 99 (((const uint8_t )(addr))[IEEE80211_ADDR_LEN - 1] % STA_HASHSIZE) 112 / ap-related state / 119 for use. If non-zero the entry was deemed not suitable and it's 174 TAILQ_INIT(&st->st_entry); in sta_attach() 175 ss->ss_priv = st; in sta_attach() 186 struct sta_table st = ss->ss_priv; in sta_detach() 194 nrefs--; / NB: we assume caller locking */ in sta_detach() [all …]`
/freebsd/share/man/man4/
H A D	xdma.4	5 .\" Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237 38 .Bd -ragged -offset indent 42 To compile xDMA FDT-based test driver, place the following line as well: 43 .Bd -literal -offset indent 54 device provides a virtual DMA controller and virtual channels called xchans. 55 The controller provides virtual channels management (allocation, deallocation, 60 .Bl -hang -offset indent -width xxxxxxxx 62 A non-stop periodic transfer designed for applications like audio. 63 .It Nm Memcpy 64 A memory-to-memory transfer. [all …]
/freebsd/sys/contrib/dev/iwlwifi/
H A D	iwl-eeprom-parse.c
/freebsd/sys/contrib/dev/athk/ath10k/
H A D	wow.c	1 // SPDX-License-Identifier: ISC 3 * Copyright (c) 2015-2017 Qualcomm Atheros, Inc. 14 #include "wmi-ops.h" 26 struct ath10k *ar = arvif->ar; in ath10k_wow_vif_cleanup() 30 ret = ath10k_wmi_wow_add_wakeup_event(ar, arvif->vdev_id, i, 0); in ath10k_wow_vif_cleanup() 33 wow_wakeup_event(i), arvif->vdev_id, ret); in ath10k_wow_vif_cleanup() 38 for (i = 0; i < ar->wow.max_num_patterns; i++) { in ath10k_wow_vif_cleanup() 39 ret = ath10k_wmi_wow_del_pattern(ar, arvif->vdev_id, i); in ath10k_wow_vif_cleanup() 42 i, arvif->vdev_id, ret); in ath10k_wow_vif_cleanup() 55 lockdep_assert_held(&ar->conf_mutex); in ath10k_wow_cleanup() [all …]
/freebsd/sys/contrib/dev/mediatek/mt76/
H A D	mt76_connac_mcu.c	1 // SPDX-License-Identifier: ISC 108 struct mt76_dev *dev = phy->dev; in mt76_connac_mcu_set_channel_domain() 112 n_max_channels = phy->sband_2g.sband.n_channels + in mt76_connac_mcu_set_channel_domain() 113 phy->sband_5g.sband.n_channels + in mt76_connac_mcu_set_channel_domain() 114 phy->sband_6g.sband.n_channels; in mt76_connac_mcu_set_channel_domain() 119 return -ENOMEM; in mt76_connac_mcu_set_channel_domain() 123 for (i = 0; i < phy->sband_2g.sband.n_channels; i++) { in mt76_connac_mcu_set_channel_domain() 124 chan = &phy->sband_2g.sband.channels[i]; in mt76_connac_mcu_set_channel_domain() 125 if (chan->flags & IEEE80211_CHAN_DISABLED) in mt76_connac_mcu_set_channel_domain() 128 channel.hw_value = cpu_to_le16(chan->hw_value); in mt76_connac_mcu_set_channel_domain() [all …]
/freebsd/sys/contrib/dev/mediatek/mt76/mt7925/
H A D	mcu.c	1 // SPDX-License-Identifier: ISC 25 dev_err(mdev->dev, "Message %08x (seq %d) timeout\n", cmd, seq); in mt7925_mcu_parse_response() 28 return -ETIMEDOUT; in mt7925_mcu_parse_response() 31 rxd = (struct mt7925_mcu_rxd )skb->data; in mt7925_mcu_parse_response() 32 if (seq != rxd->seq) in mt7925_mcu_parse_response() 33 return -EAGAIN; in mt7925_mcu_parse_response() 37 skb_pull(skb, sizeof(rxd) - 4); in mt7925_mcu_parse_response() 38 ret = skb->data; in mt7925_mcu_parse_response() 47 event = (struct mt7925_mcu_uni_event )skb->data; in mt7925_mcu_parse_response() 48 ret = le32_to_cpu(event->status); in mt7925_mcu_parse_response() [all …]
/freebsd/sys/dev/mlx5/mlx5_en/
H A D	mlx5_en_ethtool.c	1 /- 2 Copyright (c) 2015-2021 Mellanox Technologies. All rights reserved. 84 uint64_t max = priv->params_ethtool.tx_queue_size / in mlx5e_ethtool_sync_tx_completion_fact() 90 * 16-bits. in mlx5e_ethtool_sync_tx_completion_fact() 96 priv->params_ethtool.tx_completion_fact_max = max; in mlx5e_ethtool_sync_tx_completion_fact() 102 if (priv->params_ethtool.tx_completion_fact < 1) in mlx5e_ethtool_sync_tx_completion_fact() 103 priv->params_ethtool.tx_completion_fact = 1; in mlx5e_ethtool_sync_tx_completion_fact() 104 else if (priv->params_ethtool.tx_completion_fact > max) in mlx5e_ethtool_sync_tx_completion_fact() 105 priv->params_ethtool.tx_completion_fact = max; in mlx5e_ethtool_sync_tx_completion_fact() 111 struct mlx5_core_dev *mdev = priv->mdev; in mlx5e_getmaxrate() [all …]
/freebsd/sys/contrib/dev/athk/ath11k/
H A D	wow.c	1 // SPDX-License-Identifier: BSD-3-Clause-Clear 4 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. 34 clear_bit(ATH11K_FLAG_HTC_SUSPEND_COMPLETE, &ab->dev_flags); in ath11k_wow_enable() 37 reinit_completion(&ab->htc_suspend); in ath11k_wow_enable() 45 ret = wait_for_completion_timeout(&ab->htc_suspend, 3 * HZ); in ath11k_wow_enable() 49 return -ETIMEDOUT; in ath11k_wow_enable() 52 if (test_bit(ATH11K_FLAG_HTC_SUSPEND_COMPLETE, &ab->dev_flags)) in ath11k_wow_enable() 63 return -ETIMEDOUT; in ath11k_wow_enable() 75 if (ab->hw_params.smp2p_wow_exit) in ath11k_wow_wakeup() 78 reinit_completion(&ab->wow.wakeup_completed); in ath11k_wow_wakeup() [all …]
/freebsd/sys/contrib/dev/rtw88/
H A D	wow.c	1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* Copyright(c) 2018-2019 Realtek Corporation 17 .pattern_idx = -1, in rtw_wow_show_wakeup_reason() 57 ieee80211_report_wowlan_wakeup(rtwdev->wow.wow_vif, NULL, in rtw_wow_show_wakeup_reason() 61 ieee80211_report_wowlan_wakeup(rtwdev->wow.wow_vif, &wakeup, in rtw_wow_show_wakeup_reason() 85 wdata = rtw_pattern->mask[i * 4]; in rtw_wow_pattern_write_cam_ent() 86 wdata \|= rtw_pattern->mask[i * 4 + 1] << 8; in rtw_wow_pattern_write_cam_ent() 87 wdata \|= rtw_pattern->mask[i * 4 + 2] << 16; in rtw_wow_pattern_write_cam_ent() 88 wdata \|= rtw_pattern->mask[i * 4 + 3] << 24; in rtw_wow_pattern_write_cam_ent() 92 wdata = rtw_pattern->crc; in rtw_wow_pattern_write_cam_ent() [all …]
/freebsd/sys/compat/linuxkpi/common/src/
H A D	linux_hdmi.c	17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 46 return 256 - csum; in hdmi_infoframe_checksum() 57 * hdmi_avi_infoframe_init() - initialize an HDMI AVI infoframe 64 frame->type = HDMI_INFOFRAME_TYPE_AVI; in hdmi_avi_infoframe_init() 65 frame->version = 2; in hdmi_avi_infoframe_init() 66 frame->length = HDMI_AVI_INFOFRAME_SIZE; in hdmi_avi_infoframe_init() 72 if (frame->type != HDMI_INFOFRAME_TYPE_AVI \|\| in hdmi_avi_infoframe_check_only() 73 frame->version != 2 \|\| in hdmi_avi_infoframe_check_only() 74 frame->length != HDMI_AVI_INFOFRAME_SIZE) in hdmi_avi_infoframe_check_only() 75 return -EINVAL; in hdmi_avi_infoframe_check_only() [all …]
/freebsd/sys/arm/nvidia/drm2/
H A D	hdmi.c	17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 44 return 256 - csum; in hdmi_infoframe_checksum() 55 * hdmi_avi_infoframe_init() - initialize an HDMI AVI infoframe 64 frame->type = HDMI_INFOFRAME_TYPE_AVI; in hdmi_avi_infoframe_init() 65 frame->version = 2; in hdmi_avi_infoframe_init() 66 frame->length = HDMI_AVI_INFOFRAME_SIZE; in hdmi_avi_infoframe_init() 73 * hdmi_avi_infoframe_pack() - write HDMI AVI infoframe to binary buffer 92 length = HDMI_INFOFRAME_HEADER_SIZE + frame->length; in hdmi_avi_infoframe_pack() 95 return -ENOSPC; in hdmi_avi_infoframe_pack() 99 ptr[0] = frame->type; in hdmi_avi_infoframe_pack() [all …]
/freebsd/sys/contrib/dev/athk/
H A D	regd.c	2 * Copyright (c) 2008-2009 Atheros Communications Inc. 35 /* Only these channels all allow active scan on all world regulatory domains */ 36 #define ATH_2GHZ_CH01_11 REG_RULE(2412-10, 2462+10, 40, 0, 20, 0) 39 #define ATH_2GHZ_CH12_13 REG_RULE(2467-10, 2472+10, 40, 0, 20,\ 41 #define ATH_2GHZ_CH14 REG_RULE(2484-10, 2484+10, 40, 0, 20,\ 46 #define ATH_5GHZ_5150_5350 REG_RULE(5150-10, 5350+10, 80, 0, 30,\ 48 #define ATH_5GHZ_5470_5850 REG_RULE(5470-10, 5850+10, 80, 0, 30,\ 50 #define ATH_5GHZ_5725_5850 REG_RULE(5725-10, 5850+10, 80, 0, 30,\ 122 switch (reg->country_code) { in dynamic_country_user_possible() 207 return reg->current_rd & ~WORLDWIDE_ROAMING_FLAG; in ath_regd_get_eepromRD() [all …]
/freebsd/sys/contrib/dev/athk/ath12k/
H A D	reg.c	1 // SPDX-License-Identifier: BSD-3-Clause-Clear 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. 11 #define ATH12K_2GHZ_CH01_11 REG_RULE(2412 - 10, 2462 + 10, 40, 0, 20, 0) 12 #define ATH12K_5GHZ_5150_5350 REG_RULE(5150 - 10, 5350 + 10, 80, 0, 30,\ 14 #define ATH12K_5GHZ_5725_5850 REG_RULE(5725 - 10, 5850 + 10, 80, 0, 30,\ 35 regd = rcu_dereference_rtnl(ar->hw->wiphy->regd); in ath12k_regdom_changes() 43 return memcmp(regd->alpha2, alpha2, 2) != 0; in ath12k_regdom_changes() 51 struct ath12k *ar = hw->priv; in ath12k_reg_notifier() 54 ath12k_dbg(ar->ab, ATH12K_DBG_REG, in ath12k_reg_notifier() [all …]

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