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/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,mdp5.yaml4 $id: http://devicetree.org/schemas/display/msm/qcom,mdp5.yaml#
7 title: Qualcomm Adreno/Snapdragon Mobile Display controller (MDP5)
10 MDP5 display controller found in SoCs like MSM8974, APQ8084, MSM8916, MSM8994
20 - const: qcom,mdp5
24 - qcom,apq8084-mdp5
25 - qcom,msm8226-mdp5
26 - qcom,msm8916-mdp5
27 - qcom,msm8917-mdp5
28 - qcom,msm8937-mdp5
29 - qcom,msm8953-mdp5
[all …]
/linux/drivers/gpu/drm/msm/
H A DNOTES7 + MDP5 - snapdragon 800
49 For MDP5, the mapping is:
60 Also unlike MDP4, with MDP5 all the IRQs for other blocks (HDMI, DSI,
63 And finally, MDP5 has this "Shared Memory Pool" (called "SMP"), from
/linux/drivers/gpu/drm/msm/registers/display/
H A Dmsm.xml20 <import file="mdp5.xml"/>
H A Dmdp_common.xml8 <!-- random bits that seem same between mdp4 and mdp5 (ie. not much) -->
/linux/drivers/gpu/drm/msm/disp/mdp5/
H A Dmdp5_pipe.h10 /* TODO: Add SSPP_MAX in mdp5.xml.h */
H A Dmdp5_kms.h13 #include "mdp5_cfg.h" /* must be included before mdp5.xml.h */
14 #include "mdp5.xml.h"
H A Dmdp5_cfg.h14 * This module configures the dynamic offsets used by mdp5.xml.h
H A Dmdp5_pipe.c36 * (1) mdp5 can have SMP (non-double-buffered) in mdp5_pipe_assign()
/linux/drivers/gpu/drm/msm/disp/
H A Dmdp_kms.c35 /* if an mdp_irq's irqmask has changed, such as when mdp5 crtc<->encoder