Searched +full:mclk0 +full:- +full:pins (Results 1 – 12 of 12) sorted by relevance
/linux/arch/mips/boot/dts/mobileye/ |
H A D | eyeq5-pins.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 9 timer0_pins: timer0-pins { 11 pins = "PA0", "PA1"; 13 timer1_pins: timer1-pins { 15 pins = "PA2", "PA3"; 17 timer2_pins: timer2-pins { 19 pins = "PA4", "PA5"; 21 pps0_pins: pps0-pin { 23 pins = "PA4"; 25 pps1_pins: pps1-pin { [all …]
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/linux/Documentation/devicetree/bindings/soc/mobileye/ |
H A D | mobileye,eyeq5-olb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/mobileye/mobileye,eyeq5-olb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Grégory Clement <gregory.clement@bootlin.com> 11 - Théo Lebrun <theo.lebrun@bootlin.com> 12 - Vladimir Kondratiev <vladimir.kondratiev@mobileye.com> 22 - enum: 23 - mobileye,eyeq5-olb 24 - mobileye,eyeq6l-olb [all …]
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/linux/arch/arm64/boot/dts/exynos/ |
H A D | exynos850-pinctrl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung's Exynos850 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos850 SoC pin-mux and pin-config options are listed as device 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include "exynos-pinctrl.h" 16 gpa0: gpa0-gpio-bank { 17 gpio-controller; 18 #gpio-cells = <2>; 20 interrupt-controller; 21 #interrupt-cells = <2>; [all …]
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/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | qcom,sdm845-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/qcom,sdm845-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 17 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# 21 const: qcom,sdm845-pinctrl 29 gpio-reserved-ranges: 33 gpio-line-names: [all …]
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/linux/arch/arm64/boot/dts/qcom/ |
H A D | msm8998-xiaomi-sagit.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Xiaomi Mi 6 (sagit) device tree source based on msm8998-mtp.dtsi 10 /dts-v1/; 16 #include <dt-bindings/input/input.h> 17 #include <dt-bindings/leds/common.h> 18 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 24 /delete-node/ &adsp_mem; 25 /delete-node/ &mpss_mem; 26 /delete-node/ &venus_mem; 27 /delete-node/ &mba_mem; [all …]
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H A D | msm8998-sony-xperia-yoshino.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/leds/common.h> 10 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 18 qcom,msm-id = <0x124 0x20000>, <0x124 0x20001>; /* 8998v2, v2.1 */ 19 qcom,board-id = <8 0>; 23 compatible = "gpio-gate-clock"; 24 pinctrl-0 = <&div_clk1>; 25 pinctrl-names = "default"; 27 #clock-cells = <0>; [all …]
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8mq-tqma8mq-mba8mx.dts | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright 2019-2021 TQ-Systems GmbH 6 /dts-v1/; 8 #include "imx8mq-tqma8mq.dtsi" 12 model = "TQ-Systems GmbH i.MX8MQ TQMa8MQ on MBa8Mx"; 13 compatible = "tq,imx8mq-tqma8mq-mba8mx", "tq,imx8mq-tqma8mq", "fsl,imx8mq"; 14 chassis-type = "embedded"; 24 extcon_usbotg: extcon-usbotg0 { 25 compatible = "linux,extcon-usb-gpio"; 26 pinctrl-names = "default"; [all …]
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H A D | imx8mm-ucm-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 /dts-v1/; 8 #include <dt-bindings/leds/common.h> 18 stdout-path = &uart3; 22 compatible = "pwm-backlight"; 24 brightness-levels = <0 255>; 25 num-interpolated-steps = <255>; 26 default-brightness-level = <222>; 31 compatible = "gpio-leds"; 32 pinctrl-names = "default"; [all …]
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/linux/arch/arm64/boot/dts/amlogic/ |
H A D | meson-libretech-cottonwood.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/clock/g12a-clkc.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/leds/common.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/gpio/meson-g12a-gpio.h> 12 #include <dt-bindings/sound/meson-g12a-toacodec.h> 13 #include <dt-bindings/sound/meson-g12a-tohdmitx.h> 28 stdout-path = "serial0:115200n8"; 31 dioo2133: audio-amplifier-0 { [all …]
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/linux/drivers/pinctrl/ |
H A D | pinctrl-eyeq5.c | 1 // SPDX-License-Identifier: GPL-2.0-only 7 * pull-down, pull-up, drive strength and muxing. 10 * that is pin-dependent. Functions are declared statically in this driver. 12 * We create pinctrl groups that are 1:1 equivalent to pins: each group has a 15 * We use eq5p_ as prefix, as-in "EyeQ5 Pinctrl", but way shorter. 33 #include <linux/pinctrl/pinconf-generic.h> 39 #include "pinctrl-utils.h" 198 PINCTRL_PINFUNCTION("mclk0", mclk0_groups, ARRAY_SIZE(mclk0_groups)), 205 void __iomem *ptr = pctrl->base + eq5p_regs[bank][reg]; in eq5p_update_bits() 213 u32 val = readl(pctrl->base + eq5p_regs[bank][reg]); in eq5p_test_bit() [all …]
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/linux/sound/soc/fsl/ |
H A D | fsl_sai.c | 1 // SPDX-License-Identifier: GPL-2.0+ 5 // Copyright 2012-2015 Freescale Semiconductor, Inc. 22 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h> 26 #include "imx-pcm.h" 44 * fsl_sai_dir_is_synced - Check if stream is synced by the opposite stream 58 return !sai->synchronous[dir] && sai->synchronous[adir]; in fsl_sai_dir_is_synced() 65 if (sai->is_pdm_mode) { in fsl_sai_get_pins_state() 68 state = pinctrl_lookup_state(sai->pinctrl, "dsd512"); in fsl_sai_get_pins_state() 72 state = pinctrl_lookup_state(sai->pinctrl, "dsd"); in fsl_sai_get_pins_state() 76 state = pinctrl_lookup_state(sai->pinctrl, "pcm_b2m"); in fsl_sai_get_pins_state() [all …]
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/linux/drivers/pinctrl/meson/ |
H A D | pinctrl-meson-g12a.c | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 10 #include <dt-bindings/gpio/meson-g12a-gpio.h> 11 #include <dt-bindings/interrupt-controller/amlogic,meson-g12a-gpio-intc.h> 12 #include "pinctrl-meson.h" 13 #include "pinctrl-meson-axg-pmx.h" 381 /* mclk0 */ 1291 FUNCTION(mclk0), 1372 pc->reg_pull = pc->reg_gpio; in meson_g12a_aobus_parse_dt_extra() 1373 pc->reg_pullen = pc->reg_gpio; in meson_g12a_aobus_parse_dt_extra() 1379 .name = "periphs-banks", [all …]
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