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/linux/sound/soc/codecs/
H A Dda9055.c1 // SPDX-License-Identifier: GPL-2.0-or-later
58 /* Input - Gain, Select and Filter Registers */
71 /* Output - Gain, Select and Filter Registers */
249 /* for MASTER mode, fs = 44.1Khz and its harmonics */
250 {11289600, 2822400, 0x00, 0x00, 0x20, 1}, /* MCLK=11.2896Mhz */
251 {12000000, 2822400, 0x03, 0x61, 0x1E, 1}, /* MCLK=12Mhz */
252 {12288000, 2822400, 0x0C, 0xCC, 0x1D, 1}, /* MCLK=12.288Mhz */
253 {13000000, 2822400, 0x19, 0x45, 0x1B, 1}, /* MCLK=13Mhz */
254 {13500000, 2822400, 0x18, 0x56, 0x1A, 1}, /* MCLK=13.5Mhz */
255 {14400000, 2822400, 0x02, 0xD0, 0x19, 1}, /* MCLK=14.4Mhz */
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H A Dnau8325.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // nau8325.c -- Nuvoton NAU8325 audio codec driver
25 /* Range of Master Clock MCLK (Hz) */
29 /* scaling for MCLK source */
30 #define CLK_PROC_BYPASS (-1)
35 /* from MCLK input */
70 /* { FS, range, max, { MCLK source }} */
192 static const DECLARE_TLV_DB_MINMAX_MUTE(dac_vol_tlv, -8000, 600);
219 snd_soc_dapm_to_component(w->dapm); in nau8325_dac_event()
224 regmap_update_bits(nau8325->regmap, NAU8325_R12_MUTE_CTRL, in nau8325_dac_event()
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H A Dda7210.c1 // SPDX-License-Identifier: GPL-2.0+
222 /* for MASTER mode, fs = 44.1Khz */
223 { 12000000, 2822400, 0xE8, 0x6C, 0x2, 1}, /* MCLK=12Mhz */
224 { 13000000, 2822400, 0xDF, 0x28, 0xC, 1}, /* MCLK=13Mhz */
225 { 13500000, 2822400, 0xDB, 0x0A, 0xD, 1}, /* MCLK=13.5Mhz */
226 { 14400000, 2822400, 0xD4, 0x5A, 0x2, 1}, /* MCLK=14.4Mhz */
227 { 19200000, 2822400, 0xBB, 0x43, 0x9, 1}, /* MCLK=19.2Mhz */
228 { 19680000, 2822400, 0xB9, 0x6D, 0xA, 1}, /* MCLK=19.68Mhz */
229 { 19800000, 2822400, 0xB8, 0xFB, 0xB, 1}, /* MCLK=19.8Mhz */
230 /* for MASTER mode, fs = 48Khz */
[all …]
H A Dak4375.c1 // SPDX-License-Identifier: GPL-2.0-or-later
23 #define PMCP2 BIT(1) /* Charge Pump 2: Class-G HP Amp */
118 * from -12.5 to 3 dB in 0.5 dB steps (mute instead of -12.5 dB)
120 static DECLARE_TLV_DB_SCALE(dac_tlv, -1250, 50, 0);
123 * HP-Amp Analog volume control:
124 * from -4.2 to 6 dB in 2 dB steps (mute instead of -4.2 dB)
126 static DECLARE_TLV_DB_SCALE(hpg_tlv, -4200, 20, 0);
132 "+-VDD Operation",
133 "+-1/2VDD Operation"
138 * 0, 0 : Sharp Roll-Off Filter
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H A Dsti-sas.c1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <sound/soc-dapm.h>
20 /* sysconf 5041: Audio-Gue-Control */
22 /* sysconf 5042: Audio-DAC-Control */
54 int mclk; member
59 int mclk; member
84 status = regmap_read(drvdata->dac.regmap, reg, &val); in sti_sas_read_reg()
96 return regmap_write(drvdata->dac.regmap, reg, value); in sti_sas_write_reg()
108 /* Initialise bi-phase formatter to disabled */ in sti_sas_init_sas_registers()
113 /* Initialise bi-phase formatter idle value to 0 */ in sti_sas_init_sas_registers()
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H A Dnau8822.c1 // SPDX-License-Identifier: GPL-2.0
3 // nau8822.c -- NAU8822 ALSA Soc Audio driver
8 // Co-author: John Hsu <kchsu0@nuvoton.com>
9 // Co-author: Seven Li <wtli@nuvoton.com>
185 struct soc_bytes_ext *params = (void *)kcontrol->private_value; in nau8822_eq_get()
190 val = (u16 *)ucontrol->value.bytes.data; in nau8822_eq_get()
192 for (i = 0; i < params->max / sizeof(u16); i++) { in nau8822_eq_get()
194 /* conversion of 16-bit integers between native CPU format in nau8822_eq_get()
206 * cut-off frequency, bandwidth control, and equalizer path.
217 struct soc_bytes_ext *params = (void *)kcontrol->private_value; in nau8822_eq_put()
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H A Dda7218.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * da7218.c - DA7218 ALSA SoC Codec Driver
22 #include <sound/soc-dapm.h>
37 static const DECLARE_TLV_DB_SCALE(da7218_mic_gain_tlv, -600, 600, 0);
38 static const DECLARE_TLV_DB_SCALE(da7218_mixin_gain_tlv, -450, 150, 0);
39 static const DECLARE_TLV_DB_SCALE(da7218_in_dig_gain_tlv, -8325, 75, 0);
40 static const DECLARE_TLV_DB_SCALE(da7218_ags_trigger_tlv, -9000, 600, 0);
42 static const DECLARE_TLV_DB_SCALE(da7218_alc_threshold_tlv, -9450, 150, 0);
47 static const DECLARE_TLV_DB_SCALE(da7218_dmix_gain_tlv, -4200, 150, 0);
50 static const DECLARE_TLV_DB_SCALE(da7218_dgs_trigger_tlv, -9450, 150, 0);
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H A Dadau17x1.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2011-2014 Analog Devices Inc.
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
26 #include "adau-utils.h"
48 static const DECLARE_TLV_DB_MINMAX(adau17x1_digital_tlv, -9563, 0);
60 SOC_SINGLE("Playback De-emphasis Switch", ADAU17X1_DAC_CONTROL0,
74 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in adau17x1_pll_event()
78 adau->pll_regs[5] = 1; in adau17x1_pll_event()
80 adau->pll_regs[5] = 0; in adau17x1_pll_event()
83 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL, in adau17x1_pll_event()
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/linux/Documentation/devicetree/bindings/sound/
H A Dloongson,ls-audio-card.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/loongson,ls-audio-card.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Yingkun Meng <mengyingkun@loongson.cn>
19 const: loongson,ls-audio-card
25 mclk-fs:
26 $ref: simple-card.yaml#/definitions/mclk-fs
33 sound-dai:
36 - sound-dai
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H A Daudio-graph-port.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/audio-graph-port.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
15 port-base:
17 - $ref: /schemas/graph.yaml#/$defs/port-base
18 - $ref: /schemas/sound/dai-params.yaml#
20 mclk-fs:
21 $ref: simple-card.yaml#/definitions/mclk-fs
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H A Dnuvoton,nau8325.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Seven Lee <WTLI@nuvoton.com>
13 - $ref: dai-common.yaml#
22 nuvoton,vref-impedance-ohms:
25 Tie-Off selection options. Due to the high impedance of the VREF
26 pin, it is important to use a low-leakage capacitor.
30 nuvoton,dac-vref-microvolt:
39 nuvoton,alc-enable:
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H A Damlogic,gx-sound-card.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/amlogic,gx-sound-card.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jerome Brunet <jbrunet@baylibre.com>
13 - $ref: sound-card-common.yaml#
18 - const: amlogic,gx-sound-card
20 audio-aux-devs:
21 $ref: /schemas/types.yaml#/definitions/phandle-array
24 audio-widgets:
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/linux/Documentation/devicetree/bindings/media/i2c/
H A Dtda1997x.txt1 Device-Tree bindings for the NXP TDA1997x HDMI receiver
6 - RGB 8bit per color (24 bits total): R[11:4] B[11:4] G[11:4]
7 - YUV444 8bit per color (24 bits total): Y[11:4] Cr[11:4] Cb[11:4]
8 - YUV422 semi-planar 8bit per component (16 bits total): Y[11:4] CbCr[11:4]
9 - YUV422 semi-planar 10bit per component (20 bits total): Y[11:2] CbCr[11:2]
10 - YUV422 semi-planar 12bit per component (24 bits total): - Y[11:0] CbCr[11:0]
11 - YUV422 BT656 8bit per component (8 bits total): YCbCr[11:4] (2-cycles)
12 - YUV422 BT656 10bit per component (10 bits total): YCbCr[11:2] (2-cycles)
13 - YUV422 BT656 12bit per component (12 bits total): YCbCr[11:0] (2-cycles)
16 - RGB 12bit per color (36 bits total): R[11:0] B[11:0] G[11:0]
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/linux/sound/soc/mxs/
H A Dmxs-saif.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/dma-mapping.h>
13 #include <linux/clk-provider.h>
22 #include "mxs-saif.h"
32 * For MXS, two SAIF modules are instantiated on-chip.
34 * mode simultaneously if they are connected to different off-chip codecs.
43 * The master id is provided in mach-specific layer according to different
54 saif->mclk = freq; in mxs_saif_set_dai_sysclk()
57 return -EINVAL; in mxs_saif_set_dai_sysclk()
70 return mxs_saif[saif->master_id]; in mxs_saif_get_master()
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H A Dmxs-sgtl5000.c1 // SPDX-License-Identifier: GPL-2.0-or-later
13 #include <sound/soc-dapm.h>
16 #include "mxs-saif.h"
25 u32 mclk; in mxs_sgtl5000_hw_params() local
28 /* sgtl5000 does not support 512*rate when in 96000 fs */ in mxs_sgtl5000_hw_params()
31 mclk = 256 * rate; in mxs_sgtl5000_hw_params()
34 mclk = 512 * rate; in mxs_sgtl5000_hw_params()
38 /* Set SGTL5000's SYSCLK (provided by SAIF MCLK) */ in mxs_sgtl5000_hw_params()
39 ret = snd_soc_dai_set_sysclk(codec_dai, SGTL5000_SYSCLK, mclk, 0); in mxs_sgtl5000_hw_params()
41 dev_err(codec_dai->dev, "Failed to set sysclk to %u.%03uMHz\n", in mxs_sgtl5000_hw_params()
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/linux/sound/soc/meson/
H A Daiu-encoder-i2s.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <sound/soc-dai.h>
58 return -EINVAL; in aiu_encoder_i2s_setup_desc()
68 return -EINVAL; in aiu_encoder_i2s_setup_desc()
94 dev_err(component->dev, "Unsupported i2s divider: %u\n", bs); in aiu_encoder_i2s_set_legacy_div()
95 return -EINVAL; in aiu_encoder_i2s_set_legacy_div()
117 * In most configuration, the i2s divider is 'mclk / blck'. in aiu_encoder_i2s_set_more_div()
118 * However, in 16 bits - 8ch mode, this factor needs to be in aiu_encoder_i2s_set_more_div()
124 dev_err(component->dev, in aiu_encoder_i2s_set_more_div()
126 return -EINVAL; in aiu_encoder_i2s_set_more_div()
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/linux/sound/soc/loongson/
H A Dloongson_i2s.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/dma-mapping.h>
41 mask = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ? in loongson_i2s_trigger()
43 regmap_update_bits(i2s->regmap, LS_I2S_CTRL, mask, mask); in loongson_i2s_trigger()
48 mask = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ? in loongson_i2s_trigger()
50 regmap_update_bits(i2s->regmap, LS_I2S_CTRL, mask, 0); in loongson_i2s_trigger()
53 ret = -EINVAL; in loongson_i2s_trigger()
64 u32 clk_rate = i2s->clk_rate; in loongson_i2s_hw_params()
65 u32 sysclk = i2s->sysclk; in loongson_i2s_hw_params()
68 u32 fs = params_rate(params); in loongson_i2s_hw_params() local
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H A Dloongson_card.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <sound/soc-acpi.h>
27 struct loongson_card_data *ls_card = snd_soc_card_get_drvdata(rtd->card); in loongson_card_hw_params()
30 int ret, mclk; in loongson_card_hw_params() local
32 if (!ls_card->mclk_fs) in loongson_card_hw_params()
35 mclk = ls_card->mclk_fs * params_rate(params); in loongson_card_hw_params()
36 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, mclk, SND_SOC_CLOCK_OUT); in loongson_card_hw_params()
38 dev_err(codec_dai->dev, "cpu_dai clock not set\n"); in loongson_card_hw_params()
42 ret = snd_soc_dai_set_sysclk(codec_dai, 0, mclk, SND_SOC_CLOCK_IN); in loongson_card_hw_params()
44 dev_err(codec_dai->dev, "codec_dai clock not set\n"); in loongson_card_hw_params()
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/linux/sound/soc/stm/
H A Dstm32_sai_sub.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
10 #include <linux/clk-provider.h>
41 #define STM_SAI_IS_PLAYBACK(ip) ((ip)->dir == SNDRV_PCM_STREAM_PLAYBACK)
42 #define STM_SAI_IS_CAPTURE(ip) ((ip)->dir == SNDRV_PCM_STREAM_CAPTURE)
47 #define STM_SAI_IS_SUB_A(x) ((x)->id == STM_SAI_A_ID)
53 #define STM_SAI_PROTOCOL_IS_SPDIF(ip) ((ip)->spdif)
54 #define STM_SAI_HAS_SPDIF(x) ((x)->pdata->conf.has_spdif_pdm)
55 #define STM_SAI_HAS_PDM(x) ((x)->pdata->conf.has_spdif_pdm)
56 #define STM_SAI_HAS_EXT_SYNC(x) (!STM_SAI_IS_F4((x)->pdata))
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/linux/arch/arm/boot/dts/st/
H A Dstihxxx-b2120.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <dt-bindings/clock/stih407-clks.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/media/c8sectpfe.h>
11 compatible = "gpio-leds";
12 led-red {
15 linux,default-trigger = "heartbeat";
17 led-green {
19 default-state = "off";
24 compatible = "simple-audio-card";
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/linux/arch/arm/boot/dts/intel/pxa/
H A Dpxa300-raumfeld-connector.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "pxa300-raumfeld-common.dtsi"
6 #include "pxa300-raumfeld-tuneable-clock.dtsi"
10 compatible = "raumfeld,raumfeld-connector-pxa303", "marvell,pxa300";
13 compatible = "simple-audio-card";
14 simple-audio-card,name = "Raumfeld Connector";
15 #address-cells = <1>;
16 #size-cells = <0>;
18 simple-audio-card,dai-link@0 {
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/linux/drivers/iio/adc/
H A Dad4130.c1 // SPDX-License-Identifier: GPL-2.0+
10 #include <linux/clk-provider.h>
125 #define AD4130_INVALID_SLOT -1
137 [AD4130_CHANNEL_X_REG(0) ... AD4130_CHANNEL_X_REG(AD4130_MAX_CHANNELS - 1)] = 3,
138 [AD4130_CONFIG_X_REG(0) ... AD4130_CONFIG_X_REG(AD4130_MAX_SETUPS - 1)] = 2,
139 [AD4130_FILTER_X_REG(0) ... AD4130_FILTER_X_REG(AD4130_MAX_SETUPS - 1)] = 3,
140 [AD4130_OFFSET_X_REG(0) ... AD4130_OFFSET_X_REG(AD4130_MAX_SETUPS - 1)] = 3,
141 [AD4130_GAIN_X_REG(0) ... AD4130_GAIN_X_REG(AD4130_MAX_SETUPS - 1)] = 3,
231 unsigned int fs; member
265 struct clk *mclk; member
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/linux/sound/soc/generic/
H A Dsimple-card.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <sound/soc-dai.h>
22 #define DAI "sound-dai"
23 #define CELL "#sound-dai-cells"
24 #define PREFIX "simple-audio-card,"
41 * Get node via "sound-da in simple_parse_platform()
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/linux/arch/arm64/boot/dts/renesas/
H A Dulcb-kf-simple-audio-card.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 * (A) CPU0 <----> ak4613
10 * (B) CPU1 ----> HDMI
11 * (C) CPU2 ----> PCM3168A-p
12 * (D) CPU3 <---- PCM3168A-c
14 * (A) aplay -D plughw:0,0 xxx.wav
15 * (B) aplay -D plughw:0,1 xxx.wav
16 * (C) aplay -D plughw:1,0 xxx.wav
18 * (A) arecord -D plughw:0,0 xxx.wav
19 * (D) arecord -D plughw:1,1 xxx.wav
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/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1028a-kontron-sl28-var3-ads2.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Device Tree file for the Kontron SMARC-sAL28 board on a SMARC Eval 2.0
10 /dts-v1/;
12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
13 #include "fsl-ls1028a-kontron-sl28-var3.dts"
16 model = "Kontron SMARC-sAL28 (Single PHY) on SMARC Eval 2.0 carrier";
17 compatible = "kontron,sl28-var3-ads2", "kontron,sl28-var3",
20 pwm-fan {
21 compatible = "pwm-fan";
22 #cooling-cells = <2>;
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