| /freebsd/sys/contrib/device-tree/Bindings/media/i2c/ |
| H A D | toshiba,tc358746.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schema [all...] |
| /freebsd/sys/arm/freescale/vybrid/ |
| H A D | vf_sai.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 81 #define TCR2_MSEL_M 0x3 /* MCLK Select Mask*/ 82 #define TCR2_MSEL_S 26 /* MCLK Select Shift*/ 110 uint32_t div; /* Bit Clock Divide. Division value is (div + 1) * 2. */ member 118 * (div + 1) * 2 = MCLK/(nch * LRCLK * bits/1000000), 120 * MCLK - master clock 121 * nch - number of channels 122 * LRCLK - left right clock 123 * e.g. (div + 1) * 2 = 16.9344/(2 * 44100 * 24/1000000) [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/st/ |
| H A D | ste-nomadik-stn8815.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC 6 #include <dt-bindings/gpio/gpio.h> 9 #address-cells = <1>; 10 #size-cells = <1>; 18 L2: cache-controller { 19 compatible = "arm,l210-cache"; 21 interrupt-paren [all...] |
| /freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
| H A D | omap34xx-omap36xx-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 9 #clock-cells = <0>; 10 compatible = "fixed-factor-clock"; 12 clock-mult = <1>; 13 clock-div = <1>; 19 #clock-cells = <2>; 20 #address-cells = <1>; 21 #size-cells = <0>; 23 aes1_ick: clock-aes1-ick@3 { 25 #clock-cells = <0>; [all …]
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| /freebsd/sys/dev/sound/macio/ |
| H A D | i2s.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause AND BSD-3-Clause 27 /*- 137 int detect_active; /* for extint-gpio */ 138 int level; /* for extint-gpio */ 139 struct i2s_softc *i2s; /* for extint-gpio */ 195 sc->aoa.sc_dev = self; in i2s_attach() 196 sc->node = ofw_bus_get_node(self); in i2s_attach() 198 port = of_find_firstchild_byname(sc->node, "i2s-a"); in i2s_attach() 199 if (port == -1) in i2s_attach() [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/arm/ |
| H A D | integratorcp.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 11 compatible = "arm,integrator-cp"; 18 #address-cells = <1>; 19 #size-cells = <0>; 35 operating-points = <50000 0 38 clock-names = "cpu"; 39 clock-latency = <1000000>; /* 1 ms */ 45 * ARM DUI 0184B page 7-28 "Integrator/CP922T system clocks" which 50 xtal_codec: clock-24576000 { [all …]
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| H A D | integratorap-im-pd1.dts | 1 // SPDX-License-Identifier: GPL-2.0 4 * with the IM-PD1 example logical module mounted. 10 model = "ARM Integrator/AP with IM-PD1"; 11 compatible = "arm,integrator-ap"; 13 reserved-memory { 14 #address-cells = <1>; 15 #size-cells = <1>; 19 /* 1 MB of designated video RAM on the IM-PD1 */ 20 compatible = "shared-dma-pool"; 22 no-map; [all …]
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| H A D | arm-realview-eb.dtsi | 23 #include <dt-bindings/interrupt-controller/irq.h> 24 #include <dt-bindings/gpio/gpio.h> 27 #address-cells = <1>; 28 #size-cells = <1>; 29 compatible = "arm,realview-eb"; 48 vmmc: regulator-vmmc { 49 compatible = "regulator-fixed"; 50 regulator-name = "vmmc"; 51 regulator-min-microvolt = <3300000>; 52 regulator-max-microvolt = <3300000>; [all …]
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| H A D | arm-realview-pbx.dtsi | 23 #include <dt-bindings/interrupt-controller/irq.h> 24 #include <dt-bindings/gpio/gpio.h> 27 #address-cells = <1>; 28 #size-cells = <1>; 29 compatible = "arm,realview-pbx"; 49 vmmc: regulator-vmmc { 50 compatible = "regulator-fixed"; 51 regulator-name = "vmmc"; 52 regulator-min-microvolt = <3300000>; 53 regulator-max-microvolt = <3300000>; [all …]
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| H A D | versatile-ab.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 6 compatible = "arm,versatile-ab"; 7 #address-cells = <1>; 8 #size-cells = <1>; 9 interrupt-parent = <&vic>; 19 stdout-path = &uart0; 27 xtal24mhz: clock-24000000 { 28 #clock-cells = <0>; 29 compatible = "fixed-clock"; [all …]
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| H A D | arm-realview-pb1176.dts | 23 /dts-v1/; 24 #include <dt-bindings/interrupt-controller/irq.h> 25 #include <dt-bindings/gpio/gpio.h> 28 #address-cells = <1>; 29 #size-cells = <1>; 31 compatible = "arm,realview-pb1176"; 50 vmmc: regulator-vmmc { 51 compatible = "regulator-fixed"; 52 regulator-name = "vmmc"; 53 regulator-min-microvolt = <3300000>; [all …]
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| H A D | arm-realview-pb11mp.dts | 23 /dts-v1/; 24 #include <dt-bindings/interrupt-controller/irq.h> 25 #include <dt-bindings/gpio/gpio.h> 28 #address-cells = <1>; 29 #size-cells = <1>; 31 compatible = "arm,realview-pb11mp"; 52 #address-cells = <1>; 53 #size-cells = <0>; 54 enable-method = "arm,realview-smp"; 60 next-level-cache = <&L2>; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/samsung/ |
| H A D | exynos5250-smdk5250.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 10 #include <dt-bindings/clock/maxim,max77686.h> 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 31 stdout-path = "serial2:115200n8"; 34 vdd: fixed-regulator-vdd { 35 compatible = "regulator-fixed"; 36 regulator-name = "vdd-supply"; 37 regulator-min-microvolt = <1800000>; [all …]
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| H A D | exynos5410-odroidxu.dts | 1 // SPDX-License-Identifier: GPL-2.0 10 /dts-v1/; 12 #include <dt-bindings/clock/maxim,max77802.h> 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/interrupt-controller/irq.h> 15 #include <dt-bindings/sound/samsung-i2s.h> 16 #include "exynos54xx-odroidxu-leds.dtsi" 20 compatible = "hardkernel,odroid-xu", "samsung,exynos5410", "samsung,exynos5"; 34 stdout-path = "serial2:115200n8"; 38 pinctrl-0 = <&emmc_nrst_pin>; [all …]
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| H A D | exynos4412-odroid-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Common definition for Hardkernel's Exynos4412 based ODROID-X/X2/U2/U3 boards 7 #include <dt-bindings/sound/samsung-i2s.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/clock/maxim,max77686.h> 11 #include "exynos4412-ppmu-common.dtsi" 12 #include <dt-bindings/gpio/gpio.h> 13 #include "exynos-mfc-reserved-memory.dtsi" 22 stdout-path = &serial_1; 26 compatible = "samsung,secure-firmware"; [all …]
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| H A D | exynos5800-peach-pi.dts | 1 // SPDX-License-Identifier: GPL-2.0 8 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/clock/maxim,max77802.h> 13 #include <dt-bindings/regulator/maxim,max77802.h> 14 #include <dt-bindings/sound/samsung-i2s.h> 16 #include "exynos5420-cpus.dtsi" 21 compatible = "google,pi-rev16", [all …]
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| H A D | exynos5420-peach-pit.dts | 1 // SPDX-License-Identifier: GPL-2.0 8 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/clock/maxim,max77802.h> 13 #include <dt-bindings/regulator/maxim,max77802.h> 14 #include <dt-bindings/sound/samsung-i2s.h> 16 #include "exynos5420-cpus.dtsi" 21 compatible = "google,pit-rev16", [all …]
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| /freebsd/sys/dev/clk/allwinner/ |
| H A D | ccu_a64.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 47 #include <dt-bindings/clock/sun50i-a64-ccu.h> 48 #include <dt-bindings/reset/sun50i-a64-ccu.h> 50 /* Non-exported clocks */ 141 CCU_GATE(CLK_BUS_MIPI_DSI, "bus-mipi-dsi", "ahb1", 0x60, 1) 142 CCU_GATE(CLK_BUS_CE, "bus-ce", "ahb1", 0x60, 5) 143 CCU_GATE(CLK_BUS_DMA, "bus-dma", "ahb1", 0x60, 6) 144 CCU_GATE(CLK_BUS_MMC0, "bus-mmc0", "ahb1", 0x60, 8) 145 CCU_GATE(CLK_BUS_MMC1, "bus-mmc1", "ahb1", 0x60, 9) [all …]
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| H A D | ccu_h3.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 55 #include <dt-bindings/clock/sun8i-h3-ccu.h> 56 #include <dt-bindings/reset/sun8i-h3-ccu.h> 58 /* Non-exported resets */ 61 /* Non-exported clocks */ 160 CCU_GATE(CLK_BUS_CE, "bus-ce", "ahb1", 0x60, 5) 161 CCU_GATE(CLK_BUS_DMA, "bus-dma", "ahb1", 0x60, 6) 162 CCU_GATE(CLK_BUS_MMC0, "bus-mmc0", "ahb1", 0x60, 8) 163 CCU_GATE(CLK_BUS_MMC1, "bus-mmc1", "ahb1", 0x60, 9) [all …]
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| H A D | ccu_a83t.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 47 #include <dt-bindings/clock/sun8i-a83t-ccu.h> 48 #include <dt-bindings/reset/sun8i-a83t-ccu.h> 50 /* Non-exported clocks */ 76 /* Non-exported fixed clocks */ 134 CCU_GATE(CLK_BUS_MIPI_DSI, "bus-mipi-dsi", "ahb1", 0x60, 1) 135 CCU_GATE(CLK_BUS_SS, "bus-ss", "ahb1", 0x60, 5) 136 CCU_GATE(CLK_BUS_DMA, "bus-dma", "ahb1", 0x60, 6) 137 CCU_GATE(CLK_BUS_MMC0, "bus-mmc0", "ahb1", 0x60, 8) [all …]
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| H A D | ccu_d1.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 52 #include <dt-bindings/clock/sun20i-d1-ccu.h> 53 #include <dt-bindings/reset/sun20i-d1-ccu.h> 125 CCU_GATE(CLK_BUS_DE, "bus-de", "psi-ahb", 0x60C, 0) 126 CCU_GATE(CLK_BUS_DI, "bus-di", "psi-ahb", 0x62C, 0) 127 CCU_GATE(CLK_BUS_G2D, "bus-g2d", "psi-ahb", 0x63C, 0) 128 CCU_GATE(CLK_BUS_CE, "bus-ce", "psi-ahb", 0x68C, 0) 129 CCU_GATE(CLK_BUS_VE, "bus-ve", "psi-ahb", 0x690, 0) 130 CCU_GATE(CLK_BUS_DMA, "bus-dma", "psi-ahb", 0x70C, 0) [all …]
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| /freebsd/sys/arm/freescale/imx/ |
| H A D | imx6_ssi.c | 1 /*- 60 bus_space_read_4(_sc->bst, _sc->bsh, _reg) 62 bus_space_write_4(_sc->bst, _sc->bsh, _reg, _val) 156 * Fref ------/ | | | | | | | | | | 157 * PLL4 div select -/ | | | | | | | | | 158 * PLL4 num --------------/ | | | | | | | | 159 * PLL4 denom -------------------/ | | | | | | | 160 * PLL4 post div ---------------------/ | | | | | | 161 * CCM ssi pre div (CCM_CS1CDR) ----------/ | | | | | 162 * CCM ssi post div (CCM_CS1CDR) -------------/ | | | | [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
| H A D | mt2712e.dtsi | 5 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/clock/mt2712-clk.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/memory/mt2712-larb-port.h> 12 #include <dt-bindings/phy/phy.h> 13 #include <dt-bindings/power/mt2712-power.h> 14 #include "mt2712-pinfunc.h" 18 interrupt-parent = <&sysirq>; 19 #address-cells = <2>; [all …]
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| /freebsd/sys/arm/allwinner/ |
| H A D | aw_i2s.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 212 { "allwinner,sun50i-a64-codec-i2s", (uintptr_t)&sun50i_a64_codec_config }, 213 { "allwinner,sun8i-h3-i2s", (uintptr_t)&sun8i_h3_config }, 220 { -1, 0 } 235 #define I2S_LOCK(sc) mtx_lock(&(sc)->mtx) 236 #define I2S_UNLOCK(sc) mtx_unlock(&(sc)->mtx) 237 #define I2S_READ(sc, reg) bus_read_4((sc)->res[0], (reg)) 238 #define I2S_WRITE(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val)) 239 #define I2S_TYPE(sc) ((sc)->cfg->type) [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/rockchip/ |
| H A D | rk3328.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3328-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3328-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 18 interrupt-parent = <&gic>; [all …]
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