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/linux/drivers/net/ethernet/marvell/octeontx2/nic/
H A Dcn10k_macsec.c1 // SPDX-License-Identifier: GPL-2.0
61 dev_err(pfvf->dev, "failed to allocate transform for ecb-aes\n"); in cn10k_ecb_aes_encrypt()
67 dev_err(pfvf->dev, "failed to allocate request for skcipher\n"); in cn10k_ecb_aes_encrypt()
68 err = -ENOMEM; in cn10k_ecb_aes_encrypt()
74 dev_err(pfvf->dev, "failed to set key for skcipher\n"); in cn10k_ecb_aes_encrypt()
101 list_for_each_entry(txsc, &cfg->txsc_list, entry) { in cn10k_mcs_get_txsc()
102 if (txsc->sw_secy == secy) in cn10k_mcs_get_txsc()
115 list_for_each_entry(rxsc, &cfg->rxsc_list, entry) { in cn10k_mcs_get_rxsc()
116 if (rxsc->sw_rxsc == rx_sc && rxsc->sw_secy == secy) in cn10k_mcs_get_rxsc()
139 static int cn10k_mcs_alloc_rsrc(struct otx2_nic *pfvf, enum mcs_direction dir, in cn10k_mcs_alloc_rsrc() argument
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H A Dotx2_common.h1 /* SPDX-License-Identifier: GPL-2.0 */
26 #include <mbox.h>
169 struct mbox { struct
170 struct otx2_mbox mbox; argument
175 void *bbuf_base; /* Bounce buffer for mbox memory */ argument
177 int num_msgs; /* mbox number of messages */ argument
247 /* MSI-X */
447 void (*pf_queue_work_hdlr)(struct mbox *mb, struct workqueue_struct *mw,
493 /* Mbox */
494 struct mbox mbox; member
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H A Dotx2_common.c1 // SPDX-License-Identifier: GPL-2.0
24 return IS_ENABLED(CONFIG_DCB) && !!pfvf->pfc_en; in otx2_is_pfc_enabled()
34 stats->bytes = otx2_atomic64_add(incr, ptr); in otx2_nix_rq_op_stats()
37 stats->pkts = otx2_atomic64_add(incr, ptr); in otx2_nix_rq_op_stats()
47 stats->bytes = otx2_atomic64_add(incr, ptr); in otx2_nix_sq_op_stats()
50 stats->pkts = otx2_atomic64_add(incr, ptr); in otx2_nix_sq_op_stats()
57 if (!netif_running(pfvf->netdev)) in otx2_update_lmac_stats()
60 mutex_lock(&pfvf->mbox.lock); in otx2_update_lmac_stats()
61 req = otx2_mbox_alloc_msg_cgx_stats(&pfvf->mbox); in otx2_update_lmac_stats()
63 mutex_unlock(&pfvf->mbox.lock); in otx2_update_lmac_stats()
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H A Dotx2_pf.c1 // SPDX-License-Identifier: GPL-2.0
62 if (pf->xdp_prog && new_mtu > MAX_XDP_MTU) { in otx2_change_mtu()
64 netdev->mtu); in otx2_change_mtu()
65 return -EINVAL; in otx2_change_mtu()
71 netdev->mtu, new_mtu); in otx2_change_mtu()
72 WRITE_ONCE(netdev->mtu, new_mtu); in otx2_change_mtu()
82 int irq, vfs = pf->total_vfs; in otx2_disable_flr_me_intr()
86 irq = pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_VFME0); in otx2_disable_flr_me_intr()
91 irq = pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_VFFLR0); in otx2_disable_flr_me_intr()
97 otx2_write64(pf, RVU_PF_VFME_INT_ENA_W1CX(1), INTR_MASK(vfs - 64)); in otx2_disable_flr_me_intr()
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H A Dotx2_tc.c1 // SPDX-License-Identifier: GPL-2.0
32 #define MCAST_INVALID_GRP (-1U)
64 if (is_dev_otx2(nic->pdev)) { in otx2_get_egress_burst_cfg()
78 *burst_exp = ilog2(burst) ? ilog2(burst) - 1 : 0; in otx2_get_egress_burst_cfg()
79 tmp = burst - rounddown_pow_of_two(burst); in otx2_get_egress_burst_cfg()
83 *burst_mantissa = tmp / (1ULL << (*burst_exp - 7)); in otx2_get_egress_burst_cfg()
109 *exp = ilog2(maxrate) ? ilog2(maxrate) - 1 : 0; in otx2_get_egress_rate_cfg()
110 tmp = maxrate - rounddown_pow_of_two(maxrate); in otx2_get_egress_rate_cfg()
114 *mantissa = tmp / (1ULL << (*exp - 7)); in otx2_get_egress_rate_cfg()
133 if (is_dev_otx2(nic->pdev)) { in otx2_get_txschq_rate_regval()
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/linux/drivers/mailbox/
H A Dcix-mailbox.c1 // SPDX-License-Identifier: GPL-2.0
94 int dir; member
98 struct mbox_controller mbox; member
112 static struct cix_mbox_priv *to_cix_mbox_priv(struct mbox_controller *mbox) in to_cix_mbox_priv() argument
114 return container_of(mbox, struct cix_mbox_priv, mbox); in to_cix_mbox_priv()
119 if (priv->use_shmem) in cix_mbox_write()
120 iowrite32(val, priv->base + offset - CIX_SHMEM_OFFSET); in cix_mbox_write()
122 iowrite32(val, priv->base + offset); in cix_mbox_write()
127 if (priv->use_shmem) in cix_mbox_read()
128 return ioread32(priv->base + offset - CIX_SHMEM_OFFSET); in cix_mbox_read()
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H A Dhi6220-mailbox.c1 // SPDX-License-Identifier: GPL-2.0-only
57 * - direction: tx or rx
58 * - dst irq: peer core's irq number
59 * - ack irq: local irq number
60 * - slot number
62 unsigned int dir, dst_irq, ack_irq; member
90 static void mbox_set_state(struct hi6220_mbox *mbox, in mbox_set_state() argument
95 status = readl(mbox->base + MBOX_MODE_REG(slot)); in mbox_set_state()
97 writel(status, mbox->base + MBOX_MODE_REG(slot)); in mbox_set_state()
100 static void mbox_set_mode(struct hi6220_mbox *mbox, in mbox_set_mode() argument
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H A Dti-msgmgr.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-2022 Texas Instruments Incorporated - https://www.ti.com/
22 #include <linux/soc/ti/ti-msgmgr.h>
41 * struct ti_msgmgr_valid_queue_desc - SoC valid queues meant for this processor
53 * struct ti_msgmgr_desc - Description of message manager integration
92 * struct ti_queue_inst - Description of a queue instance
122 * struct ti_msgmgr_inst - Description of a Message Manager Instance
132 * @mbox: Mailbox Controller
143 struct mbox_controller mbox; member
148 * ti_msgmgr_queue_get_num_messages() - Get the number of pending messages
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/linux/Documentation/devicetree/bindings/mailbox/
H A Dcix,sky1-mbox.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/cix,sky1-mbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Guomin Chen <Guomin.Chen@cixtech.com>
19 typically used in pairs-one for receiving and one for transmitting.
22 channel 0-7 - Fast channel with 32bit transmit register and IRQ support
23 channel 8 - Doorbell mode,using the mailbox as an interrupt-generating
25 channel 9 - Fifo based channel with 32*32bit depth fifo and IRQ support
26 channel 10 - Reg based channel with 32*32bit transmit register and
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/linux/drivers/net/ethernet/marvell/octeontx2/af/
H A Dmbox.h1 /* SPDX-License-Identifier: GPL-2.0 */
39 #define INTR_MASK(pfvfs) ((pfvfs < 64) ? (BIT_ULL(pfvfs) - 1) : (~0ull))
41 #define MBOX_RSP_TIMEOUT 6000 /* Time(ms) to wait for mbox response */
43 #define MBOX_MSG_ALIGN 16 /* Align mbox msg start to 16bytes */
61 void *mbase; /* This dev's mbox region */
72 void *hwbase; /* Mbox region advertised by HW */
74 u64 trigger; /* Trigger mbox notification */
75 u16 tr_shift; /* Mbox trigger shift */
76 u64 rx_start; /* Offset of Rx region in mbox memory */
77 u64 tx_start; /* Offset of Tx region in mbox memory */
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H A Drvu.h1 /* SPDX-License-Identifier: GPL-2.0 */
18 #include "mbox.h"
171 u8 dir; member
300 int cgx_users; /* number of cgx users - used only by PFs */
426 bool per_pf_mbox_regs; /* PF mbox specified in per PF registers ? */
432 bool cpt_rxc; /* Is CPT-RXC supported */
468 struct otx2_mbox mbox; member
583 /* Mbox */
592 /* MSI-X */
649 struct mutex mbox_lock; /* Serialize mbox up and down msgs */
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H A Drvu_npc.c1 // SPDX-License-Identifier: GPL-2.0
28 #define ALIGN_8B_CEIL(__a) (((__a) + 7) & (-8))
49 struct rvu_hwinfo *hw = rvu->hw; in is_npc_interface_valid()
51 return intf < hw->npc_intfs; in is_npc_interface_valid()
80 struct npc_pkind *pkind = &rvu->hw->pkind; in rvu_npc_get_pkind()
84 for (i = 0; i < pkind->rsrc.max; i++) { in rvu_npc_get_pkind()
85 map = pkind->pfchan_map[i]; in rvu_npc_get_pkind()
89 return -1; in rvu_npc_get_pkind()
101 dev_err(rvu->dev, "%s: pkind not mapped\n", __func__); in npc_config_ts_kpuaction()
102 return -EINVAL; in npc_config_ts_kpuaction()
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H A Drvu_cpt.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include "mbox.h"
42 (_rsp)->busy_sts_##etype = busy_sts; \
43 (_rsp)->free_sts_##etype = free_sts; \
73 dev_warn_once(rvu->dev, "flt_vecs:%d exceeds the max vectors:%d\n", in cpt_10k_flt_nvecs_get()
84 struct rvu *rvu = block->rvu; in cpt_af_flt_intr_handler()
85 int blkaddr = block->addr; in cpt_af_flt_intr_handler()
91 dev_err_ratelimited(rvu->dev, "Received CPTAF FLT%d irq : 0x%llx", vec, reg); in cpt_af_flt_intr_handler()
93 i = -1; in cpt_af_flt_intr_handler()
115 spin_lock(&rvu->cpt_intr_lock); in cpt_af_flt_intr_handler()
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/linux/drivers/net/ethernet/huawei/hinic/
H A Dhinic_hw_mbox.c1 // SPDX-License-Identifier: GPL-2.0-only
48 * 0 - Tx request is done;
49 * 1 - Tx request is in process.
68 * 0 - send
69 * 1 - receive
110 /* MBOX size is 64B, 8B for mbox_header, 4B reserved */
115 /* mbox write back status is 16B, only first 4B is used */
141 ((hwif)->cfg_regs_bar + HINIC_FUNC_CSR_MAILBOX_DATA_OFF)
146 #define MBOX_MSG_ID(func_to_func) ((func_to_func)->send_msg_id)
192 dev_warn(&hwdev->hwif->pdev->dev, in check_func_id()
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/linux/drivers/crypto/marvell/octeontx2/
H A Dotx2_cptpf_mbox.c1 // SPDX-License-Identifier: GPL-2.0-only
35 mutex_lock(&cptpf->lock); in forward_to_af()
36 msg = otx2_mbox_alloc_msg(&cptpf->afpf_mbox, 0, size); in forward_to_af()
38 mutex_unlock(&cptpf->lock); in forward_to_af()
39 return -ENOMEM; in forward_to_af()
44 msg->id = req->id; in forward_to_af()
45 msg->pcifunc = req->pcifunc; in forward_to_af()
46 msg->sig = req->sig; in forward_to_af()
47 msg->ver = req->ver; in forward_to_af()
49 ret = otx2_cpt_sync_mbox_msg(&cptpf->afpf_mbox); in forward_to_af()
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/linux/drivers/infiniband/hw/ocrdma/
H A Docrdma_stats.c3 * Copyright (C) 2012-2015 Emulex. All rights reserved.
16 * - Redistributions of source code must retain the above copyright notice,
19 * - Redistributions in binary form must reproduce the above copyright
36 * linux-drivers@emulex.com
69 struct stats_mem *mem = &dev->stats_mem; in ocrdma_alloc_stats_resources()
71 mutex_init(&dev->stats_lock); in ocrdma_alloc_stats_resources()
72 /* Alloc mbox command mem*/ in ocrdma_alloc_stats_resources()
73 mem->size = max_t(u32, sizeof(struct ocrdma_rdma_stats_req), in ocrdma_alloc_stats_resources()
76 mem->va = dma_alloc_coherent(&dev->nic_info.pdev->dev, mem->size, in ocrdma_alloc_stats_resources()
77 &mem->pa, GFP_KERNEL); in ocrdma_alloc_stats_resources()
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/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dcxgb4.h4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
62 #define CH_WARN(adap, fmt, ...) dev_warn(adap->pdev_dev, fmt, ## __VA_ARGS__)
138 FEC_RS = 1 << 1, /* Reed-Solomon */
139 FEC_BASER_RS = 1 << 2 /* BaseR/Reed-Solomon */
262 u64 rx_ovflow0; /* drops due to buffer-group 0 overflows */
263 u64 rx_ovflow1; /* drops due to buffer-group 1 overflows */
264 u64 rx_ovflow2; /* drops due to buffer-group 2 overflows */
265 u64 rx_ovflow3; /* drops due to buffer-group 3 overflows */
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H A Dt4_hw.c4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
43 * t4_wait_op_done_val - wait until an operation is completed
46 * @mask: a single-bit field within @reg that indicates completion
55 * operation completes and -EAGAIN otherwise.
68 if (--attempts == 0) in t4_wait_op_done_val()
69 return -EAGAIN; in t4_wait_op_done_val()
83 * t4_set_reg_field - set a register field to a value
102 * t4_read_indirect - read indirectly addressed registers
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H A Dcxgb4_main.c4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
109 /* Include PCI Device IDs for both PF4 and PF0-3 so our PCI probe() routine is
126 #define FW4_CFNAME "cxgb4/t4-config.txt"
127 #define FW5_CFNAME "cxgb4/t5-config.txt"
128 #define FW6_CFNAME "cxgb4/t6-config.txt"
144 * order MSI-X, MSI, legacy INTx interrupts. This parameter determines which
154 MODULE_PARM_DESC(msi, "whether to use INTx (0), MSI (1) or MSI-X (2)");
158 * offset by 2 bytes in order to have the IP headers line up on 4-byte
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/linux/drivers/net/ethernet/netronome/nfp/
H A Dnfp_net.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2 /* Copyright (C) 2015-2018 Netronome Systems, Inc. */
21 #include <linux/io-64-nonatomic-hi-lo.h>
32 if (__nn->dp.netdev) \
33 netdev_printk(lvl, __nn->dp.netdev, fmt, ## args); \
35 dev_printk(lvl, __nn->dp.dev, "ctrl: " fmt, ## args); \
48 if (__dp->netdev) \
49 netdev_warn(__dp->netdev, fmt, ## args); \
51 dev_warn(__dp->dev, fmt, ## args); \
118 #define D_IDX(ring, idx) ((idx) & ((ring)->cnt - 1))
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/linux/sound/soc/codecs/
H A Dcs35l45.c1 // SPDX-License-Identifier: GPL-2.0
3 // cs35l45.c - CS35L45 ALSA SoC audio driver
5 // Copyright 2019-2022 Cirrus Logic, Inc.
53 if (!cs35l45->dsp.cs_dsp.running) { in cs35l45_set_cspl_mbox_cmd()
54 dev_err(cs35l45->dev, "DSP not running\n"); in cs35l45_set_cspl_mbox_cmd()
55 return -EPERM; in cs35l45_set_cspl_mbox_cmd()
62 dev_err(cs35l45->dev, "Failed to write MBOX: %d\n", ret); in cs35l45_set_cspl_mbox_cmd()
72 dev_err(cs35l45->dev, "Failed to read MBOX STS: %d\n", ret); in cs35l45_set_cspl_mbox_cmd()
77 dev_dbg(cs35l45->dev, "[%u] cmd %u returned invalid sts %u", i, cmd, sts); in cs35l45_set_cspl_mbox_cmd()
83 dev_err(cs35l45->dev, "Failed to set mailbox cmd %u (status %u)\n", cmd, sts); in cs35l45_set_cspl_mbox_cmd()
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/linux/drivers/net/wireless/ath/ath6kl/
H A Dinit.c4 * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
32 #include "hif-ops.h"
33 #include "htc-ops.h"
51 .dir = AR6003_HW_2_0_FW_DIR,
74 .dir = AR6003_HW_2_1_1_FW_DIR,
99 .dir = AR6004_HW_1_0_FW_DIR,
118 .dir = AR6004_HW_1_1_FW_DIR,
138 .dir = AR6004_HW_1_2_FW_DIR,
157 .dir = AR6004_HW_1_3_FW_DIR,
180 .dir = AR6004_HW_3_0_FW_DIR,
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/linux/drivers/net/wireless/ti/wlcore/
H A Dacx.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
6 * Copyright (C) 2008-2010 Nokia Corporation
19 Host Interrupt Register (WiLink -> Host)
26 /* Event was entered to Event MBOX #A*/
28 /* Event was entered to Event MBOX #B*/
36 /* Trace message on MBOX #A */
38 /* Trace message on MBOX #B */
45 /* all possible interrupts - only appropriate ones will be masked in */
119 /* 0 - Always active*/
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H A Dacx.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2008-2009 Nokia Corporation
33 ret = -ENOMEM; in wl1271_acx_wake_up_conditions()
37 wake_up->role_id = wlvif->role_id; in wl1271_acx_wake_up_conditions()
38 wake_up->wake_up_event = wake_up_event; in wl1271_acx_wake_up_conditions()
39 wake_up->listen_interval = listen_interval; in wl1271_acx_wake_up_conditions()
62 ret = -ENOMEM; in wl1271_acx_sleep_auth()
66 auth->sleep_auth = sleep_auth; in wl1271_acx_sleep_auth()
75 wl->sleep_auth = sleep_auth; in wl1271_acx_sleep_auth()
91 return -EINVAL; in wl1271_acx_tx_power()
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/linux/tools/power/x86/intel-speed-select/
H A Disst-config.c1 // SPDX-License-Identifier: GPL-2.0
3 * Intel Speed Select -- Enumerate and control features
55 static int current_clos = -1;
56 static int clos_epp = -1;
57 static int clos_prop_prio = -1;
58 static int clos_min = -1;
59 static int clos_max = -1;
60 static int clos_desired = -1;
168 /* only three CascadeLake-N models are supported */ in update_cpu_model()
177 err(-1, "cannot open /proc/cpuinfo\n"); in update_cpu_model()
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