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/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dqcom,pcie.txt3 - compatible:
7 - "qcom,pcie-ipq8064" for ipq8064
8 - "qcom,pcie-ipq8064-v2" for ipq8064 rev 2 or ipq8065
9 - "qcom,pcie-apq8064" for apq8064
10 - "qcom,pcie-apq8084" for apq8084
11 - "qcom,pcie-msm8996" for msm8996 or apq8096
12 - "qcom,pcie-ipq4019" for ipq4019
13 - "qcom,pcie-ipq8074" for ipq8074
14 - "qcom,pcie-qcs404" for qcs404
15 - "qcom,pcie-sc8180x" for sc8180x
[all …]
H A Dqcom,pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
20 - enum:
21 - qcom,pcie-apq8064
22 - qcom,pcie-apq8084
23 - qcom,pcie-ipq4019
24 - qcom,pcie-ipq6018
[all …]
/freebsd/sys/contrib/device-tree/Bindings/ata/
H A Dcortina,gemini-sata-bridge.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/cortina,gemini-sata-bridge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
13 The Gemini SATA bridge in a SoC-internal PATA to SATA bridge that
19 const: cortina,gemini-sata-bridge
28 reset-names:
30 - const: sata0
31 - const: sata1
[all …]
H A Dcortina,gemini-sata-bridge.txt3 The Gemini SATA bridge in a SoC-internal PATA to SATA bridge that
8 - compatible: should be
9 "cortina,gemini-sata-bridge"
10 - reg: registers and size for the block
11 - resets: phandles to the reset lines for both SATA bridges
12 - reset-names: must be "sata0", "sata1"
13 - clocks: phandles to the compulsory peripheral clocks
14 - clock-names: must be "SATA0_PCLK", "SATA1_PCLK"
15 - syscon: a phandle to the global Gemini system controller
16 - cortina,gemini-ata-muxmode: tell the desired multiplexing mode for
[all …]
/freebsd/sys/contrib/device-tree/Bindings/soc/qcom/
H A Dqcom,rpm-master-stats.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,rpm-master-stats.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. (QTI) RPM Master Stats
10 - Konrad Dybcio <konradybcio@kernel.org>
16 (particularly around entering hardware-driven low power modes: XO shutdown
17 and total system-wide power collapse) are first made at Master-level, and
20 The Master Stats provide a few useful bits that can be used to assess whether
21 our device has entered the desired low-power mode, how long it took to do so,
[all …]
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dbrcm,kona-ccu.txt9 Documentation/devicetree/bindings/clock/clock-bindings.txt
12 - compatible
13 Shall have a value of the form "brcm,<model>-<which>-ccu",
16 "brcm,bcm11351-root-ccu"
19 - reg
22 - #clock-cells
23 Shall have value <1>. The permitted clock-specifier values
25 - clock-output-names
26 Shall be an ordered list of strings defining the names of
32 compatible = "brcm,bcm11351-slave-ccu";
[all …]
/freebsd/sys/contrib/device-tree/Bindings/fsi/
H A Daspeed,ast2600-fsi-master.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fsi/aspeed,ast2600-fsi-master.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Aspeed FSI master
10 - Eddie James <eajames@linux.ibm.com>
19 - aspeed,ast2600-fsi-master
20 - aspeed,ast2700-fsi-master
25 cfam-reset-gpios:
30 fsi-routing-gpios:
[all …]
H A Dfsi-master-aspeed.txt1 Device-tree bindings for AST2600 FSI master
2 -------------------------------------------
8 - compatible: "aspeed,ast2600-fsi-master"
9 - reg: base address and length
10 - clocks: phandle and clock number
11 - interrupts: platform dependent interrupt description
12 - pinctrl-0: phandle to pinctrl node
13 - pinctrl-names: pinctrl state
16 - cfam-reset-gpios: GPIO for CFAM reset
18 - fsi-routing-gpios: GPIO for setting the FSI mux (internal or cabled)
[all …]
/freebsd/sys/contrib/device-tree/Bindings/dma/
H A Darm-pl08x.txt4 - compatible: "arm,pl080", "arm,primecell";
7 - arm,primecell-periphid: on the FTDMAC020 the primecell ID is not hard-coded
11 - reg: Address range of the PL08x registers
12 - interrupt: The PL08x interrupt number
13 - clocks: The clock running the IP core clock
14 - clock-names: Must contain "apb_pclk"
15 - lli-bus-interface-ahb1: if AHB master 1 is eligible for fetching LLIs
16 - lli-bus-interface-ahb2: if AHB master 2 is eligible for fetching LLIs
17 - mem-bus-interface-ahb1: if AHB master 1 is eligible for fetching memory contents
18 - mem-bus-interface-ahb2: if AHB master 2 is eligible for fetching memory contents
[all …]
/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dbrcm,spi-bcm-qspi.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/spi/brcm,spi-bc
[all...]
H A Dbrcm,spi-bcm-qspi.txt3 The Broadcom SPI controller is a SPI master found on various SOCs, including
4 BRCMSTB (BCM7XXX), Cygnus, NSP and NS2. The Broadcom Master SPI hw IP consits
6 MSPI : SPI master controller can read and write to a SPI slave device
9 io with 3-byte and 4-byte addressing support.
12 MSPI master can be used wihout BSPI. BRCMSTB SoCs have an additional instance
13 of a MSPI master without the BSPI to use with non flash slave devices that
18 - #address-cells:
21 - #size-cells:
24 - compatible:
26 "brcm,spi-brcmstb-qspi", "brcm,spi-bcm-qspi" : MSPI+BSPI on BRCMSTB SoCs
[all …]
H A Dspi-sunplus-sp7021.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/spi/spi-sunplus-sp7021.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - $ref: spi-controller.yaml
14 - Li-hao Kuo <lhjeff911@gmail.com>
19 - sunplus,sp7021-spi
23 - description: the SPI master registers
24 - description: the SPI slave registers
26 reg-names:
[all …]
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dfsl,ssi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
13 Notes on fsl,playback-dma and fsl,capture-dma
14 On SOCs that have an SSI, specific DMA channels are hard-wired for playback
18 DMA controller to use, but the channels themselves are hard-wired. The
22 "fsl,playback-dma" and "fsl,capture-dma" must be marked as compatible with
23 "fsl,ssi-dma-channel". The SOC-specific compatible string (e.g.
24 "fsl,mpc8610-dma-channel") can remain. If these nodes are left as
[all …]
/freebsd/sys/contrib/device-tree/Bindings/iommu/
H A Drockchip,iommu.txt5 its master device. Each slave device is bound to a single master device, and
9 - compatible : Should be "rockchip,iommu"
10 - reg : Address space for the configuration registers
11 - interrupts : Interrupt specifier for the IOMMU instance
12 - interrupt-names : Interrupt name for the IOMMU instance
13 - #iommu-cells : Should be <0>. This indicates the iommu is a
14 "single-master" device, and needs no additional information
15 to associate with its master device. See:
17 - clocks : A list of clocks required for the IOMMU to be accessible by
19 - clock-names : Should contain the following:
[all …]
H A Dmsm,iommu-v0.txt5 of the CPU, each connected to the IOMMU through a port called micro-TLB.
9 - compatible: Must contain "qcom,apq8064-iommu".
10 - reg: Base address and size of the IOMMU registers.
11 - interrupts: Specifiers for the MMU fault interrupts. For instances that
12 support secure mode two interrupts must be specified, for non-secure and
15 - #iommu-cells: The number of cells needed to specify the stream id. This
17 - qcom,ncb: The total number of context banks in the IOMMU.
18 - clocks : List of clocks to be used during SMMU register access. See
19 Documentation/devicetree/bindings/clock/clock-bindings.txt
21 here, there must be a corresponding entry in clock-names
[all …]
/freebsd/share/man/man5/
H A Dpasswd.515 .\" 3. Neither the name of the University nor the names of its contributors
36 .Nm master.passwd ,
53 .Sq Li master.passwd.byname ,
55 .Sq Li master.passwd.byuid ,
63 .Nm master.passwd
70 .Bl -tag -width ".Ar password" -offset indent
98 .Nm master.passwd
121 While it is possible to have multiple entries with identical login names
129 and cannot contain 8-bit characters, tabs or spaces, or any of these
142 Login names
[all …]
/freebsd/sys/contrib/device-tree/Bindings/i3c/
H A Dcdns,i3c-master.txt1 Bindings for cadence I3C master block
5 --------------------
6 - compatible: shall be "cdns,i3c-master"
7 - clocks: shall reference the pclk and sysclk
8 - clock-names: shall contain "pclk" and "sysclk"
9 - interrupts: the interrupt line connected to this I3C master
10 - reg: I3C master registers
15 - #address-cells: shall be set to 1
16 - #size-cells: shall be set to 0
21 - i2c-scl-hz
[all …]
H A Dcdns,i3c-master.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i3c/cdns,i3c-master.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence I3C master block
10 - Boris Brezillon <bbrezillon@kernel.org>
13 - $ref: i3c.yaml#
17 const: cdns,i3c-master
25 clock-names:
27 - const: pclk
[all …]
H A Dsilvaco,i3c-master.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i3c/silvaco,i3c-master.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Silvaco I3C master
10 - Conor Culhane <conor.culhane@silvaco.com>
13 - $ref: i3c.yaml#
17 const: silvaco,i3c-master-v1
27 - description: system clock
28 - description: bus clock
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/rockchip/
H A Ddw_hdmi-rockchip.txt9 following device-specific properties.
14 - compatible: should be one of the following:
15 "rockchip,rk3228-dw-hdmi"
16 "rockchip,rk3288-dw-hdmi"
17 "rockchip,rk3328-dw-hdmi"
18 "rockchip,rk3399-dw-hdmi"
19 - reg: See dw_hdmi.txt.
20 - reg-io-width: See dw_hdmi.txt. Shall be 4.
21 - interrupts: HDMI interrupt number
22 - clocks: See dw_hdmi.txt.
[all …]
/freebsd/sys/contrib/device-tree/src/arm/aspeed/
H A Daspeed-bmc-facebook-yosemitev2.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/i2c/i2c.h>
9 compatible = "facebook,yosemitev2-bmc", "aspeed,ast2500";
14 stdout-path = &uart5;
21 iio-hwmon {
23 compatible = "iio-hwmon";
24 io-channels = <&adc 0> , <&adc 1> , <&adc 2> , <&adc 3> ,
35 m25p,fast-read;
[all …]
H A Daspeed-bmc-vegman.dtsi1 // SPDX-License-Identifier: GPL-2.0+
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
13 stdout-path = &uart5;
21 reserved-memory {
22 #address-cells = <1>;
23 #size-cells = <1>;
29 compatible = "shared-dma-pool";
36 record-size = <0x2000>;
37 console-size = <0x2000>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos5420.dtsi1 // SPDX-License-Identifier: GPL-2.0
14 #include <dt-bindings/clock/exynos5420.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
37 bus_disp1: bus-disp1 {
38 compatible = "samsung,exynos-bus";
40 clock-names = "bus";
44 bus_disp1_fimd: bus-disp1-fimd {
45 compatible = "samsung,exynos-bus";
47 clock-names = "bus";
[all …]
/freebsd/sys/contrib/device-tree/Bindings/i2c/
H A Di2c.txt8 -----------------------------
10 - #address-cells - should be <1>. Read more about addresses below.
11 - #size-cells - should be <0>.
12 - compatible - name of I2C bus controller
21 -----------------------------
26 - clock-frequency
29 - i2c-bus
31 devices and non-I2C devices, the 'i2c-bus' subnode can be used for
32 populating I2C devices. If the 'i2c-bus' subnode is present, only
34 '#address-cells' and '#size-cells' must be defined under this subnode
[all …]
/freebsd/sys/contrib/device-tree/Bindings/bus/
H A Dbrcm,gisb-arb.txt5 - compatible:
6 "brcm,bcm7278-gisb-arb" for V7 28nm chips
7 "brcm,gisb-arb" or "brcm,bcm7445-gisb-arb" for other 28nm chips
8 "brcm,bcm7435-gisb-arb" for newer 40nm chips
9 "brcm,bcm7400-gisb-arb" for older 40nm chips and all 65nm chips
10 "brcm,bcm7038-gisb-arb" for 130nm chips
11 - reg: specifies the base physical address and size of the registers
12 - interrupts: specifies the two interrupts (timeout and TEA) to be used from
18 - brcm,gisb-arb-master-mask: 32-bits wide bitmask used to specify which GISB
20 - brcm,gisb-arb-master-names: string list of the litteral name of the GISB
[all …]

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