| /linux/tools/testing/selftests/bpf/progs/ |
| H A D | verifier_masking.c | 2 /* Converted from tools/testing/selftests/bpf/verifier/masking.c */ 9 __description("masking, test out of bounds 1") 29 __description("masking, test out of bounds 2") 49 __description("masking, test out of bounds 3") 69 __description("masking, test out of bounds 4") 89 __description("masking, test out of bounds 5") 109 __description("masking, test out of bounds 6") 129 __description("masking, test out of bounds 7") 149 __description("masking, test out of bounds 8") 169 __description("masking, test out of bounds 9") [all …]
|
| /linux/drivers/sh/intc/ |
| H A D | Kconfig | 11 bool "Userspace interrupt masking support" 15 masking. 18 page with all non-masking registers obscured when mapped in to
|
| H A D | userimask.c | 2 * Support for hardware-assisted userspace interrupt masking. 48 * Level 0 on the other hand equates to user masking disabled. in store_intc_userimask()
|
| H A D | chip.c | 146 * only set secondary masking method directly in intc_set_priority() 147 * primary masking method is using intc_prio_level[irq] in intc_set_priority()
|
| /linux/Documentation/arch/riscv/ |
| H A D | uabi.rst | 74 Pointer masking 77 Support for pointer masking in userspace (the Supm extension) is provided via 79 operations. Pointer masking is disabled by default. To enable it, userspace 86 Additionally, when pointer masking is enabled (``PR_PMLEN`` is greater than 0),
|
| /linux/arch/arm64/include/asm/ |
| H A D | irqflags.h | 13 * Aarch64 has flags for masking: Debug, Asynchronous (serror), Interrupts and 16 * Masking debug exceptions causes all other exceptions to be masked too/ 17 * Masking SError masks IRQ/FIQ, but not debug exceptions. IRQ and FIQ are
|
| /linux/Documentation/ABI/testing/ |
| H A D | debugfs-vfio | 46 INTx masking when supported, reporting a value of "N", or 47 requires APIC level INTx masking, reporting a value of "Y".
|
| /linux/tools/testing/selftests/kvm/x86/ |
| H A D | svm_int_ctl_test.c | 36 * and since L1 didn't enable virtual interrupt masking, in l2_guest_code() 64 /* No virtual interrupt masking */ in l1_guest_code()
|
| /linux/arch/alpha/lib/ |
| H A D | stxcpy.S | 43 t0 == the first destination word for masking back in 57 t0 == the first destination word for masking back in 128 t0 == the first dest word, for masking back in, if needed else 0 144 lda t6, -1 # e0 : for masking just below
|
| H A D | ev6-stxcpy.S | 54 t0 == the first destination word for masking back in 69 t0 == the first destination word for masking back in 151 t0 == the first dest word, for masking back in, if needed else 0 167 lda t6, -1 # E : for masking just below
|
| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | apple,aic.yaml | 22 - Automatic masking on event delivery (auto-ack) 28 - Automatic masking on ack
|
| /linux/arch/powerpc/kvm/ |
| H A D | book3s_xive.h | 43 u8 saved_priority; /* Saved priority when masking */ 51 bool old_p; /* P bit state when masking */ 52 bool old_q; /* Q bit state when masking */
|
| /linux/drivers/media/pci/zoran/ |
| H A D | zr36057.h | 58 #define ZR36057_MMTR 0x01c /* Masking Map "Top" Register */ 60 #define ZR36057_MMBR 0x020 /* Masking Map "Bottom" Register */
|
| /linux/include/vdso/ |
| H A D | page.h | 23 * way we want (i.e. with 1s in the high bits) while masking a
|
| /linux/arch/riscv/include/asm/ |
| H A D | mmu.h | 35 /* Lock the pointer masking mode because this mm is multithreaded */
|
| /linux/security/apparmor/include/ |
| H A D | policy_compat.h | 26 #define v8 8 /* full network masking */
|
| H A D | perms.h | 103 * aa_perms_accum_raw - accumulate perms with out masking off overlapping perms 130 * aa_perms_accum - accumulate perms, masking off overlapping perms
|
| /linux/drivers/net/wireguard/ |
| H A D | peerlookup.c | 77 * distributed, we can find its bucket simply by masking. in index_bucket() 112 * At the moment, we don't do any masking, so this algorithm isn't exactly
|
| /linux/drivers/net/ethernet/freescale/dpaa2/ |
| H A D | dprtc.c | 159 * masking/unmasking each cause independently 191 * masking/unmasking each cause independently
|
| /linux/tools/testing/selftests/net/bench/page_pool/ |
| H A D | time_bench.h | 71 /* Support masking outsome CPUs, mark if it ran */ 206 const struct cpumask *mask, /* Support masking outsome CPUs*/
|
| /linux/include/linux/irqchip/ |
| H A D | arm-gic-v3-prio.h | 24 * explicitly require to not use priority masking. If bit GICV3_PRIO_PSR_I_SET
|
| /linux/arch/sh/boards/mach-sdk7786/ |
| H A D | nmi.c | 78 /* And the IRQ masking */ in sdk7786_nmi_init()
|
| /linux/arch/riscv/kernel/ |
| H A D | sbi-ipi.c | 71 * the masking/unmasking of virtual IPIs is done in sbi_ipi_init()
|
| /linux/arch/m68k/mac/ |
| H A D | baboon.c | 74 * The means for masking individual Baboon interrupts remains a mystery.
|
| /linux/drivers/vfio/pci/ |
| H A D | vfio_pci_intrs.c | 114 * Masking can come from interrupt, ioctl, or config space in __vfio_pci_intx_mask() 282 * masking. igate prevents races during setup, once running masked in vfio_intx_enable() 289 * IRQ masking is performed at the IRQ chip. Again, igate protects in vfio_intx_enable() 852 /* XXX Need masking support exported */ in vfio_pci_set_irqs_ioctl()
|