| /linux/tools/testing/selftests/bpf/progs/ |
| H A D | verifier_masking.c | 2 /* Converted from tools/testing/selftests/bpf/verifier/masking.c */
9 __description("masking, test out of bounds 1")
29 __description("masking, test out of bounds 2")
49 __description("masking, test out of bounds 3")
69 __description("masking, test out of bounds 4")
89 __description("masking, test out of bounds 5")
109 __description("masking, test out of bounds 6")
129 __description("masking, test out of bounds 7")
149 __description("masking, test out of bounds 8")
169 __description("masking, test out of bounds 9")
[all …]
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| /linux/drivers/sh/intc/ |
| H A D | Kconfig | 11 bool "Userspace interrupt masking support"
15 masking.
18 page with all non-masking registers obscured when mapped in to
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| H A D | userimask.c | 2 * Support for hardware-assisted userspace interrupt masking.
48 * Level 0 on the other hand equates to user masking disabled. in store_intc_userimask()
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| H A D | chip.c | 146 * only set secondary masking method directly in intc_set_priority()
147 * primary masking method is using intc_prio_level[irq] in intc_set_priority()
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| /linux/Documentation/arch/riscv/ |
| H A D | uabi.rst | 72 Pointer masking
75 Support for pointer masking in userspace (the Supm extension) is provided via
77 operations. Pointer masking is disabled by default. To enable it, userspace
84 Additionally, when pointer masking is enabled (``PR_PMLEN`` is greater than 0),
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| /linux/arch/arm64/include/asm/ |
| H A D | irqflags.h | 13 * Aarch64 has flags for masking: Debug, Asynchronous (serror), Interrupts and
16 * Masking debug exceptions causes all other exceptions to be masked too/
17 * Masking SError masks IRQ/FIQ, but not debug exceptions. IRQ and FIQ are
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| /linux/arch/m68k/coldfire/ |
| H A D | intc-5272.c | 29 * The masking and priproty setting of interrupts on the 5272 is done
77 * The act of masking the interrupt also has a side effect of 'ack'ing
143 * We need to be careful with the masking/acking due to the side effects
144 * of masking an interrupt.
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| /linux/tools/testing/selftests/kvm/x86_64/ |
| H A D | svm_int_ctl_test.c | 36 * and since L1 didn't enable virtual interrupt masking, in l2_guest_code()
70 /* No virtual interrupt masking */ in l1_guest_code()
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| /linux/arch/alpha/lib/ |
| H A D | stxcpy.S | 43 t0 == the first destination word for masking back in
57 t0 == the first destination word for masking back in
128 t0 == the first dest word, for masking back in, if needed else 0
144 lda t6, -1 # e0 : for masking just below
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| H A D | ev6-stxcpy.S | 54 t0 == the first destination word for masking back in
69 t0 == the first destination word for masking back in
151 t0 == the first dest word, for masking back in, if needed else 0
167 lda t6, -1 # E : for masking just below
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| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | apple,aic2.yaml | 20 - Automatic masking on event delivery (auto-ack)
24 - Automatic masking on ack
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| H A D | apple,aic.yaml | 22 - Automatic masking on event delivery (auto-ack)
28 - Automatic masking on ack
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| /linux/arch/powerpc/kvm/ |
| H A D | book3s_xive.h | 43 u8 saved_priority; /* Saved priority when masking */
51 bool old_p; /* P bit state when masking */
52 bool old_q; /* Q bit state when masking */
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| /linux/drivers/media/pci/zoran/ |
| H A D | zr36057.h | 58 #define ZR36057_MMTR 0x01c /* Masking Map "Top" Register */
60 #define ZR36057_MMBR 0x020 /* Masking Map "Bottom" Register */
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| /linux/Documentation/driver-api/iio/ |
| H A D | buffers.rst | 50 masking out unused bits.
72 masking out the 12 valid bits of data.
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| /linux/arch/x86/include/asm/ |
| H A D | uaccess_64.h | 60 * Masking the user address is an alternative to a conditional
81 * arbitrary values in those bits rather then masking them off.
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| /linux/arch/powerpc/include/asm/ |
| H A D | hw_irq.h | 141 * Other masks must only provide additional masking beyond in irq_soft_mask_set()
343 * masking.
498 * With soft-masking, MSR[EE] can change from 1 to 0 in mtmsr_isync_irqsafe()
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| /linux/drivers/net/wireguard/ |
| H A D | peerlookup.c | 77 * distributed, we can find its bucket simply by masking. in index_bucket()
112 * At the moment, we don't do any masking, so this algorithm isn't exactly
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| /linux/arch/riscv/include/asm/ |
| H A D | mmu.h | 35 /* Lock the pointer masking mode because this mm is multithreaded */
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| /linux/arch/arm64/kernel/ |
| H A D | idle.c | 19 * If the CPU supports priority masking we must do additional work to
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| /linux/security/apparmor/include/ |
| H A D | policy_compat.h | 26 #define v8 8 /* full network masking */
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| H A D | perms.h | 103 * aa_perms_accum_raw - accumulate perms with out masking off overlapping perms
130 * aa_perms_accum - accumulate perms, masking off overlapping perms
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| /linux/drivers/net/ethernet/freescale/dpaa2/ |
| H A D | dprtc.c | 159 * masking/unmasking each cause independently
191 * masking/unmasking each cause independently
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| /linux/Documentation/iio/ |
| H A D | iio_devbuf.rst | 96 masking out unused bits.
120 masking out the 12 valid bits of data.
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| /linux/include/linux/irqchip/ |
| H A D | arm-gic-v3-prio.h | 24 * explicitly require to not use priority masking. If bit GICV3_PRIO_PSR_I_SET
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