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/freebsd/sys/contrib/device-tree/Bindings/gpu/
H A Darm,mali-bifrost.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/gpu/arm,mali-bifrost.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM Mali Bifrost GPU
10 - Rob Herring <robh@kernel.org>
14 pattern: '^gpu@[a-f0-9]+$'
18 - items:
19 - enum:
20 - amlogic,meson-g12a-mali
[all …]
H A Darm,mali-valhall-csf.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/gpu/arm,mali-valhall-csf.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM Mali Valhall GPU
10 - Liviu Dudau <liviu.dudau@arm.com>
11 - Boris Brezillon <boris.brezillon@collabora.com>
15 pattern: '^gpu@[a-f0-9]+$'
19 - items:
20 - enum:
[all …]
H A Darm,mali-midgard.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/gpu/arm,mali-midgard.yaml#
5 $schema: http://devicetree.org/meta-schema
[all...]
H A Darm,mali-utgard.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/gpu/arm,mali-utgard.yaml#
5 $schema: http://devicetree.org/meta-schema
[all...]
/freebsd/sys/contrib/device-tree/src/arm/amlogic/
H A Dmeson8b-mxq.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
22 stdout-path = "serial0:115200n8";
30 vcck: regulator-vcck {
31 compatible = "pwm-regulator";
33 regulator-name = "VCCK";
34 regulator-min-microvolt = <860000>;
35 regulator-max-microvolt = <1140000>;
37 pwm-supply = <&vcc_5v>;
[all …]
H A Dmeson8m2-mxiii-plus.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2018 Oleg Ivanov <balbes-150@yandex.ru>
7 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
16 compatible = "tronsmart,mxiii-plus", "amlogic,meson8m2";
26 stdout-path = "serial0:115200n8";
34 adc-keys {
35 compatible = "adc-keys";
36 io-channels = <&saradc 0>;
[all …]
H A Dmeson8b-odroidc1.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
12 model = "Hardkernel ODROID-C1";
13 compatible = "hardkernel,odroid-c1", "amlogic,meson8b";
22 stdout-path = "serial0:115200n8";
30 emmc_pwrseq: emmc-pwrseq {
31 compatible = "mmc-pwrseq-emmc";
32 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
36 compatible = "gpio-leds";
[all …]
H A Dmeson8b-ec100.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
22 stdout-path = "serial0:115200n8";
30 emmc_pwrseq: emmc-pwrseq {
31 compatible = "mmc-pwrseq-emmc";
32 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
35 gpio-keys {
36 compatible = "gpio-keys-polled";
[all …]
/freebsd/sys/contrib/device-tree/src/arm/mediatek/
H A Dmt7623n-bananapi-bpi-r2.dts2 * Copyright 2017-2018 Sean Wang <sean.wang@mediatek.com>
4 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/input/input.h>
13 model = "Bananapi BPI-R2";
14 compatible = "bananapi,bpi-r2", "mediatek,mt7623";
21 stdout-path = "serial2:115200n8";
25 compatible = "hdmi-connector";
28 ddc-i2c-bus = <&hdmiddc0>;
32 remote-endpoint = <&hdmi0_out>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/allwinner/
H A Dsun50i-h6-tanix.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 /dts-v1/;
6 #include "sun50i-h6.dtsi"
7 #include "sun50i-h6-cpu-opp.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
17 stdout-path = "serial0:115200n8";
21 compatible = "hdmi-connector";
22 ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
27 remote-endpoint = <&hdmi_out_con>;
34 compatible = "i2c-gpio";
[all …]
H A Dsun50i-h6-orangepi.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 /dts-v1/;
7 #include "sun50i-h6.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
13 compatible = "xunlong,orangepi-one-plus", "allwinner,sun50i-h6";
20 stdout-path = "serial0:115200n8";
24 compatible = "hdmi-connector";
26 ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
30 remote-endpoint = <&hdmi_out_con>;
35 ext_osc32k: ext-osc32k-clk {
[all …]
H A Dsun50i-h6-beelink-gs1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 /dts-v1/;
6 #include "sun50i-h6.dtsi"
7 #include "sun50i-h6-cpu-opp.dtsi"
8 #include "sun50i-h6-gpu-opp.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
14 compatible = "azw,beelink-gs1", "allwinner,sun50i-h6";
22 stdout-path = "serial0:115200n8";
26 compatible = "hdmi-connector";
28 ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
[all …]
H A Dsun50i-h6-orangepi-3.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 /dts-v1/;
6 #include "sun50i-h6.dtsi"
7 #include "sun50i-h6-cpu-opp.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
13 compatible = "xunlong,orangepi-3", "allwinner,sun50i-h6";
21 stdout-path = "serial0:115200n8";
25 compatible = "hdmi-connector";
26 ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
31 remote-endpoint = <&hdmi_out_con>;
[all …]
H A Dsun50i-h6-pine-h64.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 /dts-v1/;
6 #include "sun50i-h6.dtsi"
7 #include "sun50i-h6-cpu-opp.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
13 compatible = "pine64,pine-h64", "allwinner,sun50i-h6";
22 stdout-path = "serial0:115200n8";
25 ext_osc32k: ext-osc32k-clk {
26 #clock-cells = <0>;
27 compatible = "fixed-clock";
[all …]
/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos5250-arndale.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/clock/samsung,s2mps11.h>
14 #include <dt-bindings/sound/samsung-i2s.h>
32 stdout-path = "serial2:115200n8";
35 gpio-keys {
36 compatible = "gpio-keys";
[all …]
H A Dexynos5250-snow-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/maxim,max77686.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/sound/samsung-i2
[all...]
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3328-roc-pc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 // Copyright (c) 2021 T-Chip Intelligent Technology Co., Ltd
4 /dts-v1/;
6 #include <dt-bindings/input/input.h>
8 #include "rk3328-roc-cc.dts"
11 model = "Firefly ROC-RK3328-PC";
12 compatible = "firefly,roc-rk3328-pc", "rockchip,rk3328";
14 adc-keys {
15 compatible = "adc-keys";
16 io-channels = <&saradc 0>;
[all …]
H A Dpx30-firefly-jd4-core.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
11 compatible = "firefly,px30-jd4-core", "rockchip,px30";
13 emmc_pwrseq: emmc-pwrseq {
14 compatible = "mmc-pwrseq-emmc";
15 pinctrl-0 = <&emmc_reset>;
16 pinctrl-names = "default";
17 reset-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_HIGH>;
20 vcc5v0_sys: vcc5v0-sys-regulator {
[all …]
H A Drk3318-a95x-z2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
4 #include <dt-bindings/input/input.h>
9 compatible = "zkmagic,a95x-z2", "rockchip,rk3318";
19 stdout-path = "serial2:1500000n8";
22 adc-keys {
23 compatible = "adc-keys";
24 io-channel
[all...]
H A Drk3328-a1.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
2 // Copyright (c) 2017-2019 Arm Ltd.
4 /dts-v1/;
9 compatible = "azw,beelink-a1", "rockchip,rk3328";
21 * /---
[all...]
H A Drk3568-radxa-cm3i.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/leds/common.h>
5 #include <dt-bindings/pinctrl/rockchip.h>
16 stdout-path = "serial2:115200n8";
19 gpio-leds {
20 compatible = "gpio-leds";
22 led_user: led-0 {
26 linux,default-trigger = "heartbeat";
27 pinctrl-names = "default";
[all …]
/freebsd/sys/contrib/device-tree/src/arm/rockchip/
H A Drk3229-xms6.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/input/input.h>
23 dc_12v: dc-12v-regulator {
24 compatible = "regulator-fixed";
25 regulator-name = "dc_12v";
26 regulator-always-on;
27 regulator-boot-on;
28 regulator-min-microvolt = <12000000>;
29 regulator-max-microvolt = <12000000>;
[all …]
H A Drk3288-rock2-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/pwm/pwm.h>
12 emmc_pwrseq: emmc-pwrseq {
13 compatible = "mmc-pwrseq-emmc";
14 pinctrl-0 = <&emmc_reset>;
15 pinctrl-names = "default";
16 reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>;
19 ext_gmac: external-gmac-clock {
20 compatible = "fixed-clock";
21 #clock-cells = <0>;
[all …]
H A Drk3288-miqi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
15 stdout-path = "serial2:115200n8";
23 ext_gmac: external-gmac-clock {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <125000000>;
27 clock-output-names = "ext_gmac";
31 compatible = "gpio-leds";
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt8183-pumpkin.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
16 compatible = "mediatek,mt8183-pumpkin", "mediatek,mt8183";
28 stdout-path = "serial0:921600n8";
31 reserved-memory {
32 #address-cells = <2>;
33 #size-cells = <2>;
36 scp_mem_reserved: scp-mem@50000000 {
[all …]

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