Searched +full:ma35d1 +full:- +full:uart (Results 1 – 7 of 7) sorted by relevance
/linux/arch/arm64/boot/dts/nuvoton/ |
H A D | ma35d1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 * Author: Shan-Chun Hung <schung@nuvoton.com> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/clock/nuvoton,ma35d1-clk.h> 12 #include <dt-bindings/reset/nuvoton,ma35d1-reset.h> 15 compatible = "nuvoton,ma35d1"; 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; [all …]
|
H A D | ma35d1-iot-512m.dts | 1 // SPDX-License-Identifier: GPL-2.0 4 * Author: Shan-Chun Hung <schung@nuvoton.com> 8 /dts-v1/; 9 #include "ma35d1.dtsi" 12 model = "Nuvoton MA35D1-IoT"; 13 compatible = "nuvoton,ma35d1-iot", "nuvoton,ma35d1"; 24 stdout-path = "serial0:115200n8"; 32 clk_hxt: clock-hxt { 33 compatible = "fixed-clock"; 34 #clock-cells = <0>; [all …]
|
H A D | ma35d1-som-256m.dts | 1 // SPDX-License-Identifier: GPL-2.0 4 * Author: Shan-Chun Hung <schung@nuvoton.com> 8 /dts-v1/; 9 #include "ma35d1.dtsi" 12 model = "Nuvoton MA35D1-SOM"; 13 compatible = "nuvoton,ma35d1-som", "nuvoton,ma35d1"; 24 stdout-path = "serial0:115200n8"; 32 clk_hxt: clock-hxt { 33 compatible = "fixed-clock"; 34 #clock-cells = <0>; [all …]
|
/linux/Documentation/devicetree/bindings/serial/ |
H A D | nuvoton,ma35d1-serial.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/serial/nuvoton,ma35d1-serial.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Nuvoton MA35D1 Universal Asynchronous Receiver/Transmitter (UART) 10 - Min-Jen Chen <mjchen@nuvoton.com> 11 - Jacky Huang <ychuang3@nuvoton.com> 14 - $ref: serial.yaml 18 const: nuvoton,ma35d1-uart 30 - compatible [all …]
|
/linux/drivers/tty/serial/ |
H A D | ma35d1_serial.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * MA35D1 serial driver 36 /* MA35_IER_REG - Interrupt Enable Register */ 40 #define MA35_IER_RTO_IEN BIT(4) /* RX Time-out Interrupt Enable */ 42 #define MA35_IER_TIME_OUT_EN BIT(11) /* RX Buffer Time-out Counter Enable */ 43 #define MA35_IER_AUTO_RTS BIT(12) /* nRTS Auto-flow Control Enable */ 44 #define MA35_IER_AUTO_CTS BIT(13) /* nCTS Auto-flow Control Enable */ 46 /* MA35_FCR_REG - FIFO Control Register */ 62 /* MA35_LCR_REG - Line Control Register */ 74 /* MA35_MCR_REG - Modem Control Register */ [all …]
|
/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | nuvoton,ma35d1-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/nuvoton,ma35d1-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Nuvoton MA35D1 pin control and GPIO 10 - Shan-Chun Hung <schung@nuvoton.com> 11 - Jacky Huang <ychuang3@nuvoton.com> 14 - $ref: pinctrl.yaml# 19 - nuvoton,ma35d1-pinctrl 24 '#address-cells': [all …]
|
/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
|