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/linux/arch/riscv/kernel/
H A Dkexec_relocate.S24 mv s0, a0
25 mv s1, a1
26 mv s2, a2
27 mv s3, a3
28 mv s4, a4
29 mv s5, zero
30 mv s6, zero
102 mv a0, s3
103 mv a1, s2
104 mv a2, s1
[all …]
H A Dhibernate-asm.S34 mv a0, zero
46 mv s0, a0
47 mv s1, a1
48 mv s2, a2
/linux/Documentation/hwmon/
H A Dina209.rst40 in0_input shunt voltage (mV)
41 in0_input_highest shunt voltage historical maximum reading (mV)
42 in0_input_lowest shunt voltage historical minimum reading (mV)
44 in0_max shunt voltage max alarm limit (mV)
45 in0_min shunt voltage min alarm limit (mV)
46 in0_crit_max shunt voltage crit max alarm limit (mV)
47 in0_crit_min shunt voltage crit min alarm limit (mV)
53 in1_input bus voltage (mV)
54 in1_input_highest bus voltage historical maximum reading (mV)
55 in1_input_lowest bus voltage historical minimum reading (mV)
[all …]
H A Dltc4283.rst50 in1_input Output voltage (mV).
60 in2_input Output voltage (mV).
71 in3_input Output voltage (mV).
82 in4_input Output voltage (mV).
93 in5_input Output voltage (mV).
104 in6_input Output voltage (mV).
115 in7_input Output voltage (mV).
126 in8_input Output voltage (mV).
137 in9_input Output voltage (mV).
148 in10_input Output voltage (mV).
[all …]
H A Dltc4245.rst52 in1_input 12v input voltage (mV)
53 in2_input 5v input voltage (mV)
54 in3_input 3v input voltage (mV)
55 in4_input Vee (-12v) input voltage (mV)
72 in5_input 12v output voltage (mV)
73 in6_input 5v output voltage (mV)
74 in7_input 3v output voltage (mV)
75 in8_input Vee (-12v) output voltage (mV)
/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu13_driver_if_aldebaran.h292 uint16_t MaxVoltageGfx; // In mV(Q2) Maximum Voltage allowable of VDD_GFX
293 uint16_t MaxVoltageSoc; // In mV(Q2) Maximum Voltage allowable of VDD_SOC
342 int16_t GFX_Guardband_Voltage_Cold[8]; // mV [signed]
343 int16_t GFX_Guardband_Voltage_Mid[8]; // mV [signed]
344 int16_t GFX_Guardband_Voltage_Hot[8]; // mV [signed]
347 int16_t SOC_Guardband_Voltage_Cold[8]; // mV [signed]
348 int16_t SOC_Guardband_Voltage_Mid[8]; // mV [signed]
349 int16_t SOC_Guardband_Voltage_Hot[8]; // mV [signed]
353 int16_t DcBtcMin; // mV [signed]
354 int16_t DcBtcMax; // mV [signed]
[all …]
H A Dsmu11_driver_if_sienna_cichlid.h633 uint16_t SmnclkDpmVoltage [NUM_SMNCLK_DPM_LEVELS]; // mV(Q2)
636 uint16_t PerPartDroopVsetGfxDfll[NUM_PIECE_WISE_LINEAR_DROOP_MODEL_VF_POINTS]; //In mV(Q2)
646 uint16_t UlvVoltageOffsetSoc; // In mV(Q2)
647 uint16_t UlvVoltageOffsetGfx; // In mV(Q2)
649 uint16_t MinVoltageUlvGfx; // In mV(Q2) Minimum Voltage ("Vmin") of VDD_GFX in ULV mode
650 uint16_t MinVoltageUlvSoc; // In mV(Q2) Minimum Voltage ("Vmin") of VDD_SOC in ULV mode
652 uint16_t SocLIVmin; // In mV(Q2) Long Idle Vmin (deep ULV), for VDD_SOC
659 uint16_t MinVoltageGfx; // In mV(Q2) Minimum Voltage ("Vmin") of VDD_GFX
660 uint16_t MinVoltageSoc; // In mV(Q2) Minimum Voltage ("Vmin") of VDD_SOC
661 uint16_t MaxVoltageGfx; // In mV(Q2) Maximum Voltage allowable of VDD_GFX
[all …]
H A Dsmu11_driver_if_arcturus.h497 uint16_t UlvVoltageOffsetGfx; // In mV(Q2)
504 uint16_t MinVoltageGfx; // In mV(Q2) Minimum Voltage ("Vmin") of VDD_GFX
505 uint16_t MinVoltageSoc; // In mV(Q2) Minimum Voltage ("Vmin") of VDD_SOC
506 uint16_t MaxVoltageGfx; // In mV(Q2) Maximum Voltage allowable of VDD_GFX
507 uint16_t MaxVoltageSoc; // In mV(Q2) Maximum Voltage allowable of VDD_SOC
526 uint16_t Mp0DpmVoltage [NUM_MP0CLK_DPM_LEVELS]; // mV(Q2)
583 uint16_t DcTol[AVFS_VOLTAGE_COUNT]; // mV Q2
588 uint16_t DcBtcMin[AVFS_VOLTAGE_COUNT]; // mV Q2
589 uint16_t DcBtcMax[AVFS_VOLTAGE_COUNT]; // mV Q2
591 uint16_t DcBtcGb[AVFS_VOLTAGE_COUNT]; // mV Q2
[all …]
H A Dsmu11_driver_if_navi10.h558 uint16_t UlvVoltageOffsetSoc; // In mV(Q2)
559 uint16_t UlvVoltageOffsetGfx; // In mV(Q2)
569 uint16_t MinVoltageUlvGfx; // In mV(Q2) Minimum Voltage ("Vmin") of VDD_GFX in ULV mode
570 uint16_t MinVoltageUlvSoc; // In mV(Q2) Minimum Voltage ("Vmin") of VDD_SOC in ULV mode
574 uint16_t MinVoltageGfx; // In mV(Q2) Minimum Voltage ("Vmin") of VDD_GFX
575 uint16_t MinVoltageSoc; // In mV(Q2) Minimum Voltage ("Vmin") of VDD_SOC
576 uint16_t MaxVoltageGfx; // In mV(Q2) Maximum Voltage allowable of VDD_GFX
577 uint16_t MaxVoltageSoc; // In mV(Q2) Maximum Voltage allowable of VDD_SOC
603 uint16_t Mp0DpmVoltage [NUM_MP0CLK_DPM_LEVELS]; // mV(Q2)
604 uint16_t MemVddciVoltage [NUM_UCLK_DPM_LEVELS]; // mV(Q2)
[all …]
H A Dsmu13_driver_if_v13_0_0.h863 uint16_t InitGfx; // In mV(Q2) , should be 0?
864 uint16_t InitSoc; // In mV(Q2)
865 uint16_t InitU; // In Mv(Q2)
919 uint16_t DcTol; // mV Q2
920 uint16_t DcBtcGb; // mV Q2
922 uint16_t DcBtcMin; // mV Q2
923 uint16_t DcBtcMax; // mV Q2
932 uint16_t VInversion; // in mV Q2
995 …uint16_t UlvVoltageOffset[PMFW_VOLT_PLANE_COUNT]; // In mV(Q2). ULV offset used in either GFX_ULV…
997 uint16_t UlvVoltageOffsetU; // In mV(Q2). ULV offset used in either U_ULV(part of FW_DSTATE)
[all …]
/linux/Documentation/devicetree/bindings/sound/
H A Dcs35l33.txt22 0, then VBST = VP. If greater than 0, the boost voltage will be 3300mV with
23 a value of 1 and will increase at a step size of 100mV until a maximum of
24 8000mV.
62 stage enters LDO operation. Starts as a default value of 50mV for a value
63 of 1 and increases with a step size of 50mV to a maximum of 750mV (value of
80 The reference voltage starts at 3000mV with a value of 0x3 and is increased
81 by 100mV per step to a maximum of 5500mV.
91 1800mV with a step size of 50mV up to a maximum value of 1750mV.
92 Default is 1800mV.
109 cirrus,boost-ctl = <0x30>; /* VBST = 8000mV */
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/volt/
H A Dgk20a.c54 int mv; in gk20a_volt_get_cvb_voltage() local
56 mv = DIV_ROUND_CLOSEST(coef->c2 * speedo, s_scale); in gk20a_volt_get_cvb_voltage()
57 mv = DIV_ROUND_CLOSEST((mv + coef->c1) * speedo, s_scale) + coef->c0; in gk20a_volt_get_cvb_voltage()
58 return mv; in gk20a_volt_get_cvb_voltage()
70 int cvb_mv, mv; in gk20a_volt_get_cvb_t_voltage() local
74 mv = DIV_ROUND_CLOSEST(coef->c3 * speedo, s_scale) + coef->c4 + in gk20a_volt_get_cvb_t_voltage()
76 mv = DIV_ROUND_CLOSEST(mv * temp, t_scale) + cvb_mv; in gk20a_volt_get_cvb_t_voltage()
77 return mv; in gk20a_volt_get_cvb_t_voltage()
84 int mv; in gk20a_volt_calc_voltage() local
86 mv = gk20a_volt_get_cvb_t_voltage(speedo, -10, 100, 10, coef); in gk20a_volt_calc_voltage()
[all …]
/linux/drivers/clk/tegra/
H A Dcvb.c17 int mv; in get_cvb_voltage() local
19 /* apply only speedo scale: output mv = cvb_mv * v_scale */ in get_cvb_voltage()
20 mv = DIV_ROUND_CLOSEST(cvb->c2 * speedo, s_scale); in get_cvb_voltage()
21 mv = DIV_ROUND_CLOSEST((mv + cvb->c1) * speedo, s_scale) + cvb->c0; in get_cvb_voltage()
22 return mv; in get_cvb_voltage()
25 static int round_cvb_voltage(int mv, int v_scale, in round_cvb_voltage() argument
33 uv = max(mv * 1000, offset) - offset; in round_cvb_voltage()
43 static int round_voltage(int mv, const struct rail_alignment *align, int up) in round_voltage() argument
48 uv = max(mv * 1000, align->offset_uv) - align->offset_uv; in round_voltage()
52 return mv; in round_voltage()
/linux/Documentation/devicetree/bindings/regulator/
H A Dmaxim,max8952.yaml46 - 0: 32mV/us
47 - 1: 16mV/us
48 - 2: 8mV/us
49 - 3: 4mV/us
50 - 4: 2mV/us
51 - 5: 1mV/us
52 - 6: 0.5mV/us
53 - 7: 0.25mV/us
54 Defaults to 32mV/us if not specified.
H A Drichtek,rt6160-regulator.yaml14 up to 3A output current from 2025mV to 5200mV. And it support the wide
15 input voltage range from 2200mV to 5500mV.
/linux/arch/sh/kernel/
H A Dmachvec.c22 #define for_each_mv(mv) \ argument
23 for ((mv) = (struct sh_machine_vector *)__machvec_start; \
24 (mv) && (unsigned long)(mv) < (unsigned long)__machvec_end; \
25 (mv)++)
29 struct sh_machine_vector *mv; in get_mv_byname() local
31 for_each_mv(mv) in get_mv_byname()
32 if (strcasecmp(name, mv->mv_name) == 0) in get_mv_byname()
33 return mv; in get_mv_byname()
/linux/arch/riscv/lib/
H A Dtishift.S20 mv a1,a2
27 mv a1,a2
43 mv a1,a2
50 mv a1,a2
66 mv a0,a2
73 mv a0,a2
/linux/include/linux/mfd/
H A Dmenelaus.h21 extern int menelaus_set_vmem(unsigned int mV);
22 extern int menelaus_set_vio(unsigned int mV);
23 extern int menelaus_set_vmmc(unsigned int mV);
24 extern int menelaus_set_vaux(unsigned int mV);
25 extern int menelaus_set_vdcdc(int dcdc, unsigned int mV);
/linux/Documentation/devicetree/bindings/input/
H A Dti,drv260x.yaml67 vib-rated-mv:
71 If this is not set then the value will be defaulted to 3200 mV.
74 vib-overdrive-mv:
78 If this is not set then the value will be defaulted to 3200 mV.
106 vib-rated-mv = <3200>;
107 vib-overdrive-mv = <3200>;
/linux/arch/riscv/purgatory/
H A Dentry.S19 mv s0, a0 /* The hartid of the current hart */
20 mv s1, a1 /* Phys address of the FDT image */
25 mv a0, s0
26 mv a1, s1
/linux/drivers/media/platform/rockchip/rkvdec/
H A Drkvdec-vp9.c69 } mv; member
290 /* mv related 6 x 128 */ in init_inter_probs()
291 memcpy(rkprobs->mv.joint, probs->mv.joint, in init_inter_probs()
292 sizeof(rkprobs->mv.joint)); in init_inter_probs()
293 memcpy(rkprobs->mv.sign, probs->mv.sign, in init_inter_probs()
294 sizeof(rkprobs->mv.sign)); in init_inter_probs()
295 memcpy(rkprobs->mv.classes, probs->mv.classes, in init_inter_probs()
296 sizeof(rkprobs->mv.classes)); in init_inter_probs()
297 memcpy(rkprobs->mv.class0_bit, probs->mv.class0_bit, in init_inter_probs()
298 sizeof(rkprobs->mv.class0_bit)); in init_inter_probs()
[all …]
/linux/drivers/scsi/
H A Dch.c710 struct changer_move mv; in ch_ioctl() local
712 if (copy_from_user(&mv, argp, sizeof (mv))) in ch_ioctl()
715 if (0 != ch_checkrange(ch, mv.cm_fromtype, mv.cm_fromunit) || in ch_ioctl()
716 0 != ch_checkrange(ch, mv.cm_totype, mv.cm_tounit )) { in ch_ioctl()
723 ch->firsts[mv.cm_fromtype] + mv.cm_fromunit, in ch_ioctl()
724 ch->firsts[mv.cm_totype] + mv.cm_tounit, in ch_ioctl()
725 mv.cm_flags & CM_INVERT); in ch_ioctl()
732 struct changer_exchange mv; in ch_ioctl() local
734 if (copy_from_user(&mv, argp, sizeof (mv))) in ch_ioctl()
737 if (0 != ch_checkrange(ch, mv.ce_srctype, mv.ce_srcunit ) || in ch_ioctl()
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Dphy-stm32-usbphyc.yaml110 - <1> increases the level by 5 to 7 mV
111 - <2> increases the level by 10 to 14 mV
112 - <3> decreases the level by 5 to 7 mV
166 - <1> = threshold shift by +7 mV
167 - <2> = threshold shift by -5 mV
168 - <3> = threshold shift by +14 mV
182 - <1> = offset of +5 mV
183 - <2> = offset of +10 mV
184 - <3> = offset of -5 mV
/linux/drivers/mfd/
H A Dmenelaus.c448 static int menelaus_set_voltage(const struct menelaus_vtg *vtg, int mV, in menelaus_set_voltage() argument
463 "to %d mV (reg 0x%02x, val 0x%02x)\n", in menelaus_set_voltage()
464 vtg->name, mV, vtg->vtg_reg, val); in menelaus_set_voltage()
535 dev_dbg(&c->dev, "Setting VCORE FLOOR to %d mV and ROOF to %d mV\n", in menelaus_set_vcore_hw()
573 int menelaus_set_vmem(unsigned int mV) in menelaus_set_vmem() argument
577 if (mV == 0) in menelaus_set_vmem()
580 val = menelaus_get_vtg_value(mV, vmem_values, ARRAY_SIZE(vmem_values)); in menelaus_set_vmem()
583 return menelaus_set_voltage(&vmem_vtg, mV, val, 0x02); in menelaus_set_vmem()
602 int menelaus_set_vio(unsigned int mV) in menelaus_set_vio() argument
606 if (mV == 0) in menelaus_set_vio()
[all …]
/linux/include/linux/regulator/
H A Dmax1586.h17 #define MAX1586_GAIN_NO_R24 1000000 /* 700000 .. 1475000 mV */
18 #define MAX1586_GAIN_R24_3k32 1051098 /* 735768 .. 1550369 mV */
19 #define MAX1586_GAIN_R24_5k11 1078648 /* 755053 .. 1591005 mV */
20 #define MAX1586_GAIN_R24_7k5 1115432 /* 780802 .. 1645262 mV */

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