Searched +full:lvds +full:- +full:cnv +full:- +full:enable (Results 1 – 2 of 2) sorted by relevance
| /linux/Documentation/devicetree/bindings/iio/adc/ |
| H A D | adi,ad4080.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Analog Devices AD4080 20-Bit, 40 MSPS, Differential SAR ADC
11 - Antoniu Miclaus <antoniu.miclaus@analog.com>
14 The AD4080 is a high speed, low noise, low distortion, 20-bit, Easy Drive,
15 successive approximation register (SAR) analog-to-digital converter (ADC).
16 Maintaining high performance (signal-to-noise and distortion (SINAD) ratio
21 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4080.pdf
23 $ref: /schemas/spi/spi-peripheral-props.yaml#
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| /linux/drivers/iio/adc/ |
| H A D | ad4080.c | 1 // SPDX-License-Identifier: GPL-2.0-only
201 return regmap_read(st->regmap, reg, readval); in ad4080_reg_access()
203 return regmap_write(st->regmap, reg, writeval); in ad4080_reg_access()
210 tmp = (st->info->scale_table[0][0] * 1000000ULL) >> in ad4080_get_scale()
211 st->info->channels[0].scan_type.realbits; in ad4080_get_scale()
225 ret = regmap_read(st->regmap, AD4080_REG_FILTER_CONFIG, &data); in ad4080_get_dec_rate()
238 guard(mutex)(&st->lock); in ad4080_set_dec_rate()
240 if ((st->filter_type >= SINC_5 && mode >= 512) || mode < 2) in ad4080_set_dec_rate()
241 return -EINVAL; in ad4080_set_dec_rate()
243 return regmap_update_bits(st->regmap, AD4080_REG_FILTER_CONFIG, in ad4080_set_dec_rate()
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