Searched full:lpddr5 (Results 1 – 5 of 5) sorted by relevance
/linux/Documentation/devicetree/bindings/memory-controllers/ddr/ |
H A D | jedec,lpddr5.yaml | 4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr5.yaml# 7 title: LPDDR5 SDRAM compliant to JEDEC JESD209-5 18 - pattern: "^lpddr5-[0-9a-f]{2},[0-9a-f]{4}$" 19 - const: jedec,lpddr5 41 compatible = "lpddr5-01,0200", "jedec,lpddr5";
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H A D | jedec,lpddr-channel.yaml | 24 - jedec,lpddr5-channel 94 const: jedec,lpddr5-channel 98 $ref: /schemas/memory-controllers/ddr/jedec,lpddr5.yaml#
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/linux/arch/arm64/boot/dts/apple/ |
H A D | t600x-pmgr.dtsi | 138 apple,always-on; /* LPDDR5 interface */ 147 apple,always-on; /* LPDDR5 interface */ 156 apple,always-on; /* LPDDR5 interface */ 165 apple,always-on; /* LPDDR5 interface */ 174 apple,always-on; /* LPDDR5 interface */ 183 apple,always-on; /* LPDDR5 interface */ 192 apple,always-on; /* LPDDR5 interface */ 201 apple,always-on; /* LPDDR5 interface */ 1223 apple,always-on; /* LPDDR5 interface */ 1232 apple,always-on; /* LPDDR5 interface */ [all …]
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/linux/Documentation/devicetree/bindings/memory-controllers/ |
H A D | xlnx,versal-net-ddrmc5.yaml | 13 The integrated DDR Memory Controllers (DDRMCs) support both DDR5 and LPDDR5
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/linux/drivers/i2c/ |
H A D | i2c-smbus.c | 440 case 0x23: /* LPDDR5 */ in i2c_register_spd()
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