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/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dnxp,lpc3220-mic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/nxp,lpc3220-mic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vladimir Zapolskiy <vz@mleia.com>
15 - nxp,lpc3220-mic
16 - nxp,lpc3220-sic
21 interrupt-controller: true
23 '#interrupt-cells':
28 - description: Regular interrupt request
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H A Dnxp,lpc3220-mic.txt4 - compatible: "nxp,lpc3220-mic" or "nxp,lpc3220-sic".
5 - reg: should contain IC registers location and length.
6 - interrupt-controller: identifies the node as an interrupt controller.
7 - #interrupt-cells: the number of cells to define an interrupt, should be 2.
10 IRQ_TYPE_EDGE_RISING = low-to-high edge triggered,
11 IRQ_TYPE_EDGE_FALLING = high-to-low edge triggered,
12 IRQ_TYPE_LEVEL_HIGH = active high level-sensitive,
13 IRQ_TYPE_LEVEL_LOW = active low level-sensitive.
17 - interrupts: empty for MIC interrupt controller, cascaded MIC
23 mic: interrupt-controller@40008000 {
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/freebsd/sys/contrib/device-tree/src/arm/nxp/lpc/
H A Dlpc32xx.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2015-2019 Vladimir Zapolskiy <vz@mleia.com>
9 #include <dt-bindings/clock/lpc32xx-clock.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
15 compatible = "nxp,lpc3220";
16 interrupt-parent = <&mic>;
19 #address-cells = <1>;
20 #size-cells = <0>;
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