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Searched +full:lpc1850 +full:- +full:dwmac (Results 1 – 4 of 4) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dnxp,lpc1850-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/nxp,lpc1850-dwmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP LPC1850 GMAC ethernet controller
10 - Frank Li <Frank.Li@nxp.com>
12 # We need a select here so we don't match all nodes with 'snps,dwmac'
18 - nxp,lpc1850-dwmac
20 - compatible
25 - enum:
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H A Dnxp,lpc1850-dwmac.txt1 * NXP LPC1850 GMAC ethernet controller
7 - compatible: Should contain "nxp,lpc1850-dwmac"
12 compatible = "nxp,lpc1850-dwmac", "snps,dwmac-3.611", "snps,dwmac";
15 interrupt-names = "macirq";
17 clock-names = "stmmaceth";
19 reset-names = "stmmaceth";
/freebsd/sys/contrib/device-tree/Bindings/reset/
H A Dnxp,lpc1850-rgu.txt1 NXP LPC1850 Reset Generation Unit (RGU)
8 - compatible: Should be "nxp,lpc1850-rgu"
9 - reg: register base and length
10 - clocks: phandle and clock specifier to RGU clocks
11 - clock-names: should contain "delay" and "reg"
12 - #reset-cells: should be 1
20 12 ARM Cortex-M0 subsystem core (LPC43xx only)
56 56 ARM Cortex-M0 application core (LPC4370 only)
59 60 ADCHS (12-bit ADC) (LPC4370 only)
65 rgu: reset-controller@40053000 {
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/freebsd/sys/contrib/device-tree/src/arm/nxp/lpc/
H A Dlpc18xx.dtsi9 * Released under the terms of 3-clause BSD License
14 #include "../../armv7-m.dtsi"
16 #include "dt-bindings/clock/lpc18xx-cgu.h"
17 #include "dt-bindings/clock/lpc18xx-ccu.h"
23 #address-cells = <1>;
24 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cell
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