Searched +full:lpc1850 +full:- +full:creg +full:- +full:clk (Results 1 – 3 of 3) sorted by relevance
| /linux/drivers/clk/nxp/ |
| H A D | clk-lpc18xx-creg.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Clk driver for NXP LPC18xx/43xx Configuration Registers (CREG)
8 #include <linux/clk-provider.h>
47 struct clk_creg_data *creg = to_clk_creg(hw); in clk_creg_32k_prepare() local
50 ret = regmap_update_bits(creg->reg, LPC18XX_CREG_CREG0, in clk_creg_32k_prepare()
65 struct clk_creg_data *creg = to_clk_creg(hw); in clk_creg_32k_unprepare() local
67 regmap_update_bits(creg->reg, LPC18XX_CREG_CREG0, in clk_creg_32k_unprepare()
74 struct clk_creg_data *creg = to_clk_creg(hw); in clk_creg_32k_is_prepared() local
77 regmap_read(creg->reg, LPC18XX_CREG_CREG0, ®); in clk_creg_32k_is_prepared()
91 struct clk_creg_data *creg = to_clk_creg(hw); in clk_creg_enable() local
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| /linux/drivers/phy/ |
| H A D | phy-lpc18xx-usb-otg.c | 1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/clk.h>
17 /* USB OTG PHY register offset and bit in CREG */
23 struct clk *clk; member
33 ret = clk_set_rate(lpc->clk, 480000000); in lpc18xx_usb_otg_phy_init()
37 return clk_prepare(lpc->clk); in lpc18xx_usb_otg_phy_init()
44 clk_unprepare(lpc->clk); in lpc18xx_usb_otg_phy_exit()
54 ret = clk_enable(lpc->clk); in lpc18xx_usb_otg_phy_power_on()
58 /* The bit in CREG is cleared to enable the PHY */ in lpc18xx_usb_otg_phy_power_on()
59 ret = regmap_update_bits(lpc->reg, LPC18XX_CREG_CREG0, in lpc18xx_usb_otg_phy_power_on()
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| /linux/arch/arm/boot/dts/nxp/lpc/ |
| H A D | lpc18xx.dtsi | 9 * Released under the terms of 3-clause BSD License
14 #include "../../armv7-m.dtsi"
16 #include "dt-bindings/clock/lpc18xx-cgu.h"
17 #include "dt-bindings/clock/lpc18xx-ccu.h"
23 #address-cells = <1>;
24 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
31 compatible = "arm,cortex-m3";
40 compatible = "fixed-clock";
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