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/linux/Documentation/devicetree/bindings/ipmi/
H A Daspeed,ast2400-kcs-bmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ipmi/aspeed,ast2400-kcs-bmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Jeffery <andrew@aj.id.au>
13 The Aspeed BMC SoCs typically use the Keyboard-Controller-Style (KCS)
14 interfaces on the LPC bus for in-band IPMI communication with their host.
19 - description: Channel ID derived from reg
22 - aspeed,ast2400-kcs-bmc-v2
23 - aspeed,ast2500-kcs-bmc-v2
[all …]
H A Dnpcm7xx-kcs-bmc.txt5 used to perform in-band IPMI communication with their host.
8 - compatible : should be one of
9 "nuvoton,npcm750-kcs-bmc"
10 "nuvoton,npcm845-kcs-bmc", "nuvoton,npcm750-kcs-bmc"
11 - interrupts : interrupt generated by the controller
12 - kcs_chan : The KCS channel number in the controller
17 compatible = "nuvoton,npcm750-lpc-kcs", "simple-mfd", "syscon";
18 reg = <0xf0007000 0x40>;
19 reg-io-width = <1>;
21 #address-cells = <1>;
[all …]
/linux/Documentation/devicetree/bindings/serial/
H A D8250.yaml3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - devicetree@vger.kernel.org
13 - $ref: serial.yaml#
14 - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#
15 - if:
17 - required:
18 - aspeed,lpc-io-reg
19 - required:
20 - aspeed,lpc-interrupts
[all …]
/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-amd-ethanolx.dts1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
6 #include "aspeed-g5.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
12 compatible = "amd,ethanolx-bmc", "aspeed,ast2500";
15 reg = <0x80000000 0x20000000>;
18 reserved-memory {
19 #address-cells = <1>;
20 #size-cells = <1>;
[all …]
H A Daspeed-bmc-tyan-s8036.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "tyan,s8036-bmc", "aspeed,ast2500";
13 stdout-path = &uart5;
19 reg = <0x80000000 0x20000000>;
22 reserved-memory {
23 #address-cells = <1>;
[all …]
H A Daspeed-g6.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6 #include <dt-bindings/clock/ast2600-clock.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
47 #address-cells = <1>;
48 #size-cells = <0>;
49 enable-method = "aspeed,ast2600-smp";
[all …]
H A Daspeed-bmc-amd-daytonax.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "amd,daytonax-bmc", "aspeed,ast2500";
13 reg = <0x80000000 0x20000000>;
16 reserved-memory {
17 #address-cells = <1>;
18 #size-cells = <1>;
[all …]
H A Daspeed-bmc-asrock-spc621d8hm3.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/i2c/i2c.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/leds/common.h>
12 compatible = "asrock,spc621d8hm3-bmc", "aspeed,ast2500";
22 stdout-path = &uart5;
26 reg = <0x80000000 0x20000000>;
[all …]
H A Daspeed-bmc-tyan-s7106.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "tyan,s7106-bmc", "aspeed,ast2500";
13 stdout-path = &uart5;
19 reg = <0x80000000 0x20000000>;
22 reserved-memory {
23 #address-cells = <1>;
[all …]
H A Daspeed-bmc-ibm-bonnell.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
12 compatible = "ibm,bonnell-bmc", "aspeed,ast2600";
23 stdout-path = &uart5;
29 reg = <0x80000000 0x40000000>;
32 reserved-memory {
[all …]
H A Daspeed-bmc-facebook-elbert.dts1 // SPDX-License-Identifier: GPL-2.0+
4 /dts-v1/;
6 #include "ast2600-facebook-netbmc-common.dtsi"
10 compatible = "facebook,elbert-bmc", "aspeed,ast2600";
19 * 8 child channels of PCA9548 2-0075.
31 * 8 child channels of PCA9548 5-0075.
44 stdout-path = &uart5;
48 num-chipselects = <1>;
49 cs-gpios = <&gpio0 ASPEED_GPIO(X, 0) GPIO_ACTIVE_LOW>;
59 aspeed,lpc-io-reg = <0xca8>;
[all …]
H A Daspeed-bmc-opp-tacoma.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
12 compatible = "ibm,tacoma-bmc", "aspeed,ast2600";
15 stdout-path = &uart5;
21 reg = <0x80000000 0x40000000>;
24 reserved-memory {
[all …]
H A Daspeed-bmc-facebook-tiogapass.dts1 // SPDX-License-Identifier: GPL-2.0+
4 /dts-v1/;
6 #include "aspeed-g5.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
8 #include <dt-bindings/i2c/i2c.h>
12 compatible = "facebook,tiogapass-bmc", "aspeed,ast2500";
39 stdout-path = &uart5;
44 reg = <0x80000000 0x20000000>;
47 iio-hwmon {
48 compatible = "iio-hwmon";
[all …]
H A Daspeed-g5.dtsi1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
3 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
10 interrupt-parent = <&vic>;
36 #address-cells = <1>;
37 #size-cells = <0>;
40 compatible = "arm,arm1176jzf-s";
42 reg = <0>;
[all …]
H A Daspeed-g4.dtsi1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
9 interrupt-parent = <&vic>;
35 #address-cells = <1>;
36 #size-cells = <0>;
39 compatible = "arm,arm926ej-s";
41 reg = <0>;
47 reg = <0x40000000 0>;
[all …]
H A Daspeed-bmc-inspur-nf5280m6.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "aspeed-g5.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
12 compatible = "inspur,nf5280m6-bmc", "aspeed,ast2500";
15 stdout-path = &uart5;
20 reg = <0x80000000 0x40000000>;
23 reserved-memory {
[all …]
/linux/drivers/char/ipmi/
H A Dkcs_bmc_aspeed.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2015-2018, Intel Corporation.
6 #define pr_fmt(fmt) "aspeed-kcs-bmc: " fmt
11 #include <linux/io.h>
27 #define DEVICE_NAME "ast-kcs-bmc"
34 * LPCyE Enable LPC channel y
35 * IBFIEy Input Buffer Full IRQ Enable for LPC channel y
36 * IRQxEy Assert SerIRQ x for LPC channel y (Deprecated, use IDyIRQX, IRQXEy)
37 * IDyIRQX Use the specified 4-bit SerIRQ for LPC channel y
38 * SELyIRQX SerIRQ polarity for LPC channel y (low: 0, high: 1)
[all …]
/linux/drivers/tty/serial/8250/
H A D8250_aspeed_vuart.c1 // SPDX-License-Identifier: GPL-2.0+
60 * at what IO port and interrupt number the host side will appear
61 * to the host on the Host <-> BMC LPC bus. It could be different on a
65 static inline u8 aspeed_vuart_readb(struct aspeed_vuart *vuart, u8 reg) in aspeed_vuart_readb() argument
67 return readb(vuart->port->port.membase + reg); in aspeed_vuart_readb()
70 static inline void aspeed_vuart_writeb(struct aspeed_vuart *vuart, u8 val, u8 reg) in aspeed_vuart_writeb() argument
72 writeb(val, vuart->port->port.membase + reg); in aspeed_vuart_writeb()
90 return -EINVAL; in aspeed_vuart_set_lpc_address()
120 u8 reg; in sirq_show() local
122 reg = aspeed_vuart_readb(vuart, ASPEED_VUART_GCRB); in sirq_show()
[all …]
/linux/drivers/reset/
H A Dreset-simple.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 * Maxime Ripard <maxime.ripard@free-electrons.com>
17 #include <linux/io.h>
20 #include <linux/reset-controller.h>
21 #include <linux/reset/reset-simple.h>
38 u32 reg; in reset_simple_update() local
40 spin_lock_irqsave(&data->lock, flags); in reset_simple_update()
42 reg = readl(data->membase + (bank * reg_width)); in reset_simple_update()
43 if (assert ^ data->active_low) in reset_simple_update()
44 reg |= BIT(offset); in reset_simple_update()
[all …]
/linux/drivers/gpu/drm/gma500/
H A Doaktrail_lvds_i2c.c2 * Copyright (c) 2002-2010, Intel Corporation.
27 #include <linux/i2c-algo-bit.h>
30 #include <linux/io.h>
41 * LPC GPIO based I2C bus for LVDS of Atom E6xx
44 /*-----------------------------------------------------------------------------
45 * LPC Register Offsets. Used for LVDS GPIO Bit Bashing. Registers are part
47 ----------------------------------------------------------------------------*/
63 #define LPC_READ_REG(chan, r) inl((chan)->reg + (r))
64 #define LPC_WRITE_REG(chan, r, val) outl((val), (chan)->reg + (r))
140 return ERR_PTR(-ENOMEM); in oaktrail_lvds_i2c_init()
[all …]
/linux/arch/powerpc/kernel/
H A Dlegacy_serial.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <asm/io.h>
16 #include <asm/pci-bridge.h>
17 #include <asm/ppc-pci.h>
43 {.type = "tsi-bridge",},
46 {.compatible = "simple-bus",},
47 {.compatible = "wrs,epld-localbus",},
52 static int legacy_serial_console = -1;
60 offset = offset << p->regshift; in tsi_serial_in()
62 tmp = readl(p->membase + (UART_IIR & ~3)); in tsi_serial_in()
[all …]
/linux/drivers/hwmon/
H A Dit87.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
6 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
14 * Supports: IT8603E Super I/O chip w/LPC interface
15 * IT8620E Super I/O chip w/LPC interface
16 * IT8622E Super I/O chip w/LPC interface
17 * IT8623E Super I/O chip w/LPC interface
18 * IT8628E Super I/O chip w/LPC interface
19 * IT8705F Super I/O chip w/LPC interface
20 * IT8712F Super I/O chip w/LPC interface
[all …]
/linux/drivers/watchdog/
H A Dit8712f_wdt.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2006-2007 Jorge Boncompte - DTI2 <jorge@dti2.net>
11 * IT8712F EC-LPC I/O Preliminary Specification 0.8.2
12 * IT8712F EC-LPC I/O Preliminary Specification 0.9.3
16 * software is provided AS-IS with no warranties.
31 #include <linux/io.h>
36 MODULE_AUTHOR("Jorge Boncompte - DTI2 <jorge@dti2.net>");
53 /* Dog Food address - We use the game port address */
56 #define REG 0x2e /* The register to read/write */ macro
92 static int superio_inb(int reg) in superio_inb() argument
[all …]
/linux/drivers/clk/st/
H A Dclk-flexgen.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * clk-flexgen.c
5 * Copyright (C) ST-Microelectronics SA 2013
6 * Author: Maxime Coquelin <maxime.coquelin@st.com> for ST-Microelectronics.
10 #include <linux/clk-provider.h>
13 #include <linux/io.h>
36 /* Pre-divisor's gate */
38 /* Pre-divisor */
56 struct clk_hw *pgate_hw = &flexgen->pgate.hw; in flexgen_enable()
57 struct clk_hw *fgate_hw = &flexgen->fgate.hw; in flexgen_enable()
[all …]
/linux/drivers/mcb/
H A Dmcb-parse.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/io.h>
9 #include "mcb-internal.h"
47 return -ENOMEM; in chameleon_parse_gdd()
49 reg1 = readl(&gdd->reg1); in chameleon_parse_gdd()
50 reg2 = readl(&gdd->reg2); in chameleon_parse_gdd()
51 offset = readl(&gdd->offset); in chameleon_parse_gdd()
52 size = readl(&gdd->size); in chameleon_parse_gdd()
54 mdev->id = GDD_DEV(reg1); in chameleon_parse_gdd()
55 mdev->rev = GDD_REV(reg1); in chameleon_parse_gdd()
[all …]

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