/linux/drivers/pinctrl/qcom/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 59 Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI 60 (Low Power Island) found on the Qualcomm Technologies Inc SoCs. 68 Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI 69 (Low Power Island) found on the Qualcomm Technologies Inc SC7280 platform. 77 Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI 78 (Low Power Island) found on the Qualcomm Technologies Inc SM4250 platform. 86 Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI 87 (Low Power Island) found on the Qualcomm Technologies Inc SM6115 platform. 95 Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI [all …]
|
/linux/include/linux/ |
H A D | cpu_pm.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 16 * When a CPU goes to a low power state that turns off power to the CPU's 17 * power domain, the contents of some blocks (floating point coprocessors, 18 * interrupt controllers, caches, timers) in the same power domain can 29 * CPU. They are used to save per-cpu context for affected blocks. 31 * CPU cluster notifications apply to all CPUs in a single power domain. They 33 * after all the CPUs in the power domain have been notified of the low power 41 /* A single cpu is entering a low power state */ 44 /* A single cpu failed to enter a low power state */ 47 /* A single cpu is exiting a low power state */ [all …]
|
/linux/drivers/gpu/drm/panfrost/ |
H A D | panfrost_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 6 * (C) COPYRIGHT 2010-2018 ARM Limited. All rights reserved. 57 #define GPU_PWR_KEY 0x50 /* (WO) Power manager key register */ 59 #define GPU_PWR_OVERRIDE0 0x54 /* (RW) Power manager override settings */ 60 #define GPU_PWR_OVERRIDE1 0x58 /* (RW) Power manager override settings */ 93 #define GPU_SHADER_PRESENT_LO 0x100 /* (RO) Shader core present bitmap, low word */ 95 #define GPU_TILER_PRESENT_LO 0x110 /* (RO) Tiler core present bitmap, low word */ 98 #define GPU_L2_PRESENT_LO 0x120 /* (RO) Level 2 cache present bitmap, low word */ 105 #define GPU_STACK_PRESENT_LO 0xE00 /* (RO) Core stack present bitmap, low word */ 108 #define SHADER_READY_LO 0x140 /* (RO) Shader core ready bitmap, low word */ [all …]
|
/linux/kernel/ |
H A D | cpu_pm.c | 1 // SPDX-License-Identifier: GPL-2.0-only 53 * cpu_pm_register_notifier - register a driver with cpu_pm 57 * CPU and CPU cluster low power entry and exit. 74 * cpu_pm_unregister_notifier - unregister a driver with cpu_pm 94 * cpu_pm_enter - CPU low power entry notifier 96 * Notifies listeners that a single CPU is entering a low power state that may 97 * cause some blocks in the same power domain as the cpu to reset. 102 * co-processor, interrupt controller and its PM extensions, local CPU 115 * cpu_pm_exit - CPU low power exit notifier 117 * Notifies listeners that a single CPU is exiting a low power state that may [all …]
|
/linux/Documentation/admin-guide/pm/ |
H A D | sleep-states.rst | 1 .. SPDX-License-Identifier: GPL-2.0 13 Sleep states are global low-power states of the entire system in which user 28 Suspend-to-Idle 29 --------------- 31 This is a generic, pure software, light-weight variant of system suspend (also 34 I/O devices into low-power states (possibly lower-power than available in the 38 The system is woken up from this state by in-band interrupts, so theoretically 43 or :ref:`suspend-to-RAM <s2ram>`, or it can be used in addition to any of the 50 ------- 54 operating state is lost (the system core logic retains power), so the system can [all …]
|
/linux/arch/arm/mach-omap2/ |
H A D | omap-mpuss-lowpower.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * OMAP MPUSS low power code 8 * OMAP4430 MPUSS mainly consists of dual Cortex-A9 with per-CPU 11 * CPU0, CPU1 and MPUSS each have there own power domain and 12 * hence multiple low power combinations of MPUSS are possible. 17 * to the Cortex-A9 processor must be asserted by the external 18 * power controller. 21 * below modes are supported from power gain vs latency point of view. 24 * ---------------------------------------------- 30 * ---------------------------------------------- [all …]
|
/linux/Documentation/devicetree/bindings/mfd/ |
H A D | max77620.txt | 1 MAX77620 Power management IC from Maxim Semiconductor. 4 ------------------- 5 - compatible: Must be one of 9 - reg: I2C device address. 12 ------------------- 13 - interrupts: The interrupt on the parent the controller is 15 - interrupt-controller: Marks the device node as an interrupt controller. 16 - #interrupt-cells: is <2> and their usage is compliant to the 2 cells 17 variant of <../interrupt-controller/interrupts.txt> 19 are defined at dt-bindings/mfd/max77620.h. [all …]
|
/linux/Documentation/hwmon/ |
H A D | ltc2947.rst | 1 Kernel drivers ltc2947-i2c and ltc2947-spi 10 Addresses scanned: - 14 https://www.analog.com/media/en/technical-documentation/data-sheets/LTC2947.pdf 21 The LTC2947 is a high precision power and energy monitor that measures current, 22 voltage, power, temperature, charge and energy. The device supports both SPI 37 The following attributes are supported. Limits are read-write, reset_history 38 is write-only and all the other attributes are read-only. 41 in0_input VP-VM voltage (mV). 49 in0_label Channel label (VP-VM) 61 curr1_input IP-IM Sense current (mA) [all …]
|
H A D | ina2xx.rst | 10 Addresses: I2C 0x40 - 0x4f 20 Addresses: I2C 0x40 - 0x4f 30 Addresses: I2C 0x40 - 0x4f 40 Addresses: I2C 0x40 - 0x4f 50 Addresses: I2C 0x40 - 0x4f 59 ----------- 61 The INA219 is a high-side current shunt and power monitor with an I2C 65 The INA220 is a high or low side current shunt and power monitor with an I2C 68 The INA226 is a current shunt and power monitor with an I2C interface. 71 INA230 and INA231 are high or low side current shunt and power monitors [all …]
|
H A D | pmbus.rst | 12 Addresses scanned: - 23 Addresses scanned: - 27 https://www.onsemi.com/pub_link/Collateral/ADP4000-D.PDF 29 https://www.onsemi.com/pub_link/Collateral/NCP4200-D.PDF 31 https://www.onsemi.com/pub_link/Collateral/JUNE%202009-%20REV.%200.PDF 33 * Lineage Power 37 Addresses scanned: - 55 Addresses scanned: - 73 Addresses scanned: - 83 Addresses scanned: - [all …]
|
/linux/Documentation/driver-api/pm/ |
H A D | devices.rst | 1 .. SPDX-License-Identifier: GPL-2.0 7 Device Power Management Basics 10 :Copyright: |copy| 2010-2011 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc. 17 Most of the code in Linux is device drivers, so most of the Linux power 18 management (PM) code is also driver-specific. Most drivers will do very 22 This writeup gives an overview of how drivers interact with system-wide 23 power management goals, emphasizing the models and interfaces that are 25 background for the domain-specific work you'd do with any specific driver. 28 Two Models for Device Power Management 31 Drivers will use one or both of these models to put devices into low-power [all …]
|
/linux/Documentation/firmware-guide/acpi/ |
H A D | lpit.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 Low Power Idle Table (LPIT) 7 To enumerate platform Low Power Idle states, Intel platforms are using 8 “Low Power Idle Table” (LPIT). More details about this table can be 12 Residencies for each low power state can be read via FFH 18 - CPU PKG C10 (Read via FFH interface) 19 - Platform Controller Hub (PCH) SLP_S0 (Read via memory mapped interface) 32 This is the lowest possible system power state, achieved only when CPU is in 33 PKG C10 and all functional blocks in PCH are in a low power state.
|
/linux/Documentation/power/ |
H A D | pci.rst | 2 PCI Power Management 7 An overview of concepts and the Linux kernel's interfaces related to PCI power 11 This document only covers the aspects of power management specific to PCI 13 power management refer to Documentation/driver-api/pm/devices.rst and 14 Documentation/power/runtime_pm.rst. 18 1. Hardware and Platform Support for PCI Power Management 19 2. PCI Subsystem and Device Power Management 20 3. PCI Device Drivers and Power Management 24 1. Hardware and Platform Support for PCI Power Management 27 1.1. Native and Platform-Based Power Management [all …]
|
/linux/arch/arm/boot/dts/intel/pxa/ |
H A D | pxa300-raumfeld-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include <dt-bindings/gpio/gpio.h> 5 #include <dt-bindings/input/input.h> 6 #include <dt-bindings/interrupt-controller/irq.h> 10 hw-revision = <0>; 14 stdout-path = &ffuart; 22 reg_3v3: regulator-3v3 { 23 compatible = "regulator-fixed"; 24 regulator-name = "3v3-fixed-supply"; 25 regulator-min-microvolt = <3300000>; [all …]
|
H A D | pxa300-raumfeld-controller.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 /dts-v1/; 5 #include "pxa300-raumfeld-common.dtsi" 9 compatible = "raumfeld,raumfeld-controller-pxa303", "marvell,pxa300"; 11 reg_vbatt: regulator-vbatt { 12 compatible = "regulator-fixed"; 13 regulator-name = "vbatt-fixed-supply"; 14 regulator-min-microvolt = <3700000>; 15 regulator-max-microvolt = <3700000>; 16 regulator-always-on; [all …]
|
/linux/Documentation/arch/arm/pxa/ |
H A D | mfp.rst | 7 MFP stands for Multi-Function Pin, which is the pin-mux logic on PXA3xx and 15 mechanism is introduced from PXA3xx to completely move the pin-mux functions 16 out of the GPIO controller. In addition to pin-mux configurations, the MFP 17 also controls the low power state, driving strength, pull-up/down and event 21 +--------+ 22 | |--(GPIO19)--+ 24 | |--(GPIO...) | 25 +--------+ | 26 | +---------+ 27 +--------+ +------>| | [all …]
|
/linux/Documentation/devicetree/bindings/usb/ |
H A D | pxa-usb.txt | 6 - compatible: Should be "marvell,pxa-ohci" for USB controllers 10 - "marvell,enable-port1", "marvell,enable-port2", "marvell,enable-port3" 12 - "marvell,port-mode" selects the mode of the ports: 16 - "marvell,power-sense-low" - power sense pin is low-active. 17 - "marvell,power-control-low" - power control pin is low-active. 18 - "marvell,no-oc-protection" - disable over-current protection. 19 - "marvell,oc-mode-perport" - enable per-port over-current protection. 20 - "marvell,power_on_delay" Power On to Power Good time - in ms. 25 compatible = "marvell,pxa-ohci"; 28 marvell,enable-port1; [all …]
|
H A D | fsl,imx8mp-dwc3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/usb/fsl,imx8mp-dwc3.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Li Jun <jun.li@nxp.com> 15 const: fsl,imx8mp-dwc3 19 - description: Address and length of the register set for HSIO Block Control 20 - description: Address and length of the register set for the wrapper of dwc3 core on the SOC. 22 "#address-cells": 25 "#size-cells": [all …]
|
/linux/Documentation/devicetree/bindings/regulator/ |
H A D | maxim,max77802.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Maxim MAX77802 Power Management IC regulators 10 - Javier Martinez Canillas <javier@dowhile0.org> 11 - Krzysztof Kozlowski <krzk@kernel.org> 14 This is a part of device tree bindings for Maxim MAX77802 Power Management 17 The Maxim MAX77686 provides 10 high-efficiency Buck and 32 Low-DropOut (LDO) 23 Certain regulators support "regulator-initial-mode" and "regulator-mode". 24 The valid modes list is defined in the dt-bindings/regulator/maxim,max77802.h [all …]
|
/linux/Documentation/devicetree/bindings/iio/addac/ |
H A D | adi,ad74115.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Cosmin Tanislav <cosmin.tanislav@analog.com> 13 The AD74115H is a single-channel software configurable input/output 17 chip solution with an SPI interface. The device features a 16-bit ADC and a 18 14-bit DAC. 25 - adi,ad74115h 30 spi-max-frequency: 33 spi-cpol: true [all …]
|
/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | pincfg-node.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/pincfg-node.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Linus Walleij <linus.walleij@linaro.org> 21 bias-disable: 25 bias-high-impedance: 27 description: high impedance mode ("third-state", "floating") 29 bias-bus-hold: 33 bias-pull-up: [all …]
|
/linux/Documentation/devicetree/bindings/power/supply/ |
H A D | maxim,max8903.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/power/supply/maxim,max8903.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sebastian Reichel <sre@kernel.org> 13 - $ref: power-supply.yaml# 19 dok-gpios: 21 description: Valid DC power has been detected (active low, input) 23 uok-gpios: 25 description: Valid USB power has been detected (active low, input) [all …]
|
/linux/drivers/clk/ti/ |
H A D | dpll44xx.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * OMAP4-specific DPLL control functions 20 * can supported when using the DPLL low-power mode. Frequencies are 22 * Status, and Low-Power Operation Mode". 45 mask = clk->flags & CLOCK_CLKOUTX2 ? in omap4_dpllmx_allow_gatectrl() 49 v = ti_clk_ll_ops->clk_readl(&clk->clksel_reg); in omap4_dpllmx_allow_gatectrl() 52 ti_clk_ll_ops->clk_writel(v, &clk->clksel_reg); in omap4_dpllmx_allow_gatectrl() 63 mask = clk->flags & CLOCK_CLKOUTX2 ? in omap4_dpllmx_deny_gatectrl() 67 v = ti_clk_ll_ops->clk_readl(&clk->clksel_reg); in omap4_dpllmx_deny_gatectrl() 70 ti_clk_ll_ops->clk_writel(v, &clk->clksel_reg); in omap4_dpllmx_deny_gatectrl() [all …]
|
/linux/include/linux/ssb/ |
H A D | ssb_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 25 #define SSB_PCIE_DMA_L32 0x00000000U /* PCIE Client Mode sb2pcitranslation2 (2 ZettaBytes), low 32 … 33 #define SSB_MAX_NR_CORES ((SSB_ENUM_LIMIT - SSB_ENUM_BASE) / SSB_CORE_SIZE) 99 #define SSB_TMSLOW 0x0F98 /* SB Target State Low */ 105 #define SSB_TMSLOW_PE 0x40000000 /* Power Management Enable */ 108 #define SSB_TMSHIGH_SERR 0x00000001 /* S-error */ 158 #define SSB_IDHIGH_RCLO 0x0000000F /* Revision Code (low part) */ 168 * in two-byte quantities. 202 #define SSB_SPROM1_BINF_ANTBG 0x3000 /* Available B-PHY and G-PHY antennas */ 204 #define SSB_SPROM1_BINF_ANTA 0xC000 /* Available A-PHY antennas */ [all …]
|
/linux/Documentation/devicetree/bindings/leds/ |
H A D | leds-bcm6358.txt | 5 which can either be controlled by software (exporting the 74x164 as spi-gpio. 10 - compatible : should be "brcm,bcm6358-leds". 11 - #address-cells : must be 1. 12 - #size-cells : must be 0. 13 - reg : BCM6358 LED controller address and size. 16 - brcm,clk-div : SCK signal divider. Possible values are 1, 2, 4 and 8. 18 - brcm,clk-dat-low : Boolean, makes clock and data signals active low. 21 Each LED is represented as a sub-node of the brcm,bcm6358-leds device. 23 LED sub-node required properties: 24 - reg : LED pin number (only LEDs 0 to 31 are valid). [all …]
|