| /linux/Documentation/userspace-api/media/v4l/ |
| H A D | pixfmt-srggb10-ipu3.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-pix-fmt-ipu3-sbggr10:
4 .. _v4l2-pix-fmt-ipu3-sgbrg10:
5 .. _v4l2-pix-fmt-ipu3-sgrbg10:
6 .. _v4l2-pix-fmt-ipu3-srggb10:
13 10-bit Bayer formats
24 In other respects this format is similar to :ref:`V4L2-PIX-FMT-SRGGB10`.
36 .. flat-table::
38 * - start + 0:
39 - B\ :sub:`0000low`
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| H A D | pixfmt-srggb10.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-SRGGB10:
4 .. _v4l2-pix-fmt-sbggr10:
5 .. _v4l2-pix-fmt-sgbrg10:
6 .. _v4l2-pix-fmt-sgrbg10:
16 10-bit Bayer formats expanded to 16 bits
23 sample. Each sample is stored in a 16-bit word, with 6 unused
24 high bits filled with zeros. Each n-pixel row contains n/2 green samples and
37 .. flat-table::
38 :header-rows: 0
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| H A D | pixfmt-srggb16.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-SRGGB16:
4 .. _v4l2-pix-fmt-sbggr16:
5 .. _v4l2-pix-fmt-sgbrg16:
6 .. _v4l2-pix-fmt-sgrbg16:
15 16-bit Bayer formats
23 sample. Each sample is stored in a 16-bit word. Each n-pixel row contains
32 .. flat-table::
33 :header-rows: 0
34 :stub-columns: 0
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| H A D | pixfmt-srggb12.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-SRGGB12:
4 .. _v4l2-pix-fmt-sbggr12:
5 .. _v4l2-pix-fmt-sgbrg12:
6 .. _v4l2-pix-fmt-sgrbg12:
17 12-bit Bayer formats expanded to 16 bits
24 colour. Each colour component is stored in a 16-bit word, with 4 unused
25 high bits filled with zeros. Each n-pixel row contains n/2 green samples
38 .. flat-table::
39 :header-rows: 0
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| H A D | pixfmt-srggb14.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-SRGGB14:
4 .. _v4l2-pix-fmt-sbggr14:
5 .. _v4l2-pix-fmt-sgbrg14:
6 .. _v4l2-pix-fmt-sgrbg14:
15 14-bit Bayer formats expanded to 16 bits
23 colour. Each sample is stored in a 16-bit word, with two unused high
24 bits filled with zeros. Each n-pixel row contains n/2 green samples
36 .. flat-table::
37 :header-rows: 0
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| H A D | pixfmt-srggb10p.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-SRGGB10P:
4 .. _v4l2-pix-fmt-sbggr10p:
5 .. _v4l2-pix-fmt-sgbrg10p:
6 .. _v4l2-pix-fmt-sgrbg10p:
16 10-bit packed Bayer formats
28 Each n-pixel row contains n/2 green samples and n/2 blue or red samples,
29 with alternating green-red and green-blue rows. They are conventionally
38 .. flat-table::
39 :header-rows: 0
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| /linux/include/linux/ |
| H A D | bma150.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
25 bool any_motion_int; /* Set to enable any-motion interrupt */
26 bool hg_int; /* Set to enable high-G interrupt */
27 bool lg_int; /* Set to enable low-G interrupt */
28 unsigned char any_motion_dur; /* Any-motion duration */
29 unsigned char any_motion_thres; /* Any-motion threshold */
30 unsigned char hg_hyst; /* High-G hysterisis */
31 unsigned char hg_dur; /* High-G duration */
32 unsigned char hg_thres; /* High-G threshold */
33 unsigned char lg_hyst; /* Low-G hysterisis */
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| /linux/lib/crc/arm/ |
| H A D | crc-t10dif-core.S | 2 // Accelerated CRC-T10DIF using ARM NEON and Crypto Extensions instructions
14 // Implement fast CRC-T10DIF computation with SSE and PCLMULQDQ instructions
62 // /white-papers/fast-crc-computation-generic-polynomials-pclmulqdq-paper.pdf
75 .arch armv8-a
76 .fpu crypto-neon-fp-armv8
116 * Pairwise long polynomial multiplication of two 16-bit values
120 * by two 64-bit values
125 * significant. The resulting 80-bit vectors are XOR'ed together.
148 * and after performing 8x8->16 bit long polynomial multiplication of
150 * we obtain the following four vectors of 16-bit elements:
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| /linux/lib/crc/arm64/ |
| H A D | crc-t10dif-core.S | 2 // Accelerated CRC-T10DIF using arm64 NEON and Crypto Extensions instructions
5 // Copyright (C) 2019-2024 Google LLC
17 // Implement fast CRC-T10DIF computation with SSE and PCLMULQDQ instructions
65 // /white-papers/fast-crc-computation-generic-polynomials-pclmulqdq-paper.pdf
72 .arch armv8-a+crypto
96 * Pairwise long polynomial multiplication of two 16-bit values
100 * by two 64-bit values
128 * and after performing 8x8->16 bit long polynomial multiplication of
130 * we obtain the following four vectors of 16-bit elements:
141 * 80-bit results.
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| /linux/Documentation/arch/arm64/ |
| H A D | kdump.rst | 9 reserved memory is needed to pre-load the kdump kernel and boot such
21 large chunk of memomy can be found. The low memory reservation needs to
24 - crashkernel=size@offset
25 - crashkernel=size
26 - crashkernel=size,high crashkernel=size,low
28 Low memory and high memory
31 For kdump reservations, low memory is the memory area under a specific
32 limit, usually decided by the accessible address bits of the DMA-capable
34 vmcore dumping can be ignored. On arm64, the low memory upper bound is
35 not fixed: it is 1G on the RPi4 platform but 4G on most other systems.
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| /linux/include/linux/ssb/ |
| H A D | ssb_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
25 #define SSB_PCIE_DMA_L32 0x00000000U /* PCIE Client Mode sb2pcitranslation2 (2 ZettaBytes), low 32 …
33 #define SSB_MAX_NR_CORES ((SSB_ENUM_LIMIT - SSB_ENUM_BASE) / SSB_CORE_SIZE)
99 #define SSB_TMSLOW 0x0F98 /* SB Target State Low */
108 #define SSB_TMSHIGH_SERR 0x00000001 /* S-error */
158 #define SSB_IDHIGH_RCLO 0x0000000F /* Revision Code (low part) */
168 * in two-byte quantities.
189 #define SSB_SPROM1_IL0MAC 0x0048 /* 6 bytes MAC address for 802.11b/g */
202 #define SSB_SPROM1_BINF_ANTBG 0x3000 /* Available B-PHY and G-PHY antennas */
204 #define SSB_SPROM1_BINF_ANTA 0xC000 /* Available A-PHY antennas */
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| /linux/Documentation/devicetree/bindings/iio/accel/ |
| H A D | adi,adxl380.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices ADXL380/382 3-Axis Digital Accelerometer
10 - Ramona Gradinariu <ramona.gradinariu@analog.com>
11 - Antoniu Miclaus <antoniu.miclaus@analog.com>
14 The ADXL380/ADXL382 is a low noise density, low power, 3-axis
16 supports the ±4 g, ±8 g, and ±16 g ranges, and the ADXL382 supports
17 ±15 g, ±30 g, and ±60 g ranges.
24 - adi,adxl380
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| /linux/Documentation/driver-api/ |
| H A D | slimbus.rst | 9 ----------------
10 SLIMbus (Serial Low Power Interchip Media Bus) is a specification developed by
12 configuration, and is a 2-wire multi-drop implementation (clock, and data).
15 (System-on-Chip) and peripheral components (typically codec). SLIMbus uses
16 Time-Division-Multiplexing to accommodate multiple data channels, and
20 management, configuration and status updates. These messages can be unicast (e.g.
21 reading/writing device specific values), or multicast (e.g. data channel
24 A data channel is used for data-transfer between 2 SLIMbus devices. Data
28 ---------------------
34 A generic device is a device providing application functionality (e.g. codec).
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| /linux/drivers/firmware/imx/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
8 DSP exists on some i.MX8 processors (e.g i.MX8QM, i.MX8QXP).
18 The System Controller Firmware (SCFW) is a low-level system function
19 which runs on a dedicated Cortex-M core to provide power, clock, and
20 resource management. It exists on some i.MX8 processors. e.g. i.MX8QM
32 a low-level system function which runs on a dedicated Cortex-M
43 a low-level system function which runs on a dedicated Cortex-M
54 a low-level system function which runs on a dedicated Cortex-M
|
| /linux/drivers/pwm/ |
| H A D | pwm-keembay.c | 1 // SPDX-License-Identifier: GPL-2.0
7 * Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
10 * - Upon disabling a channel, the currently running
68 * for all valid masks (e.g. KMB_PWM_LEADIN_MASK) that they are ok.
73 u32 buff = readl(priv->base + offset); in keembay_pwm_update_bits()
76 writel(buff, priv->base + offset); in keembay_pwm_update_bits()
95 unsigned long long high, low; in keembay_pwm_get_state() local
99 clk_rate = clk_get_rate(priv->clk); in keembay_pwm_get_state()
102 highlow = readl(priv->base + KMB_PWM_LEADIN_OFFSET(pwm->hwpwm)); in keembay_pwm_get_state()
104 state->enabled = true; in keembay_pwm_get_state()
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| /linux/drivers/net/wireless/broadcom/b43/ |
| H A D | phy_g.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 /* OFDM PHY registers are defined in the A-PHY header. */
9 #define B43_PHY_VERSION_CCK B43_PHY_CCK(0x00) /* Versioning register for B-PHY */
12 #define B43_PHY_PGACTL_LPF 0x1000 /* Low pass filter (?) */
13 #define B43_PHY_PGACTL_LOWBANDW 0x0040 /* Low bandwidth flag */
24 /* Extended G-PHY Registers */
26 #define B43_PHY_GTABCTL B43_PHY_EXTG(0x03) /* G-PHY table control (see below) */
27 #define B43_PHY_GTABOFF 0x03FF /* G-PHY table offset (see below) */
28 #define B43_PHY_GTABNR 0xFC00 /* G-PHY table number (see below) */
30 #define B43_PHY_GTABDATA B43_PHY_EXTG(0x04) /* G-PHY table data */
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| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
16 This driver supports the new BCM43xx IEEE 802.11G devices, but not
20 supports (A, B, G or a combination).
21 IEEE 802.11G devices can talk to IEEE 802.11B AccessPoints.
27 b43-fwcutter.
61 # Auto-select SSB PCI-HOST support, if possible
69 # Auto-select SSB PCICORE driver, if possible
81 Broadcom 43xx device support for Soft-MAC SDIO devices.
83 With this config option you can drive Soft-MAC b43 cards with a
87 Note that this does not support Broadcom 43xx Full-MAC devices.
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| /linux/Documentation/arch/arm/pxa/ |
| H A D | mfp.rst | 7 MFP stands for Multi-Function Pin, which is the pin-mux logic on PXA3xx and
15 mechanism is introduced from PXA3xx to completely move the pin-mux functions
16 out of the GPIO controller. In addition to pin-mux configurations, the MFP
17 also controls the low power state, driving strength, pull-up/down and event
21 +--------+
22 | |--(GPIO19)--+
24 | |--(GPIO...) |
25 +--------+ |
26 | +---------+
27 +--------+ +------>| |
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| /linux/arch/arm/boot/dts/marvell/ |
| H A D | dove-cm-a510.dtsi | 2 * Device Tree include for Compulab CM-A510 System-on-Module
6 * This file is dual-licensed: you can use it either under the terms
46 * The CM-A510 comes with several optional components:
50 * D1024: 1G
66 * U2: 2 dual-role USB2.0 ports
70 * W: Broadcom BCM4319 802.11b/g/n (USI WM-N-BM-01 on SDIO1)
72 * GPIOs used on CM-A510:
73 * 1 GbE PHY reset (active low)
75 * 8 PowerOff (active low)
76 * 13 Touchscreen pen irq (active low)
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| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | snps,dw-apb-ictl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/snps,dw-apb-ictl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
11 - Zhen Lei <thunder.leizhen@huawei.com>
16 with APB bus, e.g. Marvell Armada 1500. It can also be used as primary
17 interrupt controller in some SoCs, e.g. Hisilicon SD5203.
21 const: snps,dw-apb-ictl
26 interrupt-controller: true
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| /linux/arch/x86/crypto/ |
| H A D | polyval-clmulni_asm.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
6 * This is an efficient implementation of POLYVAL using intel PCLMULQDQ-NI
16 * modulus g(x) = x^128 + x^127 + x^126 + x^121 + 1.
20 * two-step process only requires 1 finite field reduction for every 8
54 * Performs schoolbook1_iteration on two lists of 128-bit polynomials of length
66 * Computes the product of two 128-bit polynomials at the memory locations
68 * the 256-bit product into LO, MI, HI.
79 * Later, the 256-bit result can be extracted as:
116 * Computes the 256-bit polynomial represented by LO, HI, MI. Stores
128 * Computes the 128-bit reduction of PH : PL. Stores the result in dest.
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| /linux/Documentation/timers/ |
| H A D | hrtimers.rst | 2 hrtimers - subsystem for high-resolution kernel timers
5 This patch introduces a new subsystem for high-resolution kernel timers.
9 back and forth trying to integrate high-resolution and high-precision
11 such high-resolution timer implementations in practice, we came to the
18 - the forced handling of low-resolution and high-resolution timers in
21 32-bitness assumptions, and has been honed and micro-optimized for a
23 for many years - and thus even small extensions to it easily break
26 current usage - but it is simply not suitable to be extended for
27 high-res timers.
29 - the unpredictable [O(N)] overhead of cascading leads to delays which
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| /linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/ |
| H A D | pub.h | 29 #define PHY_TYPE_G 2 /* Phy type G */
31 #define PHY_TYPE_LP 5 /* Phy type Low Power A/B/G */
34 #define PHY_TYPE_LCNXN 9 /* Phy type 2-stream N */
35 #define PHY_TYPE_HT 7 /* Phy type 3-Stream N */
42 #define BRCMS_RSSI_MINVAL -200 /* Low value, e.g. for forcing roam */
43 #define BRCMS_RSSI_NO_SIGNAL -91 /* NDIS RSSI link quality cutoffs */
44 #define BRCMS_RSSI_VERY_LOW -80 /* Very low quality cutoffs */
45 #define BRCMS_RSSI_LOW -70 /* Low quality cutoffs */
46 #define BRCMS_RSSI_GOOD -68 /* Good quality cutoffs */
47 #define BRCMS_RSSI_VERY_GOOD -58 /* Very good quality cutoffs */
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| /linux/arch/arm64/crypto/ |
| H A D | polyval-ce-core.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
18 * modulus g(x) = x^128 + x^127 + x^126 + x^121 + 1.
22 * two-step process only requires 1 finite field reduction for every 8
65 .arch armv8-a+crypto
72 * Computes the product of two 128-bit polynomials in X and Y and XORs the
73 * components of the 256-bit product into LO, MI, HI.
84 * Later, the 256-bit result can be extracted as:
129 * Computes the 256-bit polynomial represented by LO, HI, MI. Stores
154 * Computes the 128-bit reduction of PH : PL. Stores the result in dest.
156 * This macro computes p(x) mod g(x) where p(x) is in montgomery form and g(x) =
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| /linux/Documentation/userspace-api/media/cec/ |
| H A D | cec-ioc-dqevent.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 CEC_DQEVENT - Dequeue a CEC event
35 non-blocking mode and no event is pending, then it will return -1 and
38 The internal event queues are per-filehandle and per-event type. If
42 possible to read two successive events that have the same value (e.g.
43 two :ref:`CEC_EVENT_STATE_CHANGE <CEC-EVENT-STATE-CHANGE>` events with
51 .. flat-table:: struct cec_event_state_change
52 :header-rows: 0
53 :stub-columns: 0
56 * - __u16
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