Home
last modified time | relevance | path

Searched +full:low +full:- +full:frequency (Results 1 – 25 of 1050) sorted by relevance

12345678910>>...42

/linux/Documentation/devicetree/bindings/iio/filter/
H A Dadi,admv8818.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ADMV8818 Digitally Tunable, High-Pass and Low-Pass Filter
10 - Antoniu Miclaus <antoniu.miclaus@analog.com>
14 features a digitally selectable frequency of operation.
15 The device features four independently controlled high-pass
16 filters (HPFs) and four independently controlled low-pass filters
17 (LPFs) that span the 2 GHz to 18 GHz frequency range.
24 - adi,admv8818
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dallwinner,sun55i-a523-ccu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun55i-a523-ccu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andre Przywara <andre.przywara@arm.com>
13 "#clock-cells":
16 "#reset-cells":
21 - allwinner,sun55i-a523-ccu
22 - allwinner,sun55i-a523-mcu-ccu
23 - allwinner,sun55i-a523-r-ccu
[all …]
/linux/drivers/media/rc/
H A Dite-cir.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
9 #define ITE_DRIVER_NAME "ite-cir"
34 /* hw-specific operation function pointers; most of these must be
89 /* rx low carrier frequency, in Hz, 0 means no demodulation */
92 /* tx high carrier frequency, in Hz, 0 means no demodulation */
95 /* tx carrier frequency, in Hz */
98 /* duty cycle, 0-100 */
114 /* low-speed carrier frequency limits (Hz) */
118 /* high-speed carrier frequency limits (Hz) */
130 * n in RDCR produces a tolerance of +/- n * 6.25% around the center
[all …]
/linux/Documentation/admin-guide/media/
H A Dsi476x.rst1 .. SPDX-License-Identifier: GPL-2.0
12 -------------------
14 - According to the SiLabs' datasheet it is possible to update the
15 firmware of the radio chip in the run-time, thus bringing it to the
23 -------------------------------
31 * /sys/kernel/debug/<device-name>/acf
44 frequency is lower than threshold
46 frequency is lower than threshold
52 0x05 smute 0 - Audio is not soft muted
53 1 - Audio is soft muted
[all …]
/linux/drivers/cpufreq/
H A Dpowernow-k8.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * (c) 2003-2006 Advanced Micro Devices, Inc.
9 u32 numps; /* number of p-states */
10 u32 batps; /* number of p-states supported on battery */
13 * vid/fid pairings, but are modified during the ->target() call
26 /* the powernow_table includes all frequency and vid/fid pairings:
28 * frequency is in kHz */
32 * used to determine valid frequency/vid/fid states */
36 * handle hotplug events - so just point at cpufreq pol->cpus
53 /* Model Specific Registers for p-state transitions. MSRs are 64-bit. For */
[all …]
H A Dlongrun.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
21 * longrun_{low,high}_freq is needed for the conversion of cpufreq kHz
23 * performance_pctg = (current_freq - low_freq)/(high_freq - low_freq)
29 * longrun_get_policy - get the current LongRun policy
40 pr_debug("longrun flags are %x - %x\n", msr_lo, msr_hi); in longrun_get_policy()
42 policy->policy = CPUFREQ_POLICY_PERFORMANCE; in longrun_get_policy()
44 policy->policy = CPUFREQ_POLICY_POWERSAVE; in longrun_get_policy()
47 pr_debug("longrun ctrl is %x - %x\n", msr_lo, msr_hi); in longrun_get_policy()
53 policy->min = policy->max = longrun_high_freq; in longrun_get_policy()
[all …]
/linux/include/linux/mfd/
H A Dsi476x-reports.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * include/media/si476x-platform.h -- Definitions of the data formats
15 * struct si476x_rsq_status - structure containing received signal
18 * true - Indicatedes that the value is below
20 * false - Indicatedes that the value is above
22 * @multlint: Multipath Detect Low.
23 * true - Indicatedes that the value is below
25 * false - Indicatedes that the value is above
28 * true - Indicatedes that the value is below
30 * false - Indicatedes that the value is above
[all …]
/linux/Documentation/devicetree/bindings/clock/ti/
H A Ddpll.txt4 register-mapped DPLL with usually two selectable input clocks
8 modes (locked, low power stop etc.) This binding has several
9 sub-types, which effectively result in slightly different setup
12 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
15 - compatible : shall be one of:
16 "ti,omap3-dpll-clock",
17 "ti,omap3-dpll-core-clock",
18 "ti,omap3-dpll-per-clock",
19 "ti,omap3-dpll-per-j-type-clock",
20 "ti,omap4-dpll-clock",
[all …]
/linux/tools/testing/selftests/powerpc/benchmarks/
H A Dnull_syscall.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2009-2015 Anton Blanchard, IBM
27 unsigned long low; in mftb() local
29 asm volatile("mftb %0" : "=r" (low)); in mftb()
31 return low; in mftb()
74 /* Try to get out of low power/low frequency mode */ in get_proc_frequency()
99 /* Find fastest clock frequency */ in get_proc_frequency()
109 override = getenv("FREQUENCY"); in get_proc_frequency()
146 elapsed_ns = (tv_now.tv_sec - tv_start.tv_sec) * 1000000000ULL + in main()
147 (tv_now.tv_nsec - tv_start.tv_nsec); in main()
[all …]
/linux/arch/arm/boot/dts/realtek/
H A Drtd1195.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
3 * Copyright (c) 2017-2019 Andreas Färber
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/realtek,rtd1195.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <1>;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-a7";
[all …]
/linux/arch/arm64/boot/dts/realtek/
H A Drtd129x.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
5 * Copyright (c) 2016-2019 Andreas Färber
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/reset/realtek,rtd1295.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <1>;
20 reserved-memory {
21 #address-cells = <1>;
22 #size-cells = <1>;
[all …]
H A Drtd139x.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/reset/realtek,rtd1295.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <1>;
19 reserved-memory {
20 #address-cells = <1>;
21 #size-cells = <1>;
34 no-map;
[all …]
/linux/include/linux/clk/
H A Dti.h1 /* SPDX-License-Identifier: GPL-2.0-only */
10 #include <linux/clk-provider.h>
14 * struct clk_omap_reg - OMAP register declaration
29 * struct dpll_data - DPLL registers and integration data
43 * @max_multiplier: maximum valid non-bypass multiplier value (actual)
45 * @min_divider: minimum valid non-bypass divider value (actual)
46 * @max_divider: maximum valid non-bypass divider value (actual)
56 * @lpmode_mask: mask of the DPLL low-power mode bitfield in @control_reg
61 * @ssc_deltam_reg: register containing the DPLL SSC frequency spreading
62 * @ssc_modfreq_reg: register containing the DPLL SSC modulation frequency
[all …]
/linux/drivers/iio/gyro/
H A Dmpu3050.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 * enum mpu3050_fullscale - indicates the full range of the sensor in deg/sec
19 * enum mpu3050_lpf - indicates the low pass filter width
22 /* This implicity sets sample frequency to 8 kHz */
24 /* All others sets the sample frequency to 1 kHz */
42 * struct mpu3050 - instance state container for the device
50 * @lpf: digital low pass filter setting for the device
51 * @divisor: base frequency divider: divides 8 or 1 kHz
52 * @calibration: the three signed 16-bit calibration settings that
55 * @trig: trigger for the MPU-3050 interrupt, if present
[all …]
/linux/drivers/iio/frequency/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Frequency
6 # Phase-Locked Loop (PLL) frequency synthesizers
10 menu "Frequency Synthesizers DDS/PLL"
15 tristate "Analog Devices AD9523 Low Jitter Clock Generator"
18 Say yes here to build support for Analog Devices AD9523 Low Jitter
27 # Phase-Locked Loop (PLL) frequency synthesizers
30 menu "Phase-Locked Loop (PLL) frequency synthesizers"
100 Downconverter with integrated Fractional-N PLL and VCO.
/linux/Documentation/devicetree/bindings/iio/frequency/
H A Dadi,adf4350.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/frequency/adi,adf4350.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
15 - adi,adf4350
16 - adi,adf4351
21 spi-max-frequency:
28 clock-names:
31 '#clock-cells':
[all …]
H A Dadi,admv1014.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/frequency/adi,admv1014.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Antoniu Miclaus <antoniu.miclaus@analog.com>
14 radio designs operating in the 24 GHz to 44 GHz frequency range.
21 - adi,admv1014
26 spi-max-frequency:
32 clock-names:
34 - const: lo_in
[all …]
/linux/drivers/clk/mstar/
H A Dclk-msc313-cpupll.c1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/clk-provider.h>
17 * 0x140 -- LPF low. Seems to store one half of the clock transition
19 * 0x148 -- LPF high. Seems to store one half of the clock transition
21 * 0x150 -- vendor code says "toggle lpf enable"
22 * 0x154 -- mu?
23 * 0x15c -- lpf_update_count?
24 * 0x160 -- vendor code says "switch to LPF". Clock source config? Register bank?
25 * 0x164 -- vendor code says "from low to high" which seems to mean transition from LPF low to
27 * 0x174 -- Seems to be the PLL lock status bit
[all …]
/linux/arch/arm/boot/dts/nuvoton/
H A Dnuvoton-npcm730-gbs.dts1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
5 #include "nuvoton-npcm730.dtsi"
6 #include <dt-bindings/gpio/gpio.h>
10 compatible = "quanta,gbs-bmc","nuvoton,npcm730";
71 stdout-path = &serial0;
78 gpio-keys {
79 compatible = "gpio-keys";
80 sas-cable0 {
81 label = "sas-cable0";
[all …]
/linux/tools/power/x86/x86_energy_perf_policy/
H A Dx86_energy_perf_policy.81 .\" This page Copyright (C) 2010 - 2015 Len Brown <len.brown@intel.com>
5 x86_energy_perf_policy \- Manage Energy vs. Performance Policy
10 .RB "scope: \-\-cpu\ cpu-list | \-\-pkg\ pkg-list"
12 .RB "cpu-list, pkg-list: # | #,# | #-# | all"
14 .RB "field: \-\-all | \-\-epb | \-\-hwp-epp | \-\-hwp-min | \-\-hwp-max | \-\-hwp-desired"
16 .RB "other: (\-\-force | \-\-hwp-enable | \-\-turbo-enable) value)"
18 .RB "soc-slider: --soc-slider-balance # | --soc-slider-offset # | --platform-profile <name>"
20 .RB "value: # | default | performance | balance-performance | balance-power | power"
23 displays and updates energy-performance policy settings specific to
27 While \fBx86_energy_perf_policy\fP can manage energy-performance policy
[all …]
/linux/arch/powerpc/boot/dts/
H A Dtqm8xx.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
9 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <0>;
31 d-cache-line-size = <16>; // 16 bytes
32 i-cache-line-size = <16>; // 16 bytes
33 d-cache-size = <0x1000>; // L1, 4K
34 i-cache-size = <0x1000>; // L1, 4K
[all …]
/linux/drivers/clk/ti/
H A Ddpll44xx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * OMAP4-specific DPLL control functions
19 * Maximum DPLL input frequency (FINT) and output frequency (FOUT) that
20 * can supported when using the DPLL low-power mode. Frequencies are
22 * Status, and Low-Power Operation Mode".
45 mask = clk->flags & CLOCK_CLKOUTX2 ? in omap4_dpllmx_allow_gatectrl()
49 v = ti_clk_ll_ops->clk_readl(&clk->clksel_reg); in omap4_dpllmx_allow_gatectrl()
52 ti_clk_ll_ops->clk_writel(v, &clk->clksel_reg); in omap4_dpllmx_allow_gatectrl()
63 mask = clk->flags & CLOCK_CLKOUTX2 ? in omap4_dpllmx_deny_gatectrl()
67 v = ti_clk_ll_ops->clk_readl(&clk->clksel_reg); in omap4_dpllmx_deny_gatectrl()
[all …]
/linux/sound/soc/fsl/
H A Dfsl_rpmsg.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright 2017-2021 NXP
20 * struct fsl_rpmsg - rpmsg private data
25 * @pll8k: parent clock for multiple of 8kHz frequency
26 * @pll11k: parent clock for multiple of 11kHz frequency
30 * @force_lpa: force enable low power audio routine if condition satisfy
31 * @enable_lpa: enable low power audio routine according to dts setting
/linux/sound/pci/lx6464es/
H A Dlx_core.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* -*- linux-c -*- *
5 * low-level interface
21 /* low-level register access */
96 /* low-level dsp access */
104 /* low-level pipe handling */
118 /* low-level stream handling */
147 /* low-level buffer handling */
158 /* low-level gain/peak handling */
181 #define HEADER_FMT_UPTO11 0x00000200 /* frequency is less or equ. to 11k.
[all …]
/linux/Documentation/devicetree/bindings/media/
H A Dpxa-camera.txt4 - compatible: Should be "marvell,pxa270-qci"
5 - reg: register base and size
6 - interrupts: the interrupt number
7 - any required generic properties defined in video-interfaces.txt
10 - clocks: input clock (see clock-bindings.txt)
11 - clock-output-names: should contain the name of the clock driving the
13 - clock-frequency: host interface is driving MCLK, and MCLK rate is this rate
18 compatible = "marvell,pxa270-qci";
23 clock-names = "ciclk";
24 clock-frequency = <50000000>;
[all …]

12345678910>>...42