Home
last modified time | relevance | path

Searched +full:link +full:- +full:trigger +full:- +full:order +full:- +full:stop (Results 1 – 25 of 179) sorted by relevance

12345678

/linux/Documentation/devicetree/bindings/sound/
H A Daudio-graph-port.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/audio-graph-port.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
15 port-base:
17 - $ref: /schemas/graph.yaml#/$defs/port-base
18 - $ref: /schemas/sound/dai-params.yaml#
20 mclk-fs:
21 $ref: simple-card.yaml#/definitions/mclk-fs
[all …]
/linux/include/dt-bindings/sound/
H A Daudio-graph.h1 /* SPDX-License-Identifier: GPL-2.0
3 * audio-graph.h
12 * link-trigger-order
13 * link-trigger-order-start
14 * link-trigger-order-stop
17 * link-trigger-order = <SND_SOC_TRIGGER_LINK
/linux/sound/soc/sof/
H A Dipc4-pcm.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
11 #include "sof-audio.h"
12 #include "sof-priv.h"
14 #include "ipc4-priv.h"
15 #include "ipc4-topology.h"
16 #include "ipc4-fw-reg.h"
19 * struct sof_ipc4_timestamp_info - IPC4 timestamp info
42 * struct sof_ipc4_pcm_stream_priv - IPC4 specific private data
53 * Modulus to use to compare host and link position counters. The sampling
57 * the wrap-around point of any hardware counter, and larger than any
[all …]
H A Dsof-audio.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
22 #include "sof-priv.h"
24 #define SOF_AUDIO_PCM_DRV_NAME "sof-audio-component"
69 return volume_map[size - 1]; in mixer_to_ipc()
83 return i - 1; in ipc_to_mixer()
94 int dai_data; /* contains DAI-specific information */
95 int dai_node_id; /* contains DAI-specific information for Gateway configuration */
99 * struct sof_ipc_pcm_ops - IPC-specific PCM ops
102 * @trigger: Function pointer for trigger
103 * @dai_link_fixup: Function pointer for DAI link fixup
[all …]
H A Dipc3-topology.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
12 #include "sof-priv.h"
13 #include "sof-audio.h"
14 #include "ipc3-priv.h"
92 /* BE DAI link */
337 [SOF_DAI_LINK_TOKENS] = {"DAI link tokens", dai_link_tokens, ARRAY_SIZE(dai_link_tokens)},
354 * sof_comp_alloc - allocate and initialize buffer for a new component
367 size_t ext_size = sizeof(swidget->uuid); in sof_comp_alloc()
369 /* only non-zero UUID is valid */ in sof_comp_alloc()
370 if (!guid_is_null(&swidget->uuid)) in sof_comp_alloc()
[all …]
/linux/drivers/comedi/drivers/
H A Dquatech_daqp_cs.c1 // SPDX-License-Identifier: GPL-2.0
8 * COMEDI - Linux Control and Measurement Device Interface
13 * ftp://ftp.quatech.com/Manuals/daqp-208.pdf
15 * This manual is for both the DAQP-208 and the DAQP-308.
18 * - A/D conversion
19 * - 8 channels
20 * - 4 gain ranges
21 * - ground ref or differential
22 * - single-shot and timed both supported
23 * - D/A conversion, single-shot
[all …]
/linux/tools/perf/pmu-events/arch/x86/haswellx/
H A Duncore-interconnect.json111 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic Transactions as Secondary",
116 "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary",
121 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Transactions as Secondary",
126 "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary",
131 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write Transactions as Secondary",
136 "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary",
141 "BriefDescription": "Misc Events - Set 0; Fastpath Rejects",
146 "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Rejects",
151 "BriefDescription": "Misc Events - Set 0; Fastpath Requests",
156 "PublicDescription": "Counts Timeouts - Se
[all...]
H A Duncore-cache.json27 "BriefDescription": "LLC misses - demand and prefetch data reads - excludes LLC prefetches. Derived from unc_c_tor_inserts.miss_opcode",
111 "BriefDescription": "LLC misses - Uncacheable reads (from cpu) . Derived from unc_c_tor_inserts.miss_opcode",
214 "PublicDescription": "Since occupancy counts can only be captured in the Cbo's 0 counter, this event allows a user to capture occupancy related information by filtering the Cb0 occupancy count captured in Counter 0. The filtering available is found in the control register - threshold, invert and edge detect. E.g. setting threshold to 1 can effectively monitor how many cycles the monitored queue has an entry.",
227 "BriefDescription": "All LLC Misses (code+ data rd + data wr - including demand and prefetch)",
233 "PublicDescription": "Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:18] bits correspond to [FMESI] state.; Filters for any transaction originating from the IPQ or IRQ. This does not include lookups originating from the ISMQ.",
244 "PublicDescription": "Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:18] bits correspond to [FMESI] state.; Read transactions",
254 "PublicDescription": "Counts the number of times the LLC was accessed - thi
[all...]
/linux/tools/perf/pmu-events/arch/x86/broadwellx/
H A Duncore-interconnect.json111 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic Transactions as Secondary",
116 "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary",
121 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Transactions as Secondary",
126 "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary",
131 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write Transactions as Secondary",
136 "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary",
141 "BriefDescription": "Misc Events - Set 0; Fastpath Rejects",
146 "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Rejects",
151 "BriefDescription": "Misc Events - Set 0; Fastpath Requests",
156 "PublicDescription": "Counts Timeouts - Se
[all...]
H A Duncore-cache.json27 "BriefDescription": "LLC misses - demand and prefetch data reads - excludes LLC prefetches. Derived from unc_c_tor_inserts.miss_opcode",
111 "BriefDescription": "LLC misses - Uncacheable reads (from cpu) . Derived from unc_c_tor_inserts.miss_opcode",
214 "PublicDescription": "Since occupancy counts can only be captured in the Cbo's 0 counter, this event allows a user to capture occupancy related information by filtering the Cb0 occupancy count captured in Counter 0. The filtering available is found in the control register - threshold, invert and edge detect. E.g. setting threshold to 1 can effectively monitor how many cycles the monitored queue has an entry.",
227 "BriefDescription": "All LLC Misses (code+ data rd + data wr - including demand and prefetch)",
233 "PublicDescription": "Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:18] bits correspond to [FMESI] state.; Filters for any transaction originating from the IPQ or IRQ. This does not include lookups originating from the ISMQ.",
244 "PublicDescription": "Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:18] bits correspond to [FMESI] state.; Read transactions",
254 "PublicDescription": "Counts the number of times the LLC was accessed - thi
[all...]
/linux/drivers/net/wireless/intel/iwlwifi/fw/
H A Dfile.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2008-2014, 2018-2024 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
23 u8 data[]; /* in same order a
[all...]
/linux/sound/soc/generic/
H A Dsimple-card-utils.c1 // SPDX-License-Identifier: GPL-2.0
3 // simple-card-utils.c
7 #include <dt-bindings/sound/audio-graph.h>
28 int val = -EINVAL; in simple_util_get_sample_fmt()
42 if (!strcmp(data->convert_sample_format, in simple_util_get_sample_fmt()
79 snprintf(prop, sizeof(prop), "%s%s", prefix, "convert-rate"); in simple_util_parse_convert()
80 of_property_read_u32(np, prop, &data->convert_rate); in simple_util_parse_convert()
83 snprintf(prop, sizeof(prop), "%s%s", prefix, "convert-channels"); in simple_util_parse_convert()
84 of_property_read_u32(np, prop, &data->convert_channels); in simple_util_parse_convert()
87 snprintf(prop, sizeof(prop), "%s%s", prefix, "convert-sample-format"); in simple_util_parse_convert()
[all …]
/linux/tools/perf/pmu-events/arch/x86/jaketown/
H A Duncore-interconnect.json164 "BriefDescription": "BL Ingress Occupancy - DRS",
189 "BriefDescription": "BL Ingress Occupancy - NCB",
214 "BriefDescription": "BL Ingress Occupancy - NCS",
256 …ddition to the source queue. Note the special filtering equation. We do OR-reduction on the requ…
266 …ddition to the source queue. Note the special filtering equation. We do OR-reduction on the requ…
276 …ddition to the source queue. Note the special filtering equation. We do OR-reduction on the requ…
322 … devices). This can be used in conjunction with the allocations event in order to calculate avera…
331 …er of cycles when there are pending write ACK's in the switch but the switch->IRP pipeline is not …
340 …h the 'GT/s' speed of the QPI link. For example, a 8GT/s link will have qfclk or 1GHz. JKT does …
349 …Counts the number of CTO (cluster trigger outs) events that were asserted across the two slots. I…
[all …]
/linux/tools/perf/pmu-events/arch/x86/ivytown/
H A Duncore-interconnect.json164 "BriefDescription": "BL Ingress Occupancy - DRS",
189 "BriefDescription": "BL Ingress Occupancy - NCB",
214 "BriefDescription": "BL Ingress Occupancy - NCS",
236 …ny requests behind it in the switch queue will lose ownership and have to re-acquire it later when…
256 …ddition to the source queue. Note the special filtering equation. We do OR-reduction on the requ…
266 …ddition to the source queue. Note the special filtering equation. We do OR-reduction on the requ…
276 …ddition to the source queue. Note the special filtering equation. We do OR-reduction on the requ…
286 …ddition to the source queue. Note the special filtering equation. We do OR-reduction on the requ…
332 … devices). This can be used in conjunction with the allocations event in order to calculate avera…
341 …er of cycles when there are pending write ACK's in the switch but the switch->IRP pipeline is not …
[all …]
/linux/Documentation/driver-api/nfc/
H A Dnfc-hci.rst5 - Author: Eric Lapuyade, Samuel Ortiz
6 - Contact: eric.lapuyade@intel.com, samuel.ortiz@intel.com
9 -------
12 enables easy writing of HCI-based NFC drivers. The HCI layer runs as an NFC Core
17 ---
30 - one for executing commands : nfc_hci_msg_tx_work(). Only one command
32 - one for dispatching received events and commands : nfc_hci_msg_rx_work().
35 --------------------------
41 In case the chip supports pre-opened gates and pseudo-static pipes, the driver
45 -------------------
[all …]
/linux/Documentation/hid/
H A Dintel-ish-hid.rst6 processing to a dedicated low power co-processor. This allows the core
11 Sensor usage tables. These may be found in tablets, 2-in-1 convertible laptops
27 ----------------- ----------------------
28 | USB HID | --> | ISH HID |
29 ----------------- ----------------------
30 ----------------- ----------------------
31 | USB protocol | --> | ISH Transport |
32 ----------------- ----------------------
33 ----------------- ----------------------
34 | EHCI/XHCI | --> | ISH IPC |
[all …]
/linux/drivers/net/wireless/ath/ath5k/
H A Ddma.c2 * Copyright (c) 2004-2008 Reyk Floeter <reyk@openbsd.org>
3 * Copyright (c) 2006-2008 Nick Kossifidis <mickflemm@gmail.com>
26 * Here we setup descriptor pointers (rxdp/txdp) start/stop dma engine and
44 * ath5k_hw_start_rx_dma() - Start DMA receive
55 * ath5k_hw_stop_rx_dma() - Stop DMA receive
70 i--) in ath5k_hw_stop_rx_dma()
75 "failed to stop RX DMA !\n"); in ath5k_hw_stop_rx_dma()
77 return i ? 0 : -EBUSY; in ath5k_hw_stop_rx_dma()
81 * ath5k_hw_get_rxdp() - Get RX Descriptor's address
91 * ath5k_hw_set_rxdp() - Set RX Descriptor's address
[all …]
/linux/drivers/net/phy/
H A Dphy.c1 // SPDX-License-Identifier: GPL-2.0+
39 #include "phylib-internal.h"
40 #include "phy-caps.h"
67 if (old_state != phydev->state) { in phy_process_state_change()
68 phydev_dbg(phydev, "PHY state change %s -> %s\n", in phy_process_state_change()
70 phy_state_to_str(phydev->state)); in phy_process_state_change()
71 if (phydev->drv && phydev->dr in phy_process_state_change()
[all...]
H A Dphylink.c1 // SPDX-License-Identifier: GPL-2.0
4 * technologies such as SFP cages where the PHY is hot-pluggable.
23 #include "phy-caps.h"
38 * struct phylink - internal data type for phylink
55 u8 link_port; /* The current non-phy ethtool port */
59 /* The link configuration settings */
70 /* Serialize updates to pl->phydev with phylink_resolve() */
103 if ((pl)->confi
[all...]
/linux/tools/perf/pmu-events/arch/x86/cascadelakex/
H A Duncore-cache.json25 …"BriefDescription": "LLC misses - Uncacheable reads (from cpu). Derived from unc_cha_tor_inserts.i…
694 …"PublicDescription": "Counts the number of transactions that trigger a configurable number of cros…
705 …"PublicDescription": "Counts the number of transactions that trigger a configurable number of cros…
716 …"PublicDescription": "Counts the number of transactions that trigger a configurable number of cros…
726 …"PublicDescription": "Counts the number of transactions that trigger a configurable number of cros…
737 …"PublicDescription": "Counts the number of transactions that trigger a configurable number of cros…
748 …"PublicDescription": "Counts the number of transactions that trigger a configurable number of cros…
758 …"PublicDescription": "Counts the number of transactions that trigger a configurable number of cros…
769 …"PublicDescription": "Counts the number of transactions that trigger a configurable number of cros…
780 …"PublicDescription": "Counts the number of transactions that trigger a configurable number of cros…
[all …]
/linux/tools/perf/pmu-events/arch/x86/skylakex/
H A Duncore-cache.json637 "PublicDescription": "Counts the number of transactions that trigger a configurable number of cross snoops. Cores are snooped if the transaction looks up the cache and determines that it is necessary based on the operation type and what CoreValid bits are set. For example, if 2 CV bits are set on a data read, the cores must have the data in S state so it is not necessary to snoop them. However, if only 1 CV bit is set the core my have modified the data. If the transaction was an RFO, it would need to invalidate the lines. This event can be filtered based on who triggered the initial snoop(s).",
648 "PublicDescription": "Counts the number of transactions that trigger a configurable number of cross snoops. Cores are snooped if the transaction looks up the cache and determines that it is necessary based on the operation type and what CoreValid bits are set. For example, if 2 CV bits are set on a data read, the cores must have the data in S state so it is not necessary to snoop them. However, if only 1 CV bit is set the core my have modified the data. If the transaction was an RFO, it would need to invalidate the lines. This event can be filtered based on who triggered the initial snoop(s).",
659 "PublicDescription": "Counts the number of transactions that trigger a configurable number of cross snoops. Cores are snooped if the transaction looks up the cache and determines that it is necessary based on the operation type and what CoreValid bits are set. For example, if 2 CV bits are set on a data read, the cores must have the data in S state so it is not necessary to snoop them. However, if only 1 CV bit is set the core my have modified the data. If the transaction was an RFO, it would need to invalidate the lines. This event can be filtered based on who triggered the initial snoop(s).",
669 "PublicDescription": "Counts the number of transactions that trigger a configurable number of cross snoops. Cores are snooped if the transaction looks up the cache and determines that it is necessary based on the operation type and what CoreValid bits are set. For example, if 2 CV bits are set on a data read, the cores must have the data in S state so it is not necessary to snoop them. However, if only 1 CV bit is set the core my have modified the data. If the transaction was an RFO, it would need to invalidate the lines. This event can be filtered based on who triggered the initial snoop(s).",
680 "PublicDescription": "Counts the number of transactions that trigger a configurable number of cross snoops. Cores are snooped if the transaction looks up the cache and determines that it is necessary based on the operation type and what CoreValid bits are set. For example, if 2 CV bits are set on a data read, the cores must have the data in S state so it is not necessary to snoop them. However, if only 1 CV bit is set the core my have modified the data. If the transaction was an RFO, it would need to invalidate the lines. This event can be filtered based on who triggered the initial snoop(s).",
691 "PublicDescription": "Counts the number of transactions that trigger a configurable number of cross snoops. Cores are snooped if the transaction looks up the cache and determines that it is necessary based on the operation type and what CoreValid bits are set. For example, if 2 CV bits are set on a data read, the cores must have the data in S state so it is not necessary to snoop them. However, if only 1 CV bit is set the core my have modified the data. If the transaction was an RFO, it would need to invalidate the lines. This event can be filtered based on who triggered the initial snoop(s).",
701 "PublicDescription": "Counts the number of transactions that trigger a configurable number of cross snoops. Cores are snooped if the transaction looks up the cache and determines that it is necessary based on the operation type and what CoreValid bits are set. For example, if 2 CV bits are set on a data read, the cores must have the data in S state so it is not necessary to snoop them. However, if only 1 CV bit is set the core my have modified the data. If the transaction was an RFO, it would need to invalidate the lines. This event can be filtered based on who triggered the initial snoop(s).",
712 "PublicDescription": "Counts the number of transactions that trigger a configurable number of cross snoops. Cores are snooped if the transaction looks up the cache and determines that it is necessary based on the operation type and what CoreValid bits are set. For example, if 2 CV bits are set on a data read, the cores must have the data in S state so it is not necessary to snoop them. However, if only 1 CV bit is set the core my have modified the data. If the transaction was an RFO, it would need to invalidate the lines. This event can be filtered based on who triggered the initial snoop(s).",
723 "PublicDescription": "Counts the number of transactions that trigger a configurable number of cross snoops. Cores are snooped if the transaction looks up the cache and determines that it is necessary based on the operation type and what CoreValid bits are set. For example, if 2 CV bits are set on a data read, the cores must have the data in S state so it is not necessary to snoop them. However, if only 1 CV bit is set the core my have modified the data. If the transaction was an RFO, it would need to invalidate the lines. This event can be filtered based on who triggered the initial snoop(s).",
734 "PublicDescription": "Counts the number of transactions that trigger
[all...]
/linux/Documentation/driver-api/media/drivers/
H A Dcx2341x-devel.rst1 .. SPDX-License-Identifier: GPL-2.0
7 -----------------------
12 .. note:: the memory long words are little-endian ('intel format').
21 .. code-block:: none
23 ivtvctl -O min=0x02000000,max=0x020000ff
26 register space :-).
35 .. code-block:: none
37 0x00000000-0x00ffffff Encoder memory space
38 0x00000000-0x0003ffff Encode.rom
39 ???-??? MPEG buffer(s)
[all …]
/linux/tools/perf/pmu-events/arch/x86/broadwellde/
H A Duncore-cache.json23 "PublicDescription": "Since occupancy counts can only be captured in the Cbo's 0 counter, this event allows a user to capture occupancy related information by filtering the Cb0 occupancy count captured in Counter 0. The filtering available is found in the control register - threshold, invert and edge detect. E.g. setting threshold to 1 can effectively monitor how many cycles the monitored queue has an entry.",
41 "PublicDescription": "Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:18] bits correspond to [FMESI] state.; Filters for any transaction originating from the IPQ or IRQ. This does not include lookups originating from the ISMQ.",
51 "PublicDescription": "Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:18] bits correspond to [FMESI] state.; Read transactions",
61 "PublicDescription": "Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:18] bits correspond to [FMESI] state.; Qualify one of the other subevents by the Target NID. The NID is programmed in Cn_MSR_PMON_BOX_FILTER.nid. In conjunction with STATE = I, it is possible to monitor misses to specific NIDs in the system.",
71 "PublicDescription": "Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:18] bits correspond to [FMESI] state.; Read transactions",
81 "PublicDescription": "Counts the number of times the LLC was accessed - thi
[all...]
/linux/drivers/net/wireless/ti/wlcore/
H A Dconf.h1 /* SPDX-License-Identifier: GPL-2.0-only */
117 * Range: 0 - 0xFFFFFFFF
130 * after a PS-poll has been transmitted.
132 * Range: 0 - 200000
139 * Range: 0 - 200000
147 * Range: 0 - 4096
161 * Occupied Rx mem-blocks number which requires interrupting the host
177 * Max time in msec the FW may delay RX-Complete interrupt.
179 * Range: 1 - 100
273 * Range: bit 0: Truncate - when set, FW attempts to send a frame stop
[all …]
/linux/drivers/net/ethernet/actions/
H A Dowl-emac.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/dma-mapping.h>
19 #include "owl-emac.h"
27 return readl(priv->base + reg); in owl_emac_reg_read()
32 writel(data, priv->base + reg); in owl_emac_reg_write()
63 return priv->netdev->dev.parent; in owl_emac_get_dev()
70 * Note the NIE and AIE bits shall also be set in order to actually in owl_emac_irq_enable()
129 return dma_map_single(dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE); in owl_emac_dma_map_tx()
142 return CIRC_SPACE(ring->head, ring->tail, ring->size); in owl_emac_ring_num_unused()
148 return (cur + 1) & (ring->size - 1); in owl_emac_ring_get_next()
[all …]

12345678