| /linux/net/netfilter/ipvs/ |
| H A D | ip_vs_wlc.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * IPVS: Weighted Least-Connection Scheduling module
12 * Wensong Zhang : changed for the d-linked destination list
26 * Weighted Least Connection scheduling
32 struct ip_vs_dest *dest, *least; in ip_vs_wlc_schedule() local
39 * (dest overhead) / dest->weight in ip_vs_wlc_schedule()
41 * Remember -- no floats in kernel mode!!! in ip_vs_wlc_schedule()
50 list_for_each_entry_rcu(dest, &svc->destinations, n_list) { in ip_vs_wlc_schedule()
51 if (!(dest->flags & IP_VS_DEST_F_OVERLOAD) && in ip_vs_wlc_schedule()
52 atomic_read(&dest->weight) > 0) { in ip_vs_wlc_schedule()
[all …]
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| H A D | ip_vs_lc.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * IPVS: Least-Connection Scheduling module
21 * Least Connection scheduling
27 struct ip_vs_dest *dest, *least = NULL; in ip_vs_lc_schedule() local
33 * Simply select the server with the least number of in ip_vs_lc_schedule()
41 list_for_each_entry_rcu(dest, &svc->destinations, n_list) { in ip_vs_lc_schedule()
42 if ((dest->flags & IP_VS_DEST_F_OVERLOAD) || in ip_vs_lc_schedule()
43 atomic_read(&dest->weight) == 0) in ip_vs_lc_schedule()
46 if (!least || doh < loh) { in ip_vs_lc_schedule()
47 least = dest; in ip_vs_lc_schedule()
[all …]
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| H A D | ip_vs_nq.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
11 * The NQ algorithm adopts a two-speed model. When there is an idle server
20 * pages 986-994, 1988.
45 return atomic_read(&dest->activeconns) + 1; in ip_vs_nq_dest_overhead()
50 * Weighted Least Connection scheduling
56 struct ip_vs_dest *dest, *least = NULL; in ip_vs_nq_schedule() local
63 * (server expected overhead) / dest->weight in ip_vs_nq_schedule()
65 * Remember -- no floats in kernel mode!!! in ip_vs_nq_schedule()
74 list_for_each_entry_rcu(dest, &svc->destinations, n_list) { in ip_vs_nq_schedule()
76 if (dest->flags & IP_VS_DEST_F_OVERLOAD || in ip_vs_nq_schedule()
[all …]
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| H A D | ip_vs_sed.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
22 * pages 986-994, 1988.
49 return atomic_read(&dest->activeconns) + 1; in ip_vs_sed_dest_overhead()
54 * Weighted Least Connection scheduling
60 struct ip_vs_dest *dest, *least; in ip_vs_sed_schedule() local
67 * (server expected overhead) / dest->weight in ip_vs_sed_schedule()
69 * Remember -- no floats in kernel mode!!! in ip_vs_sed_schedule()
78 list_for_each_entry_rcu(dest, &svc->destinations, n_list) { in ip_vs_sed_schedule()
79 if (!(dest->flags & IP_VS_DEST_F_OVERLOAD) && in ip_vs_sed_schedule()
80 atomic_read(&dest->weight) > 0) { in ip_vs_sed_schedule()
[all …]
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| H A D | ip_vs_lblcr.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * IPVS: Locality-Based Least-Connection with Replication scheduler
8 * Julian Anastasov : Added the missing (dest->weight>0)
16 * n, serverSet[dest_ip] <- {weighted least-conn node};
18 * n <- {least-conn (alive) node in serverSet[dest_ip]};
22 * n <- {weighted least-conn node};
25 * now - serverSet[dest_ip].lastMod > T then
26 * m <- {most conn node in serverSet[dest_ip]};
29 * serverSet[dest_ip].lastMod <- now;
80 #define IP_VS_LBLCR_TAB_MASK (IP_VS_LBLCR_TAB_SIZE - 1)
[all …]
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| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
10 IP Virtual Server support will let you build a high-performance
12 option must be enabled for at least one of the clustered computers
75 IP VS was compiled built-in.
116 tristate "round-robin scheduling"
118 The robin-robin scheduling algorithm simply directs network
119 connections to different real servers in a round-robin manner.
125 tristate "weighted round-robin scheduling"
127 The weighted robin-robin scheduling algorithm directs network
129 in a round-robin manner. Servers with higher weights receive
[all …]
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| H A D | ip_vs_lblc.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * IPVS: Locality-Based Least-Connection scheduling module
9 * *lock(tbl->lock) ==> *lock(&tbl->lock)
10 * Wensong Zhang : fixed the uninitialized tbl->lock bug
23 * n, cachenode[dest_ip] <- {weighted least-conn node};
25 * n <- cachenode[dest_ip];
29 * n, cachenode[dest_ip] <- {weighted least-conn node};
81 #define IP_VS_LBLC_TAB_MASK (IP_VS_LBLC_TAB_SIZE - 1)
135 ip_vs_dest_put_and_free(en->dest); in ip_vs_lblc_rcu_free()
141 hlist_del_rcu(&en->list); in ip_vs_lblc_del()
[all …]
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| /linux/tools/testing/selftests/rcutorture/doc/ |
| H A D | TREE_RCU-kconfig.txt | 1 This document gives a brief rationale for the TREE_RCU-related test
7 CONFIG_DEBUG_LOCK_ALLOC -- Do three, covering CONFIG_PROVE_LOCKING & not.
8 CONFIG_DEBUG_OBJECTS_RCU_HEAD -- Do one.
9 CONFIG_HZ_PERIODIC -- Do one.
10 CONFIG_NO_HZ_IDLE -- Do those not otherwise specified. (Groups of two.)
11 CONFIG_NO_HZ_FULL -- Do two, one with partial CPU enablement.
12 CONFIG_PREEMPT -- Do half. (First three and #8.)
13 CONFIG_PROVE_LOCKING -- Do several, covering CONFIG_DEBUG_LOCK_ALLOC=y and not.
14 CONFIG_PROVE_RCU -- Hardwired to CONFIG_PROVE_LOCKING.
15 CONFIG_RCU_BOOST -- one of PREEMPT_RCU.
[all …]
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| /linux/tools/perf/pmu-events/arch/x86/skylakex/ |
| H A D | pipeline.json | 3 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
130 …"PublicDescription": "Counts speculatively miss-predicted indirect branches at execution time. Cou…
187 …"PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that…
209 …"BriefDescription": "Core crystal clock cycles when at least one thread on the physical core is un…
242 …"BriefDescription": "Core crystal clock cycles when at least one thread on the physical core is un…
269 …"BriefDescription": "Core cycles when at least one thread on the physical core is not in halt stat…
285 …"BriefDescription": "Core cycles when at least one thread on the physical core is not in halt stat…
412 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
429 …tion. For instructions that consist of multiple micro-ops, Counts the retirement of the last micro…
434 "BriefDescription": "Number of instructions retired. General Counter - architectural event",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/cascadelakex/ |
| H A D | pipeline.json | 3 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
130 …"PublicDescription": "Counts speculatively miss-predicted indirect branches at execution time. Cou…
187 …"PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that…
209 …"BriefDescription": "Core crystal clock cycles when at least one thread on the physical core is un…
242 …"BriefDescription": "Core crystal clock cycles when at least one thread on the physical core is un…
269 …"BriefDescription": "Core cycles when at least one thread on the physical core is not in halt stat…
285 …"BriefDescription": "Core cycles when at least one thread on the physical core is not in halt stat…
412 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
429 …tion. For instructions that consist of multiple micro-ops, Counts the retirement of the last micro…
434 "BriefDescription": "Number of instructions retired. General Counter - architectural event",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/skylake/ |
| H A D | pipeline.json | 3 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
130 …"PublicDescription": "Counts speculatively miss-predicted indirect branches at execution time. Cou…
199 …"BriefDescription": "Core crystal clock cycles when at least one thread on the physical core is un…
232 …"BriefDescription": "Core crystal clock cycles when at least one thread on the physical core is un…
259 …"BriefDescription": "Core cycles when at least one thread on the physical core is not in halt stat…
275 …"BriefDescription": "Core cycles when at least one thread on the physical core is not in halt stat…
402 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
419 …tion. For instructions that consist of multiple micro-ops, Counts the retirement of the last micro…
424 "BriefDescription": "Number of instructions retired. General Counter - architectural event",
429 …n": "Counts the number of instructions (EOMs) retired. Counting covers macro-fused instructions in…
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/tigerlake/ |
| H A D | pipeline.json | 8 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
130 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.",
150 …"BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX …
155 …"PublicDescription": "Counts all miss-predicted indirect branch instructions retired (excluding RE…
185 …"PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that…
212 …stal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread …
382 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
396 "BriefDescription": "Number of instructions retired. Fixed Counter - architectural event",
400 …"PublicDescription": "Counts the number of X86 instructions retired - an Architectural PerfMon eve…
405 "BriefDescription": "Number of instructions retired. General Counter - architectural event",
[all …]
|
| H A D | virtual-memory.json | 12 … "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a demand load.",
17 …"PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page …
67 "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a store.",
72 …"PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page …
117 …truction fetch requests that miss the ITLB (Instruction TLB) and hit the STLB (Second-level TLB).",
122 …"BriefDescription": "Cycles when at least one PMH is busy with a page walk for code (instruction f…
127 …"PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page …
168 "BriefDescription": "DTLB flush attempts of the thread-specific entries",
172 … "PublicDescription": "Counts the number of DTLB flush attempts of the thread-specific entries.",
|
| /linux/tools/perf/pmu-events/arch/x86/rocketlake/ |
| H A D | pipeline.json | 8 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
130 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.",
150 …"BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX …
155 …"PublicDescription": "Counts all miss-predicted indirect branch instructions retired (excluding RE…
185 …"PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that…
212 …stal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread …
363 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
377 "BriefDescription": "Number of instructions retired. Fixed Counter - architectural event",
381 …"PublicDescription": "Counts the number of instructions retired - an Architectural PerfMon event. …
386 "BriefDescription": "Number of instructions retired. General Counter - architectural event",
[all …]
|
| H A D | virtual-memory.json | 12 … "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a demand load.",
17 …"PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page …
67 "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a store.",
72 …"PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page …
117 …truction fetch requests that miss the ITLB (Instruction TLB) and hit the STLB (Second-level TLB).",
122 …"BriefDescription": "Cycles when at least one PMH is busy with a page walk for code (instruction f…
127 …"PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page …
168 "BriefDescription": "DTLB flush attempts of the thread-specific entries",
172 … "PublicDescription": "Counts the number of DTLB flush attempts of the thread-specific entries.",
|
| /linux/tools/perf/pmu-events/arch/x86/icelake/ |
| H A D | pipeline.json | 8 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
130 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.",
150 …"BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX …
155 …"PublicDescription": "Counts all miss-predicted indirect branch instructions retired (excluding RE…
185 …"PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that…
212 …stal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread …
363 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
377 "BriefDescription": "Number of instructions retired. Fixed Counter - architectural event",
381 …"PublicDescription": "Counts the number of instructions retired - an Architectural PerfMon event. …
386 "BriefDescription": "Number of instructions retired. General Counter - architectural event",
[all …]
|
| H A D | virtual-memory.json | 12 … "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a demand load.",
17 …"PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page …
67 "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a store.",
72 …"PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page …
117 …truction fetch requests that miss the ITLB (Instruction TLB) and hit the STLB (Second-level TLB).",
122 …"BriefDescription": "Cycles when at least one PMH is busy with a page walk for code (instruction f…
127 …"PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page …
168 "BriefDescription": "DTLB flush attempts of the thread-specific entries",
172 … "PublicDescription": "Counts the number of DTLB flush attempts of the thread-specific entries.",
|
| /linux/tools/perf/pmu-events/arch/x86/icelakex/ |
| H A D | pipeline.json | 8 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
130 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.",
150 …"BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX …
155 …"PublicDescription": "Counts all miss-predicted indirect branch instructions retired (excluding RE…
185 …"PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that…
212 …stal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread …
363 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
377 "BriefDescription": "Number of instructions retired. Fixed Counter - architectural event",
381 …"PublicDescription": "Counts the number of instructions retired - an Architectural PerfMon event. …
386 "BriefDescription": "Number of instructions retired. General Counter - architectural event",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/ivytown/ |
| H A D | pipeline.json | 32 "BriefDescription": "Speculative and retired macro-conditional branches",
36 "PublicDescription": "Speculative and retired macro-conditional branches.",
41 …"BriefDescription": "Speculative and retired macro-unconditional branches excluding calls and indi…
45 …"PublicDescription": "Speculative and retired macro-unconditional branches excluding calls and ind…
76 "BriefDescription": "Not taken macro-conditional branches",
80 "PublicDescription": "Not taken macro-conditional branches.",
85 "BriefDescription": "Taken speculative and retired macro-conditional branches",
89 "PublicDescription": "Taken speculative and retired macro-conditional branches.",
94 …"BriefDescription": "Taken speculative and retired macro-conditional branch instructions excluding…
98 …"PublicDescription": "Taken speculative and retired macro-conditional branch instructions excludin…
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/ivybridge/ |
| H A D | pipeline.json | 32 "BriefDescription": "Speculative and retired macro-conditional branches",
36 "PublicDescription": "Speculative and retired macro-conditional branches.",
41 …"BriefDescription": "Speculative and retired macro-unconditional branches excluding calls and indi…
45 …"PublicDescription": "Speculative and retired macro-unconditional branches excluding calls and ind…
76 "BriefDescription": "Not taken macro-conditional branches",
80 "PublicDescription": "Not taken macro-conditional branches.",
85 "BriefDescription": "Taken speculative and retired macro-conditional branches",
89 "PublicDescription": "Taken speculative and retired macro-conditional branches.",
94 …"BriefDescription": "Taken speculative and retired macro-conditional branch instructions excluding…
98 …"PublicDescription": "Taken speculative and retired macro-conditional branch instructions excludin…
[all …]
|
| /linux/Documentation/userspace-api/media/mediactl/ |
| H A D | media-types.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _media-controller-types:
10 .. _media-entity-functions:
11 .. _MEDIA-ENT-F-UNKNOWN:
12 .. _MEDIA-ENT-F-V4L2-SUBDEV-UNKNOWN:
13 .. _MEDIA-ENT-F-IO-V4L:
14 .. _MEDIA-ENT-F-IO-VBI:
15 .. _MEDIA-ENT-F-IO-SWRADIO:
16 .. _MEDIA-ENT-F-IO-DTV:
17 .. _MEDIA-ENT-F-DTV-DEMOD:
[all …]
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| /linux/sound/core/ |
| H A D | pcm_iec958.c | 1 // SPDX-License-Identifier: GPL-2.0-only
13 * snd_pcm_create_iec958_consumer_default - create default consumer format IEC958 channel status
14 * @cs: channel status buffer, at least four bytes
18 * @len. When relevant, the configuration-dependant bits will be set as
32 return -EINVAL; in snd_pcm_create_iec958_consumer_default()
52 return -EINVAL; in fill_iec958_consumer()
80 return -EINVAL; in fill_iec958_consumer()
103 case 32: /* Assume 24-bit width for 32-bit samples. */ in fill_iec958_consumer()
109 return -EINVAL; in fill_iec958_consumer()
120 * snd_pcm_fill_iec958_consumer - Fill consumer format IEC958 channel status
[all …]
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| /linux/arch/arc/lib/ |
| H A D | strcmp.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
33 bic_s r0,r0,r1 ; mask for least significant difference bit
35 xor r0,r5,r1 ; mask for least significant difference byte
50 bic_s r0,r0,r1 ; mask for least significant difference bit
52 xor r0,r5,r1 ; mask for least significant difference byte
60 /* The zero-detection above can mis-detect 0x01 bytes as zeroes
61 because of carry-propagateion from a lower significant zero byte.
|
| /linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/ |
| H A D | sve.json | 20 …"PublicDescription": "Counts speculatively executed predicated SVE operations with at least one bu…
24 …"PublicDescription": "Counts speculatively executed predicated SVE operations with at least one no…
28 … "PublicDescription": "Counts speculatively executed SVE first fault or non-fault load operations."
32 …: "Counts speculatively executed SVE first fault or non-fault load operations that clear at least …
36 …vely executed Advanced SIMD or SVE integer operations with the largest data type an 8-bit integer."
40 …vely executed Advanced SIMD or SVE integer operations with the largest data type a 16-bit integer."
44 …vely executed Advanced SIMD or SVE integer operations with the largest data type a 32-bit integer."
48 …vely executed Advanced SIMD or SVE integer operations with the largest data type a 64-bit integer."
|
| /linux/tools/perf/pmu-events/arch/x86/emeraldrapids/ |
| H A D | virtual-memory.json | 12 … "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a demand load.",
17 …"PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page …
76 "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a store.",
81 …"PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page …
135 …truction fetch requests that miss the ITLB (Instruction TLB) and hit the STLB (Second-level TLB).",
140 …"BriefDescription": "Cycles when at least one PMH is busy with a page walk for code (instruction f…
145 …"PublicDescription": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page …
|