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/linux/drivers/gpu/drm/bridge/imx/
H A Dimx8qm-ldb.c25 #include "imx-ldb-helper.h"
40 #define DRIVER_NAME "imx8qm-ldb"
48 struct ldb base;
62 static inline struct imx8qm_ldb *base_to_imx8qm_ldb(struct ldb *base) in base_to_imx8qm_ldb()
84 struct ldb *ldb = ldb_ch->ldb; in imx8qm_ldb_bridge_atomic_check() local
87 struct imx8qm_ldb *imx8qm_ldb = base_to_imx8qm_ldb(ldb); in imx8qm_ldb_bridge_atomic_check()
131 struct ldb *ldb = ldb_ch->ldb; in imx8qm_ldb_bridge_mode_set() local
134 struct imx8qm_ldb *imx8qm_ldb = base_to_imx8qm_ldb(ldb); in imx8qm_ldb_bridge_mode_set()
172 ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW; in imx8qm_ldb_bridge_mode_set()
174 ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW; in imx8qm_ldb_bridge_mode_set()
[all …]
H A Dimx8qxp-ldb.c26 #include "imx-ldb-helper.h"
36 #define DRIVER_NAME "imx8qxp-ldb"
45 struct ldb base;
60 static inline struct imx8qxp_ldb *base_to_imx8qxp_ldb(struct ldb *base) in base_to_imx8qxp_ldb()
73 imx8qxp_ldb = base_to_imx8qxp_ldb(ldb_ch->ldb); in imx8qxp_ldb_bridge_destroy()
100 struct ldb *ldb = ldb_ch->ldb; in imx8qxp_ldb_bridge_atomic_check() local
103 struct imx8qxp_ldb *imx8qxp_ldb = base_to_imx8qxp_ldb(ldb); in imx8qxp_ldb_bridge_atomic_check()
142 struct ldb *ldb = ldb_ch->ldb; in imx8qxp_ldb_bridge_mode_set() local
145 struct imx8qxp_ldb *imx8qxp_ldb = base_to_imx8qxp_ldb(ldb); in imx8qxp_ldb_bridge_mode_set()
183 ldb->ldb_ctrl &= ~LDB_CH_SEL; in imx8qxp_ldb_bridge_mode_set()
[all …]
/linux/Documentation/devicetree/bindings/display/bridge/
H A Dfsl,imx8qxp-ldb.yaml4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-ldb.yaml#
13 The Freescale i.MX8qm/qxp LVDS Display Bridge(LDB) has two channels.
15 The i.MX8qm/qxp LDB is controlled by Control and Status Registers(CSR) module.
16 The CSR module, as a system controller, contains the LDB's configuration
19 For i.MX8qxp LDB, each channel supports up to 24bpp parallel input color
22 them to use. Two LDB channels from two LDB instances can work together in
23 LDB split mode to support a dual link LVDS display. The channel indexes
27 For i.MX8qm LDB, each channel additionally supports up to 30bpp parallel
33 A side note is that i.MX8qm/qxp LDB is officially called pixel mapper in
36 consistency, this binding calls it LDB.
[all …]
H A Dfsl,imx8qxp-pxl2dpi.yaml15 MIPI-DPI 24-bit data input, and inputs of LVDS Display Bridge(LDB) module
38 LVDS Display Bridge(LDB) in split mode.
/linux/block/partitions/
H A Dldm.c341 * @ldb: Cache of the database structures
352 unsigned long base, struct ldmdb *ldb) in ldm_validate_tocblocks() argument
362 BUG_ON(!state || !ldb); in ldm_validate_tocblocks()
363 ph = &ldb->ph; in ldm_validate_tocblocks()
364 tb[0] = &ldb->toc; in ldm_validate_tocblocks()
417 * @ldb: Cache of the database structures
420 * information in @ldb.
422 * Return: 'true' @ldb contains validated VBDB info
423 * 'false' @ldb contents are undefined
426 unsigned long base, struct ldmdb *ldb) in ldm_validate_vmdb() argument
[all …]
/linux/Documentation/devicetree/bindings/display/imx/
H A Dfsl,imx6q-ldb.yaml4 $id: http://devicetree.org/schemas/display/imx/fsl,imx6q-ldb.yaml#
7 title: Freescale LVDS Display Bridge (ldb)
20 - fsl,imx53-ldb
23 - fsl,imx6q-ldb
24 - const: fsl,imx53-ldb
135 ldb@53fa8008 {
136 compatible = "fsl,imx53-ldb";
/linux/arch/arc/lib/
H A Dmemcmp.S114 ldb r4,[r0,0]
115 ldb r5,[r1,0]
125 ldb r12,[r1,1]
127 ldb.a r4,[r0,2]
128 ldb.a r5,[r1,2]
H A Dmemcpy-archs.S51 ldb.ab r5, [r1,1]
79 ldb.ab r5, [r1,1]
92 ldb.ab r5, [r1, 1]
133 ldb.ab r6, [r1,1]
174 ldb.ab r6, [r1,1]
214 ldb.ab r6, [r1,1]
H A Dstrcmp-archs.S65 ldb.ab r2, [r0, 1]
66 ldb.ab r3, [r1, 1]
H A Dmemcpy-700.S53 ldb.a r12,[r1,1]
58 ldb.a r12,[r1,2]
H A Dstrcmp.S85 ldb.ab r2,[r0,1]
86 ldb.ab r3,[r1,1]
/linux/arch/csky/abiv2/
H A Dmemcmp.S74 ldb r0, (r3, 0)
75 ldb r4, (r1, 0)
143 ldb r0, (r3, 0)
144 ldb r4, (r1, 0)
H A Dstrcmp.S148 ldb a0, (a3, 0)
149 ldb a2, (a1, 0)
160 ldb a0, (a3, 0)
162 ldb a2, (a1, 0)
H A Dmemcpy.S72 ldb r3, (r1, 0)
93 ldb r3, (r1, 0)
H A Dmemmove.S78 ldb r3, (r1, 0)
95 ldb r3, (r1, 0)
/linux/net/core/
H A Dptp_classifier.c17 * ldb [23] ; load proto
33 * ldb [20] ; load proto
48 * ldb [18] ; load payload
59 * ldb [27] ; load proto
75 * ldb [24] ; load proto
88 * ldb [14] ; load payload
/linux/Documentation/devicetree/bindings/soc/imx/
H A Dfsl,imx8mp-media-blk-ctrl.yaml89 $ref: /schemas/display/bridge/fsl,ldb.yaml#
134 compatible = "fsl,imx8mp-ldb";
136 reg-names = "ldb", "lvds";
138 clock-names = "ldb";
/linux/arch/arc/include/asm/
H A Duaccess.h32 case 1: __arc_get_user_one(*(k), u, "ldb", __ret); break; \
158 "1: ldb.ab %1, [%3, 1] \n" in raw_copy_from_user()
289 "18: ldb.ab %3, [%2,2] \n" in raw_copy_from_user()
337 "18: ldb.ab %5, [%2,1] \n" /* 1 byte left */ in raw_copy_from_user()
386 " ldb.ab %1, [%3, 1] \n" in raw_copy_to_user()
512 " ldb.ab %3, [%2,1] \n" in raw_copy_to_user()
560 " ldb.ab %5, [%2,1] \n" /* 1 byte left */ in raw_copy_to_user()
/linux/arch/parisc/lib/
H A Dlusercopy.S131 20: ldb,ma 1(srcspc,src),t1
183 20: ldb,ma 1(srcspc,src),t1
220 20: ldb 0(srcspc,src),t1
240 20: ldb 0(srcspc,src),t1
/linux/tools/testing/selftests/net/
H A Dpsock_lib.h36 * ldb [23] in pair_udp_setfilter()
40 * ldb [80] in pair_udp_setfilter()
/linux/drivers/gpu/drm/imx/ipuv3/
H A DMakefile9 obj-$(CONFIG_DRM_IMX_LDB) += imx-ldb.o
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6q-icore-ofcap12.dts29 &ldb {
H A Dimx6q-icore-ofcap10.dts29 &ldb {
/linux/arch/csky/lib/
H A Dusercopy.c45 "6: ldb %3, (%2, 0) \n" in raw_copy_from_user()
116 " ldb %3, (%2, 0) \n" in raw_copy_to_user()
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-phyboard-pollux-etml1010g3dra.dtso30 * 72.4 * 7 = 506.8 MHz so the LDB serializer and LCDIFv3 scanout

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