Home
last modified time | relevance | path

Searched full:lcdc (Results 1 – 25 of 67) sorted by relevance

123

/freebsd/sys/contrib/device-tree/Bindings/display/
H A Datmel,lcdc.yaml4 $id: http://devicetree.org/schemas/display/atmel,lcdc.yaml#
7 title: Microchip's LCDC Framebuffer
14 The LCDC works with a framebuffer, which is a section of memory that contains
15 a complete frame of data representing pixel values for the display. The LCDC
22 - atmel,at91sam9261-lcdc
23 - atmel,at91sam9263-lcdc
24 - atmel,at91sam9g10-lcdc
25 - atmel,at91sam9g45-lcdc
26 - atmel,at91sam9g45es-lcdc
27 - atmel,at91sam9rl-lcdc
[all …]
H A Datmel,lcdc.txt1 Atmel LCDC Framebuffer
6 "atmel,at91sam9261-lcdc" ,
7 "atmel,at91sam9263-lcdc" ,
8 "atmel,at91sam9g10-lcdc" ,
9 "atmel,at91sam9g45-lcdc" ,
10 "atmel,at91sam9g45es-lcdc" ,
11 "atmel,at91sam9rl-lcdc" ,
30 compatible = "atmel,at91sam9g45-lcdc";
44 compatible = "atmel,at91sam9263-lcdc";
49 Atmel LCDC Display
H A Dmarvell,pxa2xx-lcdc.txt6 "marvell,pxa2xx-lcdc",
7 "marvell,pxa270-lcdc",
8 "marvell,pxa300-lcdc"
25 compatible = "marvell,pxa2xx-lcdc";
H A Datmel,lcdc-display.yaml4 $id: http://devicetree.org/schemas/display/atmel,lcdc-display.yaml#
7 title: Microchip's LCDC Display
14 The LCD Controller (LCDC) consists of logic for transferring LCD image data
15 from an external display buffer to a TFT LCD panel. The LCDC has one display
18 LCDC is programmable on a per layer basis, and supports different LCD
/freebsd/sys/contrib/device-tree/Bindings/display/imx/
H A Dfsl,imx-lcdc.yaml4 $id: http://devicetree.org/schemas/display/imx/fsl,imx-lcdc.yaml#
25 - const: fsl,imx25-lcdc
26 - const: fsl,imx21-lcdc
66 LCDC Sharp Configuration Register value.
74 - fsl,imx1-lcdc
75 - fsl,imx21-lcdc
104 lcdc@53fbc000 {
105 compatible = "fsl,imx25-lcdc", "fsl,imx21-lcdc";
H A Dfsl,imx-fb.txt15 - fsl,pcr: LCDC PCR value
26 - fsl,lscr1: LCDC Sharp Configuration Register value.
/freebsd/sys/contrib/device-tree/Bindings/display/tilcdc/
H A Dtilcdc.txt8 - reg: base address and size of the LCDC device
11 - ti,hwmods: Name of the hwmod associated to the LCDC
21 This property deals with the LCDC revision 2 (found on AM335x)
41 tfp410 DVI encoder or lcd panel to lcdc
58 ti,hwmods = "lcdc";
/freebsd/sys/contrib/device-tree/Bindings/display/msm/
H A Dmdp4.yaml46 description: LCDC/LVDS
60 qcom,lcdc-align-lsb:
63 Indication that LSB alignment should be used for LCDC.
H A Dmdp4.txt33 Port 0 -> LCDC/LVDS
41 - qcom,lcdc-align-lsb: Boolean value indicating that LSB alignment should be
42 used for LCDC. This is only valid for 18bpp panels.
/freebsd/sys/contrib/device-tree/Bindings/pwm/
H A Datmel,hlcdc-pwm.yaml15 The LCDC integrates a Pulse Width Modulation (PWM) Controller. This block
20 values for PWM frequency. If the LCDC PWM frequency range does not match the
/freebsd/sys/contrib/device-tree/Bindings/display/atmel/
H A Datmel,hlcdc-display-controller.yaml15 The LCD Controller (LCDC) consists of logic for transferring LCD image
16 data from an external display buffer to a TFT LCD panel. The LCDC has one
/freebsd/sys/contrib/device-tree/Bindings/display/rockchip/
H A Drockchip-lvds.txt26 - pinctrl-names: must contain a "lcdc" entry.
61 pinctrl-names = "lcdc";
H A Drockchip,lvds.yaml53 const: lcdc
138 pinctrl-names = "lcdc";
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dlpc1850-cgu.txt124 lcdc: lcdc@40008000 {
/freebsd/sys/contrib/device-tree/src/arm/intel/pxa/
H A Dpxa2xx.dtsi154 lcdc: lcd-controller@40500000 { label
155 compatible = "marvell,pxa2xx-lcdc";
H A Dpxa300-raumfeld-controller.dts149 &lcdc {
258 lcdc_pins: lcdc-pins {
/freebsd/sys/contrib/device-tree/Bindings/power/
H A Drockchip-io-domain.txt94 - lcdc-supply: The supply connected to LCDC_VDD.
132 lcdc-supply = <&vcc33_lcd>;
/freebsd/sys/contrib/device-tree/Bindings/bus/
H A Dqcom,ebi2.txt3 The EBI2 contains two peripheral blocks: XMEM and LCDC. The XMEM handles any
5 LCDC handles LCD displays.
H A Dqcom,ebi2.yaml10 The EBI2 contains two peripheral blocks: XMEM and LCDC. The XMEM handles any
12 LCDC handles LCD displays.
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx25-eukrea-mbimxsd25-baseboard-dvi-vga.dts34 &lcdc {
H A Dimx25-eukrea-mbimxsd25-baseboard-dvi-svga.dts34 &lcdc {
H A Dimx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts53 &lcdc {
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam335x-myirtech-myd.dts178 &lcdc {
409 lcdc_pins_default: lcdc-default-pins {
434 lcdc_pins_sleep: lcdc-sleep-pins {
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Dpx30.dtsi2142 lcdc {
2143 lcdc_rgb_dclk_pin: lcdc-rgb-dclk-pin {
2148 lcdc_rgb_m0_hsync_pin: lcdc-rgb-m0-hsync-pin {
2153 lcdc_rgb_m0_vsync_pin: lcdc-rgb-m0-vsync-pin {
2158 lcdc_rgb_m0_den_pin: lcdc-rgb-m0-den-pin {
2163 lcdc_rgb888_m0_data_pins: lcdc-rgb888-m0-data-pins {
2191 lcdc_rgb666_m0_data_pins: lcdc-rgb666-m0-data-pins {
2213 lcdc_rgb565_m0_data_pins: lcdc-rgb565-m0-data-pins {
2233 lcdc_rgb888_m1_data_pins: lcdc-rgb888-m1-data-pins {
2254 lcdc_rgb666_m1_data_pins: lcdc
[all...]
/freebsd/sys/contrib/device-tree/src/arm/rockchip/
H A Drk3128.dtsi1083 lcdc {
1084 lcdc_dclk: lcdc-dclk {
1088 lcdc_den: lcdc-den {
1092 lcdc_hsync: lcdc-hsync {
1096 lcdc_vsync: lcdc-vsync {
1100 lcdc_rgb24: lcdc-rgb24 {

123