latency (full) in projects: linux - OpenGrok search results

Project(s)

Full Search
Definition
Symbol
File Path
History
Type

Searched full:latency (Results 1 – 25 of 1067) sorted by relevance

12 3 4 5 6 7 8 9 10 >>...43

/linux/arch/arm/boot/dts/nvidia/
H A D	tegra20-cpu-opp.dtsi	`9 clock-latency-ns = <400000>; 16 clock-latency-ns = <400000>; 23 clock-latency-ns = <400000>; 29 clock-latency-ns = <400000>; 35 clock-latency-ns = <400000>; 41 clock-latency-ns = <400000>; 48 clock-latency-ns = <400000>; 54 clock-latency-ns = <400000>; 60 clock-latency-ns = <400000>; 66 clock-latency-ns = <400000>; [all …]`
H A D	tegra30-cpu-opp.dtsi	`9 clock-latency-ns = <100000>; 15 clock-latency-ns = <100000>; 21 clock-latency-ns = <100000>; 27 clock-latency-ns = <100000>; 33 clock-latency-ns = <100000>; 39 clock-latency-ns = <100000>; 45 clock-latency-ns = <100000>; 52 clock-latency-ns = <100000>; 59 clock-latency-ns = <100000>; 66 clock-latency-ns = <100000>; [all …]`
/linux/arch/sh/lib/
H A D	memcpy-sh4.S	`31 mov r4,r2 ! 5 MT (0 cycles latency) 33 mov.l @(r0,r5),r7 ! 21 LS (2 cycles latency) 40 3: mov.l @(r0,r5),r1 ! 21 LS (latency=2) ! NMLK 41 mov r7, r3 ! 5 MT (latency=0) ! RQPO 46 mov r1,r6 ! 5 MT (latency=0) 50 mov r1, r7 ! 5 MT (latency=0) 57 3: mov.l @(r0,r5),r1 ! 21 LS (latency=2) ! KLMN 58 mov r7,r3 ! 5 MT (latency=0) ! OPQR 64 mov r1,r6 ! 5 MT (latency=0) 67 mov r1,r7 ! 5 MT (latency=0) [all …]`
/linux/arch/arm64/boot/dts/qcom/
H A D	msm8996pro.dtsi	`26 clock-latency-ns = <200000>; 32 clock-latency-ns = <200000>; 38 clock-latency-ns = <200000>; 44 clock-latency-ns = <200000>; 50 clock-latency-ns = <200000>; 56 clock-latency-ns = <200000>; 62 clock-latency-ns = <200000>; 68 clock-latency-ns = <200000>; 74 clock-latency-ns = <200000>; 80 clock-latency-ns = <200000>; [all …]`
/linux/tools/perf/pmu-events/arch/x86/pantherlake/
H A D	memory.json	96 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 1024 cycles.", 103 "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 1024 cycles. Reported latency may be longer than just the memory latency. Available PDIST counters: 0,1", 109 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles.", 116 "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles. Reported latency may be longer than just the memory latency. Available PDIST counters: 0,1", 122 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles.", 129 "PublicDescription": "Counts randomly selected loads when the latency fro [all...]
/linux/tools/tracing/latency/
H A D	Makefile	27 LATENCY-COLLECTOR := $(OUTPUT)latency-collector 28 LATENCY-COLLECTOR_IN := $(LATENCY-COLLECTOR)-in.o 40 all: $(LATENCY-COLLECTOR) 63 $(LATENCY-COLLECTOR): $(LATENCY-COLLECTOR_IN) 64 $(QUIET_LINK)$(CC) $(LDFLAGS) -o $(LATENCY-COLLECTOR) $(LATENCY-COLLECTOR_IN) $(EXTLIBS) 66 latency-collector.%: fixdep FORCE 69 $(LATENCY-COLLECTOR_IN): fixdep FORCE 70 make $(build)=latency-collector 79 $(call QUIET_INSTALL,latency-collector)$(INSTALL) $(LATENCY-COLLECTOR) -m 755 $(DESTDIR)$(BINDIR) 80 @$(STRIP) $(DESTDIR)$(BINDIR)/latency-collector [all …]
/linux/tools/perf/pmu-events/arch/x86/tigerlake/
H A D	memory.json	21 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles.", 28 "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles. Reported latency may be longer than just the memory latency.", 33 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles.", 40 "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles. Reported latency may be longer than just the memory latency.", 45 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 256 cycles.", 52 "PublicDescription": "Counts randomly selected loads when the latency fro [all...]
/linux/Documentation/devicetree/bindings/cpu/
H A D	idle-states.yaml	44 Idle state parameters (e.g. entry latency) are platform specific and need to 81 \| latency \| 83 \| latency \| 85 \|<------- wakeup-latency ------->\| 93 event conditions. The abort latency is assumed to be negligible 107 entry-latency: Worst case latency required to enter the idle state. The 108 exit-latency may be guaranteed only after entry-latency has passed. 113 wakeup-latency: Maximum delay between the signaling of a wake-up event and the 115 to be entry-latency + exit-latency. 127 wakeup-delay = exit-latency + max(entry-latency - (now - entry-timestamp), 0) [all …]
/linux/arch/arm64/boot/dts/rockchip/
H A D	rk3588-opp.dtsi	`11 clock-latency-ns = <40000>; 16 clock-latency-ns = <40000>; 21 clock-latency-ns = <40000>; 27 clock-latency-ns = <40000>; 32 clock-latency-ns = <40000>; 43 clock-latency-ns = <40000>; 48 clock-latency-ns = <40000>; 53 clock-latency-ns = <40000>; 58 clock-latency-ns = <40000>; 63 clock-latency-ns = <40000>; [all …]`
/linux/tools/perf/pmu-events/arch/x86/meteorlake/
H A D	memory.json	203 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 1024 cycles.", 210 "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 1024 cycles. Reported latency may be longer than just the memory latency. Available PDIST counters: 0", 216 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles.", 223 "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles. Reported latency may be longer than just the memory latency. Available PDIST counters: 0", 229 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles.", 236 "PublicDescription": "Counts randomly selected loads when the latency fro [all...]
/linux/tools/perf/pmu-events/arch/x86/lunarlake/
H A D	memory.json	159 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 166 …s when the latency from first dispatch to completion is greater than 1024 cycles. Reported latenc… 172 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 179 …s when the latency from first dispatch to completion is greater than 128 cycles. Reported latency… 185 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 192 …ds when the latency from first dispatch to completion is greater than 16 cycles. Reported latency… 198 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 205 …s when the latency from first dispatch to completion is greater than 2048 cycles. Reported latenc… 211 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 218 …s when the latency from first dispatch to completion is greater than 256 cycles. Reported latency… [all …]
/linux/tools/perf/pmu-events/arch/x86/arrowlake/
H A D	memory.json	223 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 230 …s when the latency from first dispatch to completion is greater than 1024 cycles. Reported latenc… 236 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 243 …s when the latency from first dispatch to completion is greater than 128 cycles. Reported latency… 249 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 256 …ds when the latency from first dispatch to completion is greater than 16 cycles. Reported latency… 262 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 269 …s when the latency from first dispatch to completion is greater than 2048 cycles. Reported latenc… 275 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 282 …s when the latency from first dispatch to completion is greater than 256 cycles. Reported latency… [all …]
/linux/tools/perf/pmu-events/arch/x86/ivybridge/
H A D	memory.json	11 "BriefDescription": "Loads with latency value being above 128", 18 "PublicDescription": "Loads with latency value being above 128.", 23 "BriefDescription": "Loads with latency value being above 16", 30 "PublicDescription": "Loads with latency value being above 16.", 35 "BriefDescription": "Loads with latency value being above 256", 42 "PublicDescription": "Loads with latency value being above 256.", 47 "BriefDescription": "Loads with latency value being above 32", 54 "PublicDescription": "Loads with latency value being above 32.", 59 "BriefDescription": "Loads with latency value being above 4", 66 "PublicDescription": "Loads with latency value being above 4.", [all …]
/linux/tools/perf/pmu-events/arch/x86/alderlake/
H A D	memory.json	193 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 1024 cycles.", 200 "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 1024 cycles. Reported latency may be longer than just the memory latency.", 206 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles.", 213 "PublicDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles. Reported latency may be longer than just the memory latency.", 219 "BriefDescription": "Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles.", 226 "PublicDescription": "Counts randomly selected loads when the latency fro [all...]
/linux/tools/perf/pmu-events/arch/x86/clearwaterforest/
H A D	cache.json	15 "PublicDescription": "Counts the number of demand and prefetch transactions that the External Queue (XQ) rejects due to a full or near full condition which likely indicates back pressure from the IDI link. The IDI link is a central on-die protocol for memory and coherence traffic between the core and the uncore. It is highly optimized for efficiency, bandwidth, and coherency, using multiple channels and flow control mechanisms to manage high-throughput, low-latency data and protocol communication within the chip. The XQ may reject transactions from the L2Q (non-cacheable requests), BBL (L2 misses) and WOB (L2 write-back victims).", 400 "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold of 1024.", 407 "PublicDescription": "Counts the number of tagged load uops retired that exceed the latency threshold of 1024. Available PDIST counters: 0,1", 412 "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold of 128.", 419 "PublicDescription": "Counts the number of tagged load uops retired that exceed the latency threshold of 128. Available PDIST counters: 0,1", 424 "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold of 16.", 431 "PublicDescription": "Counts the number of tagged load uops retired that exceed the latency threshold of 16. Available PDIST counters: 0,1", 436 "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshold of 2048.", 443 "PublicDescription": "Counts the number of tagged load uops retired that exceed the latency threshold of 2048. Available PDIST counters: 0,1", 448 "BriefDescription": "Counts the number of tagged load uops retired that exceed the latency threshol [all...]
/linux/tools/tracing/rtla/src/
H A D	timerlat.bpf.c	100 unsigned long long latency, in update_summary() 107 map_set(map, SUMMARY_CURRENT, latency); in update_summary() 113 if (latency > map_get(map, SUMMARY_MAX)) in set_stop_tracing() 114 map_set(map, SUMMARY_MAX, latency); in set_stop_tracing() 116 if (latency < map_get(map, SUMMARY_MIN) \|\| map_get(map, SUMMARY_COUNT) == 0) in set_stop_tracing() 117 map_set(map, SUMMARY_MIN, latency); in set_stop_tracing() 120 map_set(map, SUMMARY_SUM, map_get(map, SUMMARY_SUM) + latency); in set_stop_tracing() 143 unsigned long long latency, latency_us; in handle_timerlat_sample() 149 latency = tp_args->timer_latency / output_divisor; in handle_timerlat_sample() 151 bucket = latency / bucket_siz in handle_timerlat_sample() 89 update_summary(void * map,unsigned long long latency,int bucket) update_summary() argument 126 unsigned long long latency, latency_us; handle_timerlat_sample() local [all...]
/linux/arch/arm/boot/dts/samsung/
H A D	exynos4212.dtsi	`65 clock-latency-ns = <200000>; 70 clock-latency-ns = <200000>; 75 clock-latency-ns = <200000>; 80 clock-latency-ns = <200000>; 85 clock-latency-ns = <200000>; 90 clock-latency-ns = <200000>; 95 clock-latency-ns = <200000>; 101 clock-latency-ns = <200000>; 106 clock-latency-ns = <200000>; 111 clock-latency-ns = <200000>; [all …]`
H A D	exynos4412.dtsi	`91 clock-latency-ns = <200000>; 96 clock-latency-ns = <200000>; 101 clock-latency-ns = <200000>; 106 clock-latency-ns = <200000>; 111 clock-latency-ns = <200000>; 116 clock-latency-ns = <200000>; 121 clock-latency-ns = <200000>; 127 clock-latency-ns = <200000>; 132 clock-latency-ns = <200000>; 137 clock-latency-ns = <200000>; [all …]`
H A D	exynos5800.dtsi	`27 clock-latency-ns = <140000>; 32 clock-latency-ns = <140000>; 37 clock-latency-ns = <140000>; 75 clock-latency-ns = <140000>; 80 clock-latency-ns = <140000>; 85 clock-latency-ns = <140000>; 90 clock-latency-ns = <140000>; 95 clock-latency-ns = <140000>; 103 clock-latency-ns = <140000>; 132 clock-latency-ns = <140000>; [all …]`
/linux/drivers/char/tpm/st33zp24/
H A D	spi.c	41 * Between command and response, there are latency byte (up to 15 47 * some latency byte before the answer is available (max 15). 60 int latency; member 119 memset(&phy->tx_buf[total_length], TPM_DUMMY_BYTE, phy->latency); in st33zp24_spi_send() 121 spi_xfer.len = total_length + phy->latency; in st33zp24_spi_send() 125 ret = phy->rx_buf[total_length + phy->latency - 1]; in st33zp24_spi_send() 155 phy->latency + tpm_size); in st33zp24_spi_read8_reg() 157 spi_xfer.len = total_length + phy->latency + tpm_size; in st33zp24_spi_read8_reg() 162 ret = phy->rx_buf[total_length + phy->latency - 1]; in st33zp24_spi_read8_reg() 164 memcpy(tpm_data, phy->rx_buf + total_length + phy->latency, in st33zp24_spi_read8_reg() [all …]
/linux/tools/perf/pmu-events/arch/powerpc/power8/
H A D	metrics.json	744 …tion": "estimate of dl2l3 distant MOD miss rates with measured DL2L3 MOD latency as a %of dcache m… 750 …tion": "estimate of dl2l3 distant SHR miss rates with measured DL2L3 SHR latency as a %of dcache m… 756 …"BriefDescription": "estimate of distant L4 miss rates with measured DL4 latency as a %of dcache m… 762 …"BriefDescription": "estimate of distant memory miss rates with measured DMEM latency as a %of dca… 768 …"BriefDescription": "estimate of dl21 MOD miss rates with measured L21 MOD latency as a %of dcache… 774 …"BriefDescription": "estimate of dl21 SHR miss rates with measured L21 SHR latency as a %of dcache… 780 …"BriefDescription": "estimate of dl2 miss rates with measured L2 latency as a %of dcache miss cpi", 786 …"BriefDescription": "estimate of dl31 MOD miss rates with measured L31 MOD latency as a %of dcache… 792 …"BriefDescription": "estimate of dl31 SHR miss rates with measured L31 SHR latency as a %of dcache… 798 …"BriefDescription": "estimate of dl3 miss rates with measured L3 latency as a % of dcache miss cpi… [all …]
/linux/arch/arm64/boot/dts/allwinner/
H A D	sun50i-h616-cpu-opp.dtsi	13 clock-latency-ns = <244144>; /* 8 32k periods / 20 clock-latency-ns = <244144>; / 8 32k periods / 27 clock-latency-ns = <244144>; / 8 32k periods / 35 clock-latency-ns = <244144>; / 8 32k periods / 42 clock-latency-ns = <244144>; / 8 32k periods / 54 clock-latency-ns = <244144>; / 8 32k periods / 61 clock-latency-ns = <244144>; / 8 32k periods / 71 clock-latency-ns = <244144>; / 8 32k periods / 83 clock-latency-ns = <244144>; / 8 32k periods / 90 clock-latency-ns = <244144>; / 8 32k periods */ [all …]
/linux/tools/perf/pmu-events/arch/x86/graniterapids/
H A D	memory.json	68 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 75 …s when the latency from first dispatch to completion is greater than 1024 cycles. Reported latenc… 80 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 87 …s when the latency from first dispatch to completion is greater than 128 cycles. Reported latency… 92 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 99 …ds when the latency from first dispatch to completion is greater than 16 cycles. Reported latency… 104 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 111 …s when the latency from first dispatch to completion is greater than 2048 cycles. Reported latenc… 116 …"BriefDescription": "Counts randomly selected loads when the latency from first dispatch to comple… 123 …s when the latency from first dispatch to completion is greater than 256 cycles. Reported latency… [all …]
/linux/arch/arm/boot/dts/sigmastar/
H A D	mstar-infinity3.dtsi	`13 clock-latency-ns = <300000>; 20 clock-latency-ns = <300000>; 27 clock-latency-ns = <300000>; 34 clock-latency-ns = <300000>; 41 clock-latency-ns = <300000>; 48 clock-latency-ns = <300000>; 55 clock-latency-ns = <300000>; 62 clock-latency-ns = <300000>;`
/linux/tools/tracing/
H A D	Makefile	`4 all: latency rtla 10 latency: target 11 $(call descend,latency) 14 $(call descend,latency,install) 17 $(call descend,latency,clean) 28 .PHONY: all install clean latency latency_install latency_clean \`

12 3 4 5 6 7 8 9 10 >>...43