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/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dqcom,sm8250-camss.yaml125 clock-lanes:
128 data-lanes:
133 - clock-lanes
134 - data-lanes
148 clock-lanes:
151 data-lanes:
156 - clock-lanes
157 - data-lanes
171 clock-lanes:
174 data-lanes:
[all …]
H A Dqcom,sc8280xp-camss.yaml139 clock-lanes:
142 data-lanes:
147 - clock-lanes
148 - data-lanes
162 clock-lanes:
165 data-lanes:
170 - clock-lanes
171 - data-lanes
185 clock-lanes:
188 data-lanes:
[all …]
H A Dbrcm,bcm2835-unicam.yaml55 brcm,num-data-lanes:
59 Number of CSI-2 data lanes supported by this Unicam instance. The number
60 of data lanes actively used is specified with the data-lanes endpoint
77 data-lanes: true
82 - data-lanes
96 - brcm,num-data-lanes
118 brcm,num-data-lanes = <2>;
123 data-lanes = <1 2>;
H A Dti,cal.yaml86 clock-lanes:
89 data-lanes:
104 clock-lanes:
107 data-lanes:
146 clock-lanes = <0>;
147 data-lanes = <1 2>;
170 clock-lanes = <0>;
171 data-lanes = <1 2>;
/freebsd/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra234-p3740-0002.dtsi79 lanes {
103 lanes {
168 phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>,
169 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-1}>;
176 phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>,
177 <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-1}>,
178 <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-2}>,
179 <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-3}>,
180 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-0}>,
181 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb
[all...]
H A Dtegra234-p3768-0000.dtsi47 lanes {
66 lanes {
120 phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>,
121 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-1}>;
128 phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>,
129 <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-1}>,
130 <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-2}>,
131 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-0}>,
132 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-1}>;
141 num-lanes
[all...]
H A Dtegra234-p3768-0000+p3767.dtsi65 lanes {
84 lanes {
138 phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>,
139 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-1}>;
146 phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>,
147 <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-1}>,
148 <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-2}>,
149 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-0}>,
150 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-1}>;
159 num-lanes = <2>;
/freebsd/sys/contrib/device-tree/src/arm64/renesas/
H A Dr8a779a0-falcon-csi-dsi.dtsi21 clock-lanes = <0>;
22 data-lanes = <1 2 3 4>;
40 clock-lanes = <0>;
41 data-lanes = <1 2 3 4>;
59 clock-lanes = <0>;
60 data-lanes = <1 2 3 4>;
111 clock-lanes = <0>;
112 data-lanes = <1 2 3 4>;
132 clock-lanes = <0>;
133 data-lanes = <1 2 3 4>;
[all …]
H A Dhihope-rzg2-ex-aistarvision-mipi-adapter-2.1.dtsi18 clock-lanes = <0>;
19 data-lanes = <1 2>;
32 clock-lanes = <0>;
33 data-lanes = <1 2>;
49 clock-lanes = <0>;
50 data-lanes = <1 2>;
63 clock-lanes = <0>;
64 data-lanes = <1 2>;
H A Dr8a779g0-white-hawk-csi-dsi.dtsi22 clock-lanes = <0>;
23 data-lanes = <1 2 3>;
42 clock-lanes = <0>;
43 data-lanes = <1 2 3>;
87 clock-lanes = <0>;
88 data-lanes = <1 2 3>;
108 clock-lanes = <0>;
109 data-lanes = <1 2 3>;
H A Dwhite-hawk-csi-dsi.dtsi22 clock-lanes = <0>;
23 data-lanes = <1 2 3>;
42 clock-lanes = <0>;
43 data-lanes = <1 2 3>;
87 clock-lanes = <0>;
88 data-lanes = <1 2 3>;
108 clock-lanes = <0>;
109 data-lanes = <1 2 3>;
H A Dr8a774c0-ek874-mipi-2.1.dts38 clock-lanes = <0>;
39 data-lanes = <1 2>;
52 clock-lanes = <0>;
53 data-lanes = <1 2>;
62 clock-lanes = <0>;
63 data-lanes = <1 2>;
/freebsd/sys/contrib/device-tree/Bindings/media/i2c/
H A Dadv748x.yaml83 clock-lanes:
86 data-lanes:
91 - clock-lanes
92 - data-lanes
106 clock-lanes:
109 data-lanes:
113 - clock-lanes
114 - data-lanes
195 clock-lanes = <0>;
196 data-lanes = <1 2 3 4>;
[all …]
H A Dadv748x.txt52 endpoint. Each of those endpoints shall contain the data-lanes property as
56 - data-lanes: an array of physical data lane indexes
58 sources are described. For TXA 1, 2 or 4 data lanes can be described
101 clock-lanes = <0>;
102 data-lanes = <1 2 3 4>;
111 clock-lanes = <0>;
112 data-lanes = <1>;
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dnvidia,tegra124-xusb-padctl.txt4 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
7 documentation. Each such "pad" may control either one or multiple lanes,
8 and thus contains any logic common to all its lanes. Each lane can be
11 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
12 super-speed USB. Other lanes are for various types of low-speed, full-speed
15 ports (e.g. PCIe) and the lanes.
81 the pad and any of its lanes, this property must be set to "okay".
128 Each pad node has a child named "lanes" that contains one or more children of
129 its own, each representing one of the lanes controlled by the pad.
284 lanes {
[all …]
H A Dphy-cadence-sierra.txt22 the clock to the lanes. "phy_clk" is deprecated.
29 Each group of PHY lanes with a single master lane should be represented as
42 - cdns,num-lanes: Number of lanes in this group. From 1 to 4. The
43 group is made up of consecutive lanes.
45 configuration of lanes.
60 cdns,num-lanes = <2>;
67 cdns,num-lanes = <1>;
H A Dnvidia,tegra124-xusb-padctl.yaml14 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
17 documentation. Each such "pad" may control either one or multiple lanes,
18 and thus contains any logic common to all its lanes. Each lane can be
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
25 ports (e.g. PCIe) and the lanes.
88 order to use the pad and any of its lanes, this property must be set
105 lanes:
149 lanes:
177 lanes:
[all …]
H A Dphy-cadence-sierra.yaml75 Each group of PHY lanes with a single master lane should be represented as
89 Contains list of resets, one per lane, to get all the link lanes out of reset.
96 Specifies the type of PHY for which the group of PHY lanes is used.
101 cdns,num-lanes:
103 Number of lanes in this group. The group is made up of consecutive lanes.
154 cdns,num-lanes = <2>;
161 cdns,num-lanes = <1>;
H A Dphy-cadence-torrent.yaml80 Each group of PHY lanes with a single master lane should be represented as a sub-node.
92 Contains list of resets, one per lane, to get all the link lanes out of reset.
99 Specifies the type of PHY for which the group of PHY lanes is used.
105 cdns,num-lanes:
107 Number of lanes.
133 - cdns,num-lanes
175 cdns,num-lanes = <4>;
203 cdns,num-lanes = <2>;
212 cdns,num-lanes = <1>;
/freebsd/lib/libpmc/pmu-events/arch/x86/cascadelakex/
H A Duncore-other.json776 …ed to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the b…
788 …d refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes s…
800 … any x4 or x8 device attached to the IIO unit and using lanes starting at lane 8 of the 16 lanes s…
812 …refer to any device attached to the IIO unit using the lanes starting at lane 12 of the 16 lanes
824 …ed to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the b…
836 …d refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes s…
848 … any x4 or x8 device attached to the IIO unit and using lanes starting at lane 8 of the 16 lanes s…
860 …brefer to any device attached to the IIO unit using the lanes starting at lane 12 of the 16 lanes
872 …ed to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the b…
884 …d refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes s…
[all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/skylakex/
H A Duncore-other.json755 …ed to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the b…
767 …d refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes s…
779 … any x4 or x8 device attached to the IIO unit and using lanes starting at lane 8 of the 16 lanes s…
791 …refer to any device attached to the IIO unit using the lanes starting at lane 12 of the 16 lanes
803 …ed to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the b…
815 …d refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes s…
827 … any x4 or x8 device attached to the IIO unit and using lanes starting at lane 8 of the 16 lanes s…
839 …brefer to any device attached to the IIO unit using the lanes starting at lane 12 of the 16 lanes
851 …ed to the IIO unit which starts its use of the bus using lane 0 of the 16 lanes supported by the b…
863 …d refer to any x4 device attached to the IIO unit using lanes starting at lane 4 of the 16 lanes s…
[all …]
/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dnvidia,tegra20-pcie.txt104 - If lanes 0 to 3 are used:
107 - If lanes 4 or 5 are used:
148 - nvidia,num-lanes: Number of lanes to use for this port. Valid combinations
150 - Root port 0 uses 4 lanes, root port 1 is unused.
151 - Both root ports use 2 lanes.
157 number of lanes in the nvidia,num-lanes property. Entries are of the form
158 "pcie-N": where N ranges from 0 to the value specified in nvidia,num-lanes.
210 nvidia,num-lanes = <2>;
224 nvidia,num-lanes = <2>;
316 nvidia,num-lanes = <2>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/media/xilinx/
H A Dxlnx,csi2rxss.yaml88 xlnx,en-active-lanes:
91 Present if the number of active lanes can be re-configured at
92 runtime in the Protocol Configuration Register. Otherwise all lanes,
115 data-lanes:
121 1 2 - For 2 lanes enabled in IP.
122 1 2 3 - For 3 lanes enabled in IP.
123 1 2 3 4 - For 4 lanes enabled in IP.
131 - data-lanes
180 xlnx,en-active-lanes;
195 data-lanes = <1 2 3 4>;
/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-j721e-sk-csi2-dual-imx219.dtso43 clock-lanes = <0>;
44 data-lanes = <1 2>;
65 clock-lanes = <0>;
66 data-lanes = <1 2>;
85 clock-lanes = <0>;
86 data-lanes = <1 2>;
132 clock-lanes = <0>;
133 data-lanes = <1 2>;
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DDetectDeadLanes.h10 /// Analysis that tracks defined/used subregister lanes across COPY instructions
44 /// Contains a bitmask of which lanes of a given virtual register are
71 /// Given a bitmask \p UsedLanes for the used lanes on a def output of a
72 /// COPY-like instruction determine the lanes used on the use operands
76 /// Given a use regiser operand \p Use and a mask of defined lanes, check
83 /// Given a mask \p DefinedLanes of lanes defined at operand \p OpNum
84 /// of COPY-like instruction, determine which lanes are defined at the output
90 /// determine which lanes are used from operand \p MO of this instruction.

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