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Searched full:lane2 (Results 1 – 13 of 13) sorted by relevance

/linux/include/uapi/linux/
H A Datmlec.h33 l_narp_req, /* LANE2 mandates the use of this */
54 unsigned int lane_version; /* LANE2: 1 for LANEv1, 2 for LANEv2 */
61 int sizeoftlvs; /* LANE2: if != 0, tlvs follow */
71 unsigned int targetless_le_arp; /* LANE2 */
72 unsigned int no_source_le_narp; /* LANE2 */
/linux/Documentation/devicetree/bindings/phy/
H A Dphy-rockchip-usbdp.yaml64 3>;", assuming DP lane0 on Type-C phy lane2, DP lane1 on Type-C phy
67 phy lane1, DP lane2 on Type-C phy lane2, DP lane3 on Type-C phy lane3. If
H A Dqcom,msm8996-qmp-pcie-phy.yaml89 - lane2
H A Dfsl,imx8qm-hsio.yaml55 | | Lane0| Lane1| Lane2|
/linux/arch/arm64/boot/dts/airoha/
H A Den7581.dtsi223 reset-names = "phy-lane0", "phy-lane1", "phy-lane2";
266 reset-names = "phy-lane0", "phy-lane1", "phy-lane2";
/linux/drivers/phy/marvell/
H A Dphy-mvebu-a3700-comphy.c32 /* Comphy lane2 indirect access register offset */
223 /* bit8: 0: Lane0 is USB3 instead of GbE1, Lane2 is SATA; 1: Lane2 is USB3 */
475 /* SATA must be in Lane2 */ in mvebu_a3700_comphy_set_phy_selector()
/linux/arch/arm64/boot/dts/marvell/
H A Darmada-8040-mcbin.dtsi189 "cp0-pcie0-x4-lane2-phy", "cp0-pcie0-x4-lane3-phy";
/linux/drivers/gpu/drm/amd/display/include/
H A Dgrph_object_ctrl_defs.h249 uint8_t lane2:2; /* Mapping for lane 2 */ member
/linux/drivers/phy/rockchip/
H A Dphy-rockchip-dphy-rx0.c214 /* HS RX Control of lane2 */ in rk_dphy_enable()
/linux/drivers/phy/ti/
H A Dphy-j721e-wiz.c66 LANE2 = 2, enumerator
1286 case LANE2: in wiz_phy_reset_deassert()
/linux/lib/zstd/compress/
H A Dzstd_compress.c6917 * we use _mm256_permute4x64_epi64(..., 0xE8) to move lane2 into lane1,
6970 * Explanation of 0xE8 = 11101000b => [lane0, lane2, lane2, lane3]. in convertSequences_noRepcodes()
6971 * So the lower 128 bits become [lane0, lane2] => combining seq0 and seq1. in convertSequences_noRepcodes()
7005 * Lane2 = seq1's 8 bytes in convertSequences_noRepcodes()
7009 /* Permute 64-bit lanes => move Lane2 down into Lane1. */ in convertSequences_noRepcodes()
7013 * The upper 16 bytes are [Lane2, Lane3] = [seq1, 0], but we won't use them. in convertSequences_noRepcodes()
/linux/drivers/gpu/drm/radeon/
H A Datombios.h4111 //Bit[1:0]: Define which pin connect to DVI connector data Lane2, =0: source from GPU pin TX0, =1: …
/linux/drivers/gpu/drm/amd/include/
H A Datombios.h4604 //Bit[1:0]: Define which pin connect to DVI connector data Lane2, =0: source from GPU pin TX0, =1: …