Searched +full:jh8100 +full:- +full:starlink +full:- +full:pmu (Results 1 – 1 of 1) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause3 ---4 $id: http://devicetree.org/schemas/perf/starfive,jh8100-starlink-pmu.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: StarFive JH8100 StarLink PMU10 - Ji Sheng Teoh <jisheng.teoh@starfivetech.com>13 StarFive's JH8100 StarLink PMU integrates one or more CPU cores with a14 shared L3 memory system. The PMU support overflow interrupt, up to16 counter. StarFive's JH8100 StarLink PMU is accessed via MMIO.20 const: starfive,jh8100-starlink-pmu[all …]