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Searched +full:jh7110 +full:- +full:stgcrg (Results 1 – 4 of 4) sorted by relevance

/freebsd/sys/contrib/device-tree/src/riscv/starfive/
H A Djh7110.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
8 #include <dt-bindings/clock/starfive,jh7110-crg.h>
9 #include <dt-bindings/power/starfive,jh7110-pmu.h>
10 #include <dt-bindings/reset/starfive,jh7110-crg.h>
11 #include <dt-bindings/thermal/thermal.h>
14 compatible = "starfive,jh7110";
15 #address-cells = <2>;
16 #size-cells = <2>;
19 #address-cells = <1>;
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/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dstarfive,jh7110-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/starfive,jh7110-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: StarFive JH7110 PCIe host controller
10 - Kevin Xie <kevin.xie@starfivetech.com>
13 - $ref: plda,xpressrich3-axi-common.yaml#
17 const: starfive,jh7110-pcie
21 - description: NOC bus clock
22 - description: Transport layer clock
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/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Dstarfive,jh7110-usb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/starfive,jh7110-usb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: StarFive JH7110 wrapper module for the Cadence USBSS-DRD controller
10 - Minda Chen <minda.chen@starfivetech.com>
14 const: starfive,jh7110-usb
18 starfive,stg-syscon:
19 $ref: /schemas/types.yaml#/definitions/phandle-array
21 - items:
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/freebsd/sys/dev/clk/starfive/
H A Djh7110_clk_stg.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
27 #include <dt-bindings/clock/starfive,jh7110-crg.h>
33 { "starfive,jh7110-stgcrg", 1 },
103 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) in jh7110_clk_stg_probe()
106 device_set_desc(dev, "StarFive JH7110 STG clock generator"); in jh7110_clk_stg_probe()
119 sc->reset_status_offset = STGCRG_RESET_STATUS; in jh7110_clk_stg_attach()
120 sc->reset_selector_offset = STGCRG_RESET_SELECTOR; in jh7110_clk_stg_attach()
122 mtx_init(&sc->mtx, device_get_nameunit(dev), NULL, MTX_DEF); in jh7110_clk_stg_attach()
124 err = bus_alloc_resources(dev, res_spec, &sc->mem_res); in jh7110_clk_stg_attach()
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