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Searched +full:jh7100 +full:- +full:reset (Results 1 – 5 of 5) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/watchdog/
H A Dstarfive,jh7100-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/starfive,jh7100-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: StarFive Watchdog for JH7100 and JH7110 SoC
10 - Xingyu Wu <xingyu.wu@starfivetech.com>
11 - Samin Guo <samin.guo@starfivetech.com>
14 The JH7100 and JH7110 watchdog both are 32 bit counters. JH7100 watchdog
19 isn't cleared, the watchdog will reset the system unless the watchdog
20 reset is disabled.
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/freebsd/sys/contrib/device-tree/Bindings/reset/
H A Dstarfive,jh7100-reset.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/reset/starfive,jh7100-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: StarFive JH7100 SoC Reset Controller
10 - Emil Renner Berthing <kernel@esmil.dk>
15 - starfive,jh7100-reset
20 "#reset-cells":
24 - compatible
25 - reg
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/freebsd/sys/contrib/device-tree/src/riscv/starfive/
H A Djh7100.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
8 #include <dt-bindings/clock/starfive-jh7100.h>
9 #include <dt-bindings/reset/starfive-jh710
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/freebsd/sys/contrib/device-tree/Bindings/hwmon/
H A Dstarfive,jh71x0-temp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/hwmon/starfive,jh71x0-tem
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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dstarfive,jh7100-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/starfive,jh7100-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: StarFive JH7100 Pin Controller
10 Bindings for the JH7100 RISC-V SoC from StarFive Ltd.
15 interesting 2-layered approach to pin muxing best illustrated by the diagram
21 LCD output -----------------| |
22 CMOS Camera interface ------| |--- PAD_GPIO[0]
23 Ethernet PHY interface -----| MUX |--- PAD_GPIO[1]
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