/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
H A D | intel,ixp4xx-expansion-bus-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Intel IXP4xx Expansion Bus Controller 10 The IXP4xx expansion bus controller handles access to devices on the 11 memory-mapped expansion bus on the Intel IXP4xx family of system on chips, 15 - Linus Walleij <linus.walleij@linaro.org> 19 pattern: '^bus@[0-9a-f]+$' 23 - enum: [all …]
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/freebsd/sys/contrib/device-tree/src/arm/intel/ixp/ |
H A D | intel-ixp42x-arcom-vulcan.dts | 1 // SPDX-License-Identifier: ISC 8 /dts-v1/; 10 #include "intel-ixp42x.dtsi" 11 #include <dt-bindings/input/input.h> 16 #address-cells = <1>; 17 #size-cells = <1>; 27 stdout-path = "uart0:115200n8"; 35 compatible = "w1-gpio"; 41 flash@0,0 { 42 compatible = "intel,ixp4xx-flash", "cfi-flash"; [all …]
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H A D | intel-ixp42x-gateworks-gw2348.dts | 1 // SPDX-License-Identifier: ISC 7 /dts-v1/; 9 #include "intel-ixp42x.dtsi" 10 #include <dt-bindings/input/input.h> 15 #address-cells = <1>; 16 #size-cells = <1>; 25 stdout-path = "uart0:115200n8"; 33 compatible = "gpio-leds"; 34 led-user { 37 default-state = "on"; [all …]
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H A D | intel-ixp43x-gateworks-gw2358.dts | 1 // SPDX-License-Identifier: ISC 3 * Device Tree file for Gateworks IXP43x-based Cambria GW2358 6 /dts-v1/; 8 #include "intel-ixp43x.dtsi" 13 #address-cells = <1>; 14 #size-cells = <1>; 24 stdout-path = "uart0:115200n8"; 32 compatible = "gpio-leds"; 33 led-user { 36 default-state = "on"; [all …]
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H A D | intel-ixp46x-ixdp465.dts | 1 // SPDX-License-Identifier: ISC 7 /dts-v1/; 9 #include "intel-ixp45x-ixp46x.dtsi" 10 #include "intel-ixp4xx-reference-design.dtsi" 11 #include <dt-bindings/input/input.h> 16 #address-cells = <1>; 17 #size-cells = <1>; 21 flash@0,0 { 22 compatible = "intel,ixp4xx-flash", "cfi-flash"; 23 bank-width = <2>; [all …]
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H A D | intel-ixp43x-kixrp435.dts | 1 // SPDX-License-Identifier: ISC 7 /dts-v1/; 9 #include "intel-ixp43x.dtsi" 10 #include "intel-ixp4xx-reference-design.dtsi" 11 #include <dt-bindings/input/input.h> 16 #address-cells = <1>; 17 #size-cells = <1>; 21 flash@0,0 { 22 compatible = "intel,ixp4xx-flash", "cfi-flash"; 23 bank-width = <2>; [all …]
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H A D | intel-ixp42x-ixdp425.dts | 1 // SPDX-License-Identifier: ISC 11 /dts-v1/; 13 #include "intel-ixp42x.dtsi" 14 #include "intel-ixp4xx-reference-design.dtsi" 15 #include <dt-bindings/input/input.h> 20 #address-cells = <1>; 21 #size-cells = <1>; 25 flash@0,0 { 26 compatible = "intel,ixp4xx-flash", "cfi-flash"; 27 bank-width = <2>; [all …]
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H A D | intel-ixp4xx-reference-design.dtsi | 1 // SPDX-License-Identifier: ISC 5 * set-up for IXDP425, IXCDP1100, KIXRP435 and IXDP465. 20 stdout-path = "uart0:115200n8"; 28 compatible = "i2c-gpio"; 29 sda-gpios = <&gpio0 7 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; 30 scl-gpios = <&gpio0 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; 31 #address-cells = <1>; 32 #size-cells = <0>; 36 * Philips PCF8582C-2T/03 512byte I2C EEPROM 43 read-only; [all …]
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H A D | intel-ixp42x-netgear-wg302v1.dts | 1 // SPDX-License-Identifier: ISC 7 /dts-v1/; 9 #include "intel-ixp42x.dtsi" 10 #include <dt-bindings/input/input.h> 15 #address-cells = <1>; 16 #size-cells = <1>; 27 stdout-path = "uart1:9600n8"; 37 flash@0,0 { 38 compatible = "intel,ixp4xx-flash", "cfi-flash"; 39 bank-width = <2>; [all …]
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H A D | intel-ixp42x-gateway-7001.dts | 1 // SPDX-License-Identifier: ISC 7 /dts-v1/; 9 #include "intel-ixp42x.dtsi" 10 #include <dt-bindings/input/input.h> 15 #address-cells = <1>; 16 #size-cells = <1>; 26 stdout-path = "uart1:115200n8"; 36 flash@0,0 { 37 compatible = "intel,ixp4xx [all...] |
H A D | intel-ixp42x-adi-coyote.dts | 1 // SPDX-License-Identifier: ISC 5 * Ethernet set-up from OpenWrt. 8 /dts-v1/; 10 #include "intel-ixp42x.dtsi" 11 #include <dt-bindings/input/input.h> 16 #address-cells = <1>; 17 #size-cells = <1>; 27 stdout-path = "uart1:115200n8"; 38 flash@0,0 { 39 compatible = "intel,ixp4xx-flash", "cfi-flash"; [all …]
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H A D | intel-ixp42x-ixdpg425.dts | 1 // SPDX-License-Identifier: ISC 5 * Ethernet set-up from OpenWrt. 15 /dts-v1/; 17 #include "intel-ixp42x.dtsi" 18 #include <dt-bindings/input/input.h> 23 #address-cells = <1>; 24 #size-cells = <1>; 34 stdout-path = "uart0:115200n8"; 43 flash@0,0 { 44 compatible = "intel,ixp4xx-flash", "cfi-flash"; [all …]
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H A D | intel-ixp42x-goramo-multilink.dts | 1 // SPDX-License-Identifier: ISC 5 * - MultiLink Basic (a box) 6 * - MultiLink Max (19" rack mount) 9 * This is one of the few devices supporting the IXP4xx High-Speed Serial 14 /dts-v1/; 16 #include "intel-ixp42x.dtsi" 17 #include <dt-bindings/input/input.h> 21 compatible = "goramo,multilink-route [all...] |
H A D | intel-ixp42x-linksys-wrv54g.dts | 1 // SPDX-License-Identifier: ISC 9 /dts-v1/; 11 #include "intel-ixp42x.dtsi" 12 #include <dt-bindings/input/input.h> 17 #address-cells = <1>; 18 #size-cells = <1>; 28 stdout-path = "uart1:115200n8"; 39 compatible = "gpio-leds"; 40 led-powe [all...] |
H A D | intel-ixp42x-linksys-nslu2.dts | 1 // SPDX-License-Identifier: ISC 6 /dts-v1/; 8 #include "intel-ixp42x.dtsi" 9 #include <dt-bindings/input/input.h> 14 #address-cells = <1>; 15 #size-cells = <1>; 25 stdout-path = "uart0:115200n8"; 33 compatible = "gpio-leds"; 34 led-status { 37 default-state = "on"; [all …]
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H A D | intel-ixp42x-freecom-fsg-3.dts | 1 // SPDX-License-Identifier: ISC 3 * Device Tree file for the Freecom FSG-3 router. 8 /dts-v1/; 10 #include "intel-ixp42x.dtsi" 11 #include <dt-bindings/input/input.h> 14 model = "Freecom FSG-3"; 15 compatible = "freecom,fsg-3", "intel,ixp42x"; 16 #address-cells = <1>; 17 #size-cell [all...] |
H A D | intel-ixp42x-welltech-epbx100.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 8 #include "intel-ixp42x.dtsi" 13 #address-cells = <1>; 14 #size-cells = <1>; 24 stdout-path = "uart0:115200n8"; 33 flash@0,0 { 34 compatible = "intel,ixp4xx-flash", "cfi-flash"; 35 bank-width = <2>; 37 * 16 MB of Flash [all …]
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H A D | intel-ixp42x-iomega-nas100d.dts | 1 // SPDX-License-Identifier: ISC 6 /dts-v1/; 8 #include "intel-ixp42x.dtsi" 9 #include <dt-bindings/input/input.h> 13 compatible = "iom,nas-100d", "intel,ixp42x"; 14 #address-cells = <1>; 15 #size-cells = <1>; 25 stdout-path = "uart0:115200n8"; 33 compatible = "gpio-led [all...] |
H A D | intel-ixp42x-dlink-dsm-g600.dts | 1 // SPDX-License-Identifier: ISC 3 * Device Tree file for D-Link DSM-G600 revision A based on IXP420 11 /dts-v1/; 13 #include "intel-ixp42x.dtsi" 14 #include <dt-bindings/input/input.h> 17 model = "D-Link DSM-G600 rev A"; 18 compatible = "dlink,dsm-g60 [all...] |
/freebsd/sys/contrib/device-tree/Bindings/bus/ |
H A D | intel,ixp4xx-expansion-bus-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/bus/intel,ixp4xx-expansion-bus-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Intel IXP4xx Expansion Bus Controller 10 The IXP4xx expansion bus controller handles access to devices on the 11 memory-mapped expansion bus on the Intel IXP4xx family of system on chips, 15 - Linus Walleij <linus.walleij@linaro.org> 19 pattern: '^bus@[0-9a-f]+$' 23 - enum: [all …]
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/freebsd/sys/contrib/device-tree/Bindings/ata/ |
H A D | intel,ixp4xx-compact-flash.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/ata/intel,ixp4xx-compact-flash.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Intel IXP4xx CompactFlash Card Controller 10 - Linus Walleij <linus.walleij@linaro.org> 13 The IXP4xx network processors have a CompactFlash interface that presents 15 device is always connected to the expansion bus of the IXP4xx SoCs using one 17 node must be placed inside a chip select node on the IXP4xx expansion bus. 21 const: intel,ixp4xx-compact-flash [all …]
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/freebsd/sys/contrib/device-tree/Bindings/mtd/ |
H A D | intel,ixp4xx-flash.txt | 1 Flash device on Intel IXP4xx SoC 3 This flash is regular CFI compatible (Intel or AMD extended) flash chips with 4 specific big-endian or mixed-endian memory access pattern. 7 - compatible : must be "intel,ixp4xx-flash", "cfi-flash"; 8 - reg : memory address for the flash chip 9 - bank-width : width in bytes of flash interface, should be <2> 11 For the rest of the properties, see mtd-physmap.txt. 13 The device tree may optionally contain sub-nodes describing partitions of the 18 flash@50000000 { 19 compatible = "intel,ixp4xx-flash", "cfi-flash"; [all …]
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H A D | mtd-physmap.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mtd/mtd-physmap.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...) 10 - Rob Herring <robh@kernel.org> 13 Flash chips (Memory Technology Devices) are often used for solid state 17 - $ref: mtd.yaml# 18 - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml# 23 - items: [all …]
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/freebsd/share/misc/ |
H A D | pci_vendors | 5 # Date: 2024-11-25 03:15:02 8 # the PCI ID Project at https://pci-ids.ucw.cz/. 14 # (version 2 or higher) or the 3-clause BSD License. 25 # device device_name <-- single tab 26 # subvendor subdevice subsystem_name <-- two tabs 30 # This is a relabelled RTL-8139 31 8139 AT-2500TX V3 Ethernet 41 7a09 PCI-to-PCI Bridge 50 7a19 PCI-to-PCI Bridge 55 7a29 PCI-to-PCI Bridge [all …]
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