| /linux/drivers/vfio/platform/ |
| H A D | vfio_platform_irq.c | 49 if (!(vdev->irqs[index].flags & VFIO_IRQ_INFO_MASKABLE)) in vfio_platform_set_irq_mask()
56 return vfio_virqfd_enable((void *) &vdev->irqs[index], in vfio_platform_set_irq_mask()
59 &vdev->irqs[index].mask, fd); in vfio_platform_set_irq_mask()
61 vfio_virqfd_disable(&vdev->irqs[index].mask); in vfio_platform_set_irq_mask()
66 vfio_platform_mask(&vdev->irqs[index]); in vfio_platform_set_irq_mask()
72 vfio_platform_mask(&vdev->irqs[index]); in vfio_platform_set_irq_mask()
109 if (!(vdev->irqs[index].flags & VFIO_IRQ_INFO_MASKABLE)) in vfio_platform_set_irq_unmask()
116 return vfio_virqfd_enable((void *) &vdev->irqs[index], in vfio_platform_set_irq_unmask()
119 &vdev->irqs[index].unmask, in vfio_platform_set_irq_unmask()
122 vfio_virqfd_disable(&vdev->irqs[index].unmask); in vfio_platform_set_irq_unmask()
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| /linux/Documentation/devicetree/bindings/arm/omap/ |
| H A D | crossbar.txt | 13 - ti,max-irqs: Total number of irqs available at the parent interrupt controller.
17 - ti,irqs-reserved: List of the reserved irq lines that are not muxed using
23 - ti,irqs-skip: This is similar to "ti,irqs-reserved", but these are for
24 SOC-specific hard-wiring of those irqs which unexpectedly bypasses the
25 crossbar. These irqs have a crossbar register, but still cannot be used.
27 - ti,irqs-safe-map: integer which maps to a safe configuration to use
34 ti,max-irqs = <160>;
37 ti,irqs-reserved = <0 1 2 3 5 6 131 132>;
38 ti,irqs-skip = <10 133 139 140>;
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| /linux/drivers/bus/fsl-mc/ |
| H A D | fsl-mc-allocator.c | 347 * ID. A block of IRQs is pre-allocated and maintained in a pool
353 * It allocates a block of IRQs from the GIC-ITS.
415 * It frees the IRQs that were allocated to the pool, back to the GIC-ITS.
441 * Allocate the IRQs required by a given fsl-mc device.
449 struct fsl_mc_device_irq **irqs = NULL; in fsl_mc_allocate_irqs() local
453 if (mc_dev->irqs) in fsl_mc_allocate_irqs()
471 "Not able to allocate %u irqs for device\n", irq_count); in fsl_mc_allocate_irqs()
475 irqs = devm_kcalloc(&mc_dev->dev, irq_count, sizeof(irqs[0]), in fsl_mc_allocate_irqs()
477 if (!irqs) in fsl_mc_allocate_irqs()
488 irqs[i] = to_fsl_mc_irq(resource); in fsl_mc_allocate_irqs()
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| /linux/drivers/crypto/intel/qat/qat_common/ |
| H A D | adf_isr.c | 181 struct adf_irq *irqs = pci_dev_info->msix_entries.irqs; in adf_free_irqs() local
188 if (irqs[i].enabled) { in adf_free_irqs()
196 if (irqs[i].enabled) { in adf_free_irqs()
206 struct adf_irq *irqs = pci_dev_info->msix_entries.irqs; in adf_request_irqs() local
218 name = irqs[i].name; in adf_request_irqs()
241 irqs[i].enabled = true; in adf_request_irqs()
246 name = irqs[i].name; in adf_request_irqs()
263 irqs[i].enabled = true; in adf_request_irqs()
274 struct adf_irq *irqs; in adf_isr_alloc_msix_vectors_data() local
280 irqs = kcalloc_node(msix_num_entries, sizeof(*irqs), in adf_isr_alloc_msix_vectors_data()
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| /linux/drivers/misc/ |
| H A D | hi6421v600-irq.c | 3 * Device driver for irqs in HISI PMIC IC
23 unsigned int *irqs; member
52 * IRQ number for the power key button and mask for both UP and DOWN IRQs
61 * registers are used by the irqs.
68 * The IRQs are mapped as:
108 /* Mark pending IRQs as handled */ in hi6421v600_irq_handler()
116 * If both powerkey down and up IRQs are received, in hi6421v600_irq_handler()
119 generic_handle_irq_safe(priv->irqs[POWERKEY_DOWN]); in hi6421v600_irq_handler()
120 generic_handle_irq_safe(priv->irqs[POWERKEY_UP]); in hi6421v600_irq_handler()
128 generic_handle_irq_safe(priv->irqs[offset + i * BITS_PER_BYTE]); in hi6421v600_irq_handler()
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| /linux/kernel/irq/ |
| H A D | timings.c | 382 static u64 __irq_timings_next_event(struct irqt_stat *irqs, int irq, u64 now) in __irq_timings_next_event() argument
386 if ((now - irqs->last_ts) >= NSEC_PER_SEC) { in __irq_timings_next_event()
387 irqs->count = irqs->last_ts = 0; in __irq_timings_next_event()
396 period_max = irqs->count > (3 * PREDICTION_PERIOD_MAX) ? in __irq_timings_next_event()
397 PREDICTION_PERIOD_MAX : irqs->count / 3; in __irq_timings_next_event()
409 count = irqs->count < IRQ_TIMINGS_SIZE ? in __irq_timings_next_event()
410 irqs->count : IRQ_TIMINGS_SIZE; in __irq_timings_next_event()
412 start = irqs->count < IRQ_TIMINGS_SIZE ? in __irq_timings_next_event()
413 0 : (irqs->count & IRQ_TIMINGS_MASK); in __irq_timings_next_event()
424 irqs->timings[i] = irqs->circ_timings[index]; in __irq_timings_next_event()
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| /linux/include/linux/mfd/ |
| H A D | rohm-bd96801.h | 78 /* ERRB IRQs */
80 /* Reg 0x52, 0x53, 0x54 - ERRB system IRQs */
101 /* Reg 0x55 BUCK1 ERR IRQs */
107 /* Reg 0x56 BUCK2 ERR IRQs */
113 /* Reg 0x57 BUCK3 ERR IRQs */
119 /* Reg 0x58 BUCK4 ERR IRQs */
125 /* Reg 0x59 LDO5 ERR IRQs */
131 /* Reg 0x5a LDO6 ERR IRQs */
137 /* Reg 0x5b LDO7 ERR IRQs */
144 /* INTB IRQs */
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| H A D | rohm-bd96802.h | 9 * IRQs.
15 /* ERRB IRQs */
17 /* Reg 0x52, 0x53, 0x54 - ERRB system IRQs */
36 /* Reg 0x55 BUCK1 ERR IRQs */
42 /* Reg 0x56 BUCK2 ERR IRQs */
49 /* INTB IRQs */
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| /linux/drivers/gpio/ |
| H A D | gpio-davinci.c | 61 int irqs[MAX_INT_PER_BANK]; member
182 dev_err(dev, "Too many IRQs!\n"); in davinci_gpio_probe()
195 chips->irqs[i] = platform_get_irq(pdev, i); in davinci_gpio_probe()
196 if (chips->irqs[i] < 0) in davinci_gpio_probe()
197 return chips->irqs[i]; in davinci_gpio_probe()
237 * We expect irqs will normally be set up as input pins, but they can also be
321 /* ack any irqs */ in gpio_irq_handler()
359 * NOTE: we assume for now that only irqs in the first gpio_chip in gpio_to_irq_unbanked()
360 * can provide direct-mapped IRQs to AINTC (up to 32 GPIOs). in gpio_to_irq_unbanked()
363 return d->irqs[offset]; in gpio_to_irq_unbanked()
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| H A D | gpio-reg.c | 28 const int *irqs; member
114 int irq = r->irqs[offset]; in gpio_reg_to_irq()
132 * @irqs: array of %num ints describing the interrupt mapping for each
145 const char *const *names, struct irq_domain *irqdom, const int *irqs) in gpio_reg_init() argument
167 if (irqs) in gpio_reg_init()
175 r->irqs = irqs; in gpio_reg_init()
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| /linux/drivers/base/ |
| H A D | auxiliary_sysfs.c | 21 .name = "irqs",
38 xa_init(&auxdev->sysfs.irqs); in auxiliary_irq_dir_prepare()
51 * unique irqs of the auxiliary devices. The driver must not invoke this API
73 ret = xa_insert(&auxdev->sysfs.irqs, irq, info, GFP_KERNEL); in auxiliary_device_sysfs_irq_add()
83 xa_store(&auxdev->sysfs.irqs, irq, no_free_ptr(info), GFP_KERNEL); in auxiliary_device_sysfs_irq_add()
87 xa_erase(&auxdev->sysfs.irqs, irq); in auxiliary_device_sysfs_irq_add()
102 struct auxiliary_irq_info *info __free(kfree) = xa_load(&auxdev->sysfs.irqs, irq); in auxiliary_device_sysfs_irq_remove()
111 xa_erase(&auxdev->sysfs.irqs, irq); in auxiliary_device_sysfs_irq_remove()
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| /linux/drivers/irqchip/ |
| H A D | irq-bcm6345-l1.c | 19 * 0x1000_0028: CPU0_W0_STATUS IRQs 31-63
20 * 0x1000_002c: CPU0_W1_STATUS IRQs 0-31
23 * 0x1000_0038: CPU1_W0_STATUS IRQs 31-63
24 * 0x1000_003c: CPU1_W1_STATUS IRQs 0-31
31 * 0x1000_0030: CPU0_W0_STATUS IRQs 96-127
32 * 0x1000_0034: CPU0_W1_STATUS IRQs 64-95
33 * 0x1000_0038: CPU0_W2_STATUS IRQs 32-63
34 * 0x1000_003c: CPU0_W3_STATUS IRQs 0-31
39 * 0x1000_0050: CPU1_W0_STATUS IRQs 96-127
40 * 0x1000_0054: CPU1_W1_STATUS IRQs 64-95
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| H A D | irq-nvic.c | 33 * Each bank handles 32 irqs. Only the 16th (= last) bank handles only
34 * 16 irqs.
76 unsigned int irqs, i, numbanks; in nvic_of_init() local
89 irqs = numbanks * 32; in nvic_of_init()
90 if (irqs > NVIC_MAX_IRQ) in nvic_of_init()
91 irqs = NVIC_MAX_IRQ; in nvic_of_init()
94 irq_domain_create_linear(of_fwnode_handle(node), irqs, &nvic_irq_domain_ops, NULL); in nvic_of_init()
131 for (i = 0; i < irqs; i += 4) in nvic_of_init()
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| H A D | irq-crossbar.c | 144 * @nr_irqs: number of irqs to free
219 of_property_read_u32(node, "ti,max-irqs", &max); in crossbar_of_init()
221 pr_err("missing 'ti,max-irqs' property\n"); in crossbar_of_init()
234 /* Get and mark reserved irqs */ in crossbar_of_init()
235 irqsr = of_get_property(node, "ti,irqs-reserved", &size); in crossbar_of_init()
241 "ti,irqs-reserved", in crossbar_of_init()
252 /* Skip irqs hardwired to bypass the crossbar */ in crossbar_of_init()
253 irqsr = of_get_property(node, "ti,irqs-skip", &size); in crossbar_of_init()
259 "ti,irqs-skip", in crossbar_of_init()
296 * reserved irqs. so find and store the offsets once. in crossbar_of_init()
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| H A D | irq-ingenic-tcu.c | 93 int ret, irqs; in ingenic_tcu_irq_init() local
105 irqs = of_property_count_elems_of_size(np, "interrupts", sizeof(u32)); in ingenic_tcu_irq_init()
106 if (irqs < 0 || irqs > ARRAY_SIZE(tcu->parent_irqs)) { in ingenic_tcu_irq_init()
112 tcu->nb_parent_irqs = irqs; in ingenic_tcu_irq_init()
143 /* Mask all IRQs by default */ in ingenic_tcu_irq_init()
156 for (i = 0; i < irqs; i++) { in ingenic_tcu_irq_init()
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| /linux/drivers/pci/controller/ |
| H A D | vmd.c | 114 * struct vmd_irq_list - list of driver requested IRQs mapping to a VMD vector
117 * @count: number of child IRQs assigned to this vector; used to track
135 struct vmd_irq_list *irqs; member
153 struct vmd_irq_list *irqs) in index_from_irqs() argument
155 return irqs - vmd->irqs; in index_from_irqs()
159 * Drivers managing a device in a VMD domain allocate their own IRQs as before,
238 return &vmd->irqs[vmd->first_vec]; in vmd_next_irq()
248 return &vmd->irqs[vmd->first_vec]; in vmd_next_irq()
254 if (vmd->irqs[i].count < vmd->irqs[best].count) in vmd_next_irq()
256 vmd->irqs[best].count++; in vmd_next_irq()
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| /linux/drivers/pcmcia/ |
| H A D | sa1111_generic.c | 141 int i, ret = 0, irqs[NUM_IRQS]; in sa1111_pcmcia_add() local
148 irqs[i] = sa1111_get_irq(dev, i); in sa1111_pcmcia_add()
149 if (irqs[i] <= 0) in sa1111_pcmcia_add()
150 return irqs[i] ? : -ENXIO; in sa1111_pcmcia_add()
166 s->soc.socket.pci_irq = irqs[IDX_IRQ_S1_READY_NINT]; in sa1111_pcmcia_add()
167 s->soc.stat[SOC_STAT_CD].irq = irqs[IDX_IRQ_S1_CD_VALID]; in sa1111_pcmcia_add()
169 s->soc.stat[SOC_STAT_BVD1].irq = irqs[IDX_IRQ_S1_BVD1_STSCHG]; in sa1111_pcmcia_add()
172 s->soc.socket.pci_irq = irqs[IDX_IRQ_S0_READY_NINT]; in sa1111_pcmcia_add()
173 s->soc.stat[SOC_STAT_CD].irq = irqs[IDX_IRQ_S0_CD_VALID]; in sa1111_pcmcia_add()
175 s->soc.stat[SOC_STAT_BVD1].irq = irqs[IDX_IRQ_S0_BVD1_STSCHG]; in sa1111_pcmcia_add()
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| /linux/Documentation/power/ |
| H A D | suspend-and-interrupts.rst | 9 Suspending and Resuming Device IRQs
12 Device interrupt request lines (IRQs) are generally disabled during system
21 interrupt handlers for shared IRQs that device drivers implementing them were
29 Device IRQs are re-enabled during system resume, right before the "early" phase
91 not executed for system wakeup IRQs. They are only executed for IRQF_NO_SUSPEND
92 IRQs at that time, but those IRQs should not be configured for system wakeup
126 Second, both enable_irq_wake() and IRQF_NO_SUSPEND apply to entire IRQs and not
133 must be able to discern spurious IRQs from genuine wakeup events (signalling
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| /linux/drivers/pci/pcie/ |
| H A D | portdrv.c | 108 * @irqs: Array of interrupt vectors to populate
113 static int pcie_port_enable_irq_vec(struct pci_dev *dev, int *irqs, int mask) in pcie_port_enable_irq_vec() argument
155 irqs[PCIE_PORT_SERVICE_PME_SHIFT] = pcie_irq; in pcie_port_enable_irq_vec()
156 irqs[PCIE_PORT_SERVICE_HP_SHIFT] = pcie_irq; in pcie_port_enable_irq_vec()
157 irqs[PCIE_PORT_SERVICE_BWCTRL_SHIFT] = pcie_irq; in pcie_port_enable_irq_vec()
161 irqs[PCIE_PORT_SERVICE_AER_SHIFT] = pci_irq_vector(dev, aer); in pcie_port_enable_irq_vec()
164 irqs[PCIE_PORT_SERVICE_DPC_SHIFT] = pci_irq_vector(dev, dpc); in pcie_port_enable_irq_vec()
170 * pcie_init_service_irqs - initialize irqs for PCI Express port services
172 * @irqs: Array of irqs t
177 pcie_init_service_irqs(struct pci_dev * dev,int * irqs,int mask) pcie_init_service_irqs() argument
334 int irqs[PCIE_PORT_DEVICE_MAXSERVICES]; pcie_port_device_register() local
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| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | st,stih407-irq-syscfg.yaml | 7 title: STMicroelectronics STi System Configuration Controlled IRQs
14 Management), and PL310 L2 Cache IRQs are controlled using System
26 description: Array of IRQs to enable.
40 description: External IRQs can be inverted at will. This property inverts
41 these three IRQs using bitwise logic, each one being encoded respectively
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| /linux/arch/arc/kernel/ |
| H A D | intc-arcv2.c | 17 unsigned int pad:3, firq:1, prio:4, exts:8, irqs:8, ver:8; member
19 unsigned int ver:8, irqs:8, exts:8, prio:4, firq:1, pad:3;
61 * Linux by default uses lower prio 1 for most irqs, reserving 0 for in arc_init_IRQ()
79 for (i = NR_EXCEPTIONS; i < irq_bcr.irqs + NR_EXCEPTIONS; i++) { in arc_init_IRQ()
84 * Only mask cpu private IRQs here. in arc_init_IRQ()
136 * core intc IRQs [16, 23]: in arcv2_irq_map()
168 nr_cpu_irqs = irq_bcr.irqs + NR_EXCEPTIONS; in init_onchip_IRQ()
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| /linux/arch/powerpc/platforms/cell/ |
| H A D | spu_base.c | 386 if (spu->irqs[0]) { in spu_request_irqs()
389 ret = request_irq(spu->irqs[0], spu_irq_class_0, in spu_request_irqs()
394 if (spu->irqs[1]) { in spu_request_irqs()
397 ret = request_irq(spu->irqs[1], spu_irq_class_1, in spu_request_irqs()
402 if (spu->irqs[2]) { in spu_request_irqs()
405 ret = request_irq(spu->irqs[2], spu_irq_class_2, in spu_request_irqs()
413 if (spu->irqs[1]) in spu_request_irqs()
414 free_irq(spu->irqs[1], spu); in spu_request_irqs()
416 if (spu->irqs[0]) in spu_request_irqs()
417 free_irq(spu->irqs[0], spu); in spu_request_irqs()
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| /linux/drivers/net/ethernet/intel/ice/ |
| H A D | ice_irq.c | 239 * ice_virt_get_irqs - get irqs for SR-IOV usacase
241 * @needed: number of irqs to get
248 * use this irqs
266 * ice_virt_free_irqs - free irqs used by the VF
269 * @irqs: number of irqs to free
271 void ice_virt_free_irqs(struct ice_pf *pf, u32 index, u32 irqs) in ice_virt_free_irqs() argument
274 irqs); in ice_virt_free_irqs()
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| /linux/arch/arm/mach-sa1100/include/mach/ |
| H A D | irqs.h | 3 * arch/arm/mach-sa1100/include/mach/irqs.h
9 * 2001/11/14 RMK Cleaned up and standardised a lot of the IRQs.
78 * within sensible limits. IRQs 61 to 76 are available.
87 * allocate their IRQs above NR_IRQS.
89 * LoCoMo has 4 additional IRQs, but is not sparse IRQ aware, and so has
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| /linux/drivers/net/ethernet/mellanox/mlx5/core/ |
| H A D | pci_irq.c | 181 xa_erase(&pool->irqs, irq->pool_index); in irq_release()
314 err = xa_err(xa_store(&pool->irqs, irq->pool_index, irq, GFP_KERNEL)); in mlx5_irq_alloc()
395 irq = xa_load(&pool->irqs, vecidx); in irq_pool_request_vector()
426 /* In some configs, there won't be a pool of SFs IRQs. Hence, returning in mlx5_irq_table_get_comp_irq_pool()
427 * the PF IRQs pool in case the SF pool doesn't exist. in mlx5_irq_table_get_comp_irq_pool()
440 /* In some configs, there won't be a pool of SFs IRQs. Hence, returning in ctrl_irq_pool_get()
441 * the PF IRQs pool in case the SF pool doesn't exist. in ctrl_irq_pool_get()
587 xa_init_flags(&pool->irqs, XA_FLAGS_ALLOC); in irq_pool_alloc()
606 * freeing all the IRQs, fast teardown for example. Hence, free the irqs in irq_pool_free()
609 xa_for_each(&pool->irqs, index, irq) in irq_pool_free()
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