Home
last modified time | relevance | path

Searched full:irqs (Results 1 – 25 of 1575) sorted by relevance

12345678910>>...63

/linux/drivers/vfio/platform/
H A Dvfio_platform_irq.c49 if (!(vdev->irqs[index].flags & VFIO_IRQ_INFO_MASKABLE)) in vfio_platform_set_irq_mask()
56 return vfio_virqfd_enable((void *) &vdev->irqs[index], in vfio_platform_set_irq_mask()
59 &vdev->irqs[index].mask, fd); in vfio_platform_set_irq_mask()
61 vfio_virqfd_disable(&vdev->irqs[index].mask); in vfio_platform_set_irq_mask()
66 vfio_platform_mask(&vdev->irqs[index]); in vfio_platform_set_irq_mask()
72 vfio_platform_mask(&vdev->irqs[index]); in vfio_platform_set_irq_mask()
109 if (!(vdev->irqs[index].flags & VFIO_IRQ_INFO_MASKABLE)) in vfio_platform_set_irq_unmask()
116 return vfio_virqfd_enable((void *) &vdev->irqs[index], in vfio_platform_set_irq_unmask()
119 &vdev->irqs[index].unmask, in vfio_platform_set_irq_unmask()
122 vfio_virqfd_disable(&vdev->irqs[index].unmask); in vfio_platform_set_irq_unmask()
[all …]
/linux/Documentation/devicetree/bindings/arm/omap/
H A Dcrossbar.txt13 - ti,max-irqs: Total number of irqs available at the parent interrupt controller.
17 - ti,irqs-reserved: List of the reserved irq lines that are not muxed using
23 - ti,irqs-skip: This is similar to "ti,irqs-reserved", but these are for
24 SOC-specific hard-wiring of those irqs which unexpectedly bypasses the
25 crossbar. These irqs have a crossbar register, but still cannot be used.
27 - ti,irqs-safe-map: integer which maps to a safe configuration to use
34 ti,max-irqs = <160>;
37 ti,irqs-reserved = <0 1 2 3 5 6 131 132>;
38 ti,irqs-skip = <10 133 139 140>;
/linux/arch/powerpc/platforms/powernv/
H A Dpci-cxl.c63 void pnv_cxl_release_hwirq_ranges(struct cxl_irq_ranges *irqs, in pnv_cxl_release_hwirq_ranges() argument
71 if (!irqs->range[i]) in pnv_cxl_release_hwirq_ranges()
74 i, irqs->offset[i], in pnv_cxl_release_hwirq_ranges()
75 irqs->range[i]); in pnv_cxl_release_hwirq_ranges()
76 hwirq = irqs->offset[i] - phb->msi_base; in pnv_cxl_release_hwirq_ranges()
78 irqs->range[i]); in pnv_cxl_release_hwirq_ranges()
83 int pnv_cxl_alloc_hwirq_ranges(struct cxl_irq_ranges *irqs, in pnv_cxl_alloc_hwirq_ranges() argument
90 memset(irqs, 0, sizeof(struct cxl_irq_ranges)); in pnv_cxl_alloc_hwirq_ranges()
104 irqs->offset[i] = phb->msi_base + hwirq; in pnv_cxl_alloc_hwirq_ranges()
105 irqs->range[i] = try; in pnv_cxl_alloc_hwirq_ranges()
[all …]
/linux/drivers/crypto/intel/qat/qat_common/
H A Dadf_isr.c181 struct adf_irq *irqs = pci_dev_info->msix_entries.irqs; in adf_free_irqs() local
188 if (irqs[i].enabled) { in adf_free_irqs()
196 if (irqs[i].enabled) { in adf_free_irqs()
206 struct adf_irq *irqs = pci_dev_info->msix_entries.irqs; in adf_request_irqs() local
218 name = irqs[i].name; in adf_request_irqs()
241 irqs[i].enabled = true; in adf_request_irqs()
246 name = irqs[i].name; in adf_request_irqs()
263 irqs[i].enabled = true; in adf_request_irqs()
274 struct adf_irq *irqs; in adf_isr_alloc_msix_vectors_data() local
280 irqs = kcalloc_node(msix_num_entries, sizeof(*irqs), in adf_isr_alloc_msix_vectors_data()
[all …]
/linux/drivers/misc/
H A Dhi6421v600-irq.c3 * Device driver for irqs in HISI PMIC IC
23 unsigned int *irqs; member
52 * IRQ number for the power key button and mask for both UP and DOWN IRQs
61 * registers are used by the irqs.
68 * The IRQs are mapped as:
108 /* Mark pending IRQs as handled */ in hi6421v600_irq_handler()
116 * If both powerkey down and up IRQs are received, in hi6421v600_irq_handler()
119 generic_handle_irq_safe(priv->irqs[POWERKEY_DOWN]); in hi6421v600_irq_handler()
120 generic_handle_irq_safe(priv->irqs[POWERKEY_UP]); in hi6421v600_irq_handler()
128 generic_handle_irq_safe(priv->irqs[offset + i * BITS_PER_BYTE]); in hi6421v600_irq_handler()
[all …]
/linux/drivers/bus/fsl-mc/
H A Dfsl-mc-allocator.c347 * ID. A block of IRQs is pre-allocated and maintained in a pool
353 * It allocates a block of IRQs from the GIC-ITS.
415 * It frees the IRQs that were allocated to the pool, back to the GIC-ITS.
441 * Allocate the IRQs required by a given fsl-mc device.
449 struct fsl_mc_device_irq **irqs = NULL; in fsl_mc_allocate_irqs() local
453 if (mc_dev->irqs) in fsl_mc_allocate_irqs()
471 "Not able to allocate %u irqs for device\n", irq_count); in fsl_mc_allocate_irqs()
475 irqs = devm_kcalloc(&mc_dev->dev, irq_count, sizeof(irqs[0]), in fsl_mc_allocate_irqs()
477 if (!irqs) in fsl_mc_allocate_irqs()
488 irqs[i] = to_fsl_mc_irq(resource); in fsl_mc_allocate_irqs()
[all …]
/linux/kernel/irq/
H A Dtimings.c382 static u64 __irq_timings_next_event(struct irqt_stat *irqs, int irq, u64 now) in __irq_timings_next_event() argument
386 if ((now - irqs->last_ts) >= NSEC_PER_SEC) { in __irq_timings_next_event()
387 irqs->count = irqs->last_ts = 0; in __irq_timings_next_event()
396 period_max = irqs->count > (3 * PREDICTION_PERIOD_MAX) ? in __irq_timings_next_event()
397 PREDICTION_PERIOD_MAX : irqs->count / 3; in __irq_timings_next_event()
409 count = irqs->count < IRQ_TIMINGS_SIZE ? in __irq_timings_next_event()
410 irqs->count : IRQ_TIMINGS_SIZE; in __irq_timings_next_event()
412 start = irqs->count < IRQ_TIMINGS_SIZE ? in __irq_timings_next_event()
413 0 : (irqs->count & IRQ_TIMINGS_MASK); in __irq_timings_next_event()
424 irqs->timings[i] = irqs->circ_timings[index]; in __irq_timings_next_event()
[all …]
/linux/include/linux/mfd/
H A Drohm-bd96801.h76 /* ERRB IRQs */
78 /* Reg 0x52, 0x53, 0x54 - ERRB system IRQs */
99 /* Reg 0x55 BUCK1 ERR IRQs */
105 /* Reg 0x56 BUCK2 ERR IRQs */
111 /* Reg 0x57 BUCK3 ERR IRQs */
117 /* Reg 0x58 BUCK4 ERR IRQs */
123 /* Reg 0x59 LDO5 ERR IRQs */
129 /* Reg 0x5a LDO6 ERR IRQs */
135 /* Reg 0x5b LDO7 ERR IRQs */
142 /* INTB IRQs */
/linux/drivers/gpio/
H A Dgpio-davinci.c61 int irqs[MAX_INT_PER_BANK]; member
189 dev_err(dev, "Too many IRQs!\n"); in davinci_gpio_probe()
202 chips->irqs[i] = platform_get_irq(pdev, i); in davinci_gpio_probe()
203 if (chips->irqs[i] < 0) in davinci_gpio_probe()
204 return chips->irqs[i]; in davinci_gpio_probe()
244 * We expect irqs will normally be set up as input pins, but they can also be
319 /* ack any irqs */ in gpio_irq_handler()
357 * NOTE: we assume for now that only irqs in the first gpio_chip in gpio_to_irq_unbanked()
358 * can provide direct-mapped IRQs to AINTC (up to 32 GPIOs). in gpio_to_irq_unbanked()
361 return d->irqs[offset]; in gpio_to_irq_unbanked()
[all …]
H A Dgpio-reg.c28 const int *irqs; member
110 int irq = r->irqs[offset]; in gpio_reg_to_irq()
128 * @irqs: array of %num ints describing the interrupt mapping for each
141 const char *const *names, struct irq_domain *irqdom, const int *irqs) in gpio_reg_init() argument
163 if (irqs) in gpio_reg_init()
171 r->irqs = irqs; in gpio_reg_init()
/linux/drivers/base/
H A Dauxiliary_sysfs.c21 .name = "irqs",
38 xa_init(&auxdev->sysfs.irqs); in auxiliary_irq_dir_prepare()
51 * unique irqs of the auxiliary devices. The driver must not invoke this API
73 ret = xa_insert(&auxdev->sysfs.irqs, irq, info, GFP_KERNEL); in auxiliary_device_sysfs_irq_add()
83 xa_store(&auxdev->sysfs.irqs, irq, no_free_ptr(info), GFP_KERNEL); in auxiliary_device_sysfs_irq_add()
87 xa_erase(&auxdev->sysfs.irqs, irq); in auxiliary_device_sysfs_irq_add()
102 struct auxiliary_irq_info *info __free(kfree) = xa_load(&auxdev->sysfs.irqs, irq); in auxiliary_device_sysfs_irq_remove()
111 xa_erase(&auxdev->sysfs.irqs, irq); in auxiliary_device_sysfs_irq_remove()
/linux/drivers/irqchip/
H A Dirq-bcm6345-l1.c19 * 0x1000_0028: CPU0_W0_STATUS IRQs 31-63
20 * 0x1000_002c: CPU0_W1_STATUS IRQs 0-31
23 * 0x1000_0038: CPU1_W0_STATUS IRQs 31-63
24 * 0x1000_003c: CPU1_W1_STATUS IRQs 0-31
31 * 0x1000_0030: CPU0_W0_STATUS IRQs 96-127
32 * 0x1000_0034: CPU0_W1_STATUS IRQs 64-95
33 * 0x1000_0038: CPU0_W2_STATUS IRQs 32-63
34 * 0x1000_003c: CPU0_W3_STATUS IRQs 0-31
39 * 0x1000_0050: CPU1_W0_STATUS IRQs 96-127
40 * 0x1000_0054: CPU1_W1_STATUS IRQs 64-95
[all …]
H A Dirq-nvic.c33 * Each bank handles 32 irqs. Only the 16th (= last) bank handles only
34 * 16 irqs.
76 unsigned int irqs, i, ret, numbanks; in nvic_of_init() local
88 irqs = numbanks * 32; in nvic_of_init()
89 if (irqs > NVIC_MAX_IRQ) in nvic_of_init()
90 irqs = NVIC_MAX_IRQ; in nvic_of_init()
93 irq_domain_add_linear(node, irqs, &nvic_irq_domain_ops, NULL); in nvic_of_init()
130 for (i = 0; i < irqs; i += 4) in nvic_of_init()
H A Dirq-crossbar.c144 * @nr_irqs: number of irqs to free
219 of_property_read_u32(node, "ti,max-irqs", &max); in crossbar_of_init()
221 pr_err("missing 'ti,max-irqs' property\n"); in crossbar_of_init()
234 /* Get and mark reserved irqs */ in crossbar_of_init()
235 irqsr = of_get_property(node, "ti,irqs-reserved", &size); in crossbar_of_init()
241 "ti,irqs-reserved", in crossbar_of_init()
252 /* Skip irqs hardwired to bypass the crossbar */ in crossbar_of_init()
253 irqsr = of_get_property(node, "ti,irqs-skip", &size); in crossbar_of_init()
259 "ti,irqs-skip", in crossbar_of_init()
296 * reserved irqs. so find and store the offsets once. in crossbar_of_init()
[all …]
H A Dirq-ingenic-tcu.c96 int ret, irqs; in ingenic_tcu_irq_init() local
108 irqs = of_property_count_elems_of_size(np, "interrupts", sizeof(u32)); in ingenic_tcu_irq_init()
109 if (irqs < 0 || irqs > ARRAY_SIZE(tcu->parent_irqs)) { in ingenic_tcu_irq_init()
115 tcu->nb_parent_irqs = irqs; in ingenic_tcu_irq_init()
146 /* Mask all IRQs by default */ in ingenic_tcu_irq_init()
159 for (i = 0; i < irqs; i++) { in ingenic_tcu_irq_init()
/linux/drivers/power/supply/
H A Daxp20x_ac_power.c48 unsigned int irqs[] __counted_by(num_irqs);
293 * As nested threaded IRQs are not automatically disabled during in axp20x_ac_power_suspend()
294 * suspend, we must explicitly disable the remainder of the IRQs. in axp20x_ac_power_suspend()
297 enable_irq_wake(power->irqs[i++]); in axp20x_ac_power_suspend()
299 disable_irq(power->irqs[i++]); in axp20x_ac_power_suspend()
310 disable_irq_wake(power->irqs[i++]); in axp20x_ac_power_resume()
312 enable_irq(power->irqs[i++]); in axp20x_ac_power_resume()
340 struct_size(power, irqs, axp_data->num_irq_names), in axp20x_ac_power_probe()
376 /* Request irqs after registering, as irqs may trigger immediately */ in axp20x_ac_power_probe()
382 power->irqs[i] = regmap_irq_get_virq(axp20x->regmap_irqc, irq); in axp20x_ac_power_probe()
[all …]
/linux/drivers/pcmcia/
H A Dsa1111_generic.c141 int i, ret = 0, irqs[NUM_IRQS]; in sa1111_pcmcia_add() local
148 irqs[i] = sa1111_get_irq(dev, i); in sa1111_pcmcia_add()
149 if (irqs[i] <= 0) in sa1111_pcmcia_add()
150 return irqs[i] ? : -ENXIO; in sa1111_pcmcia_add()
166 s->soc.socket.pci_irq = irqs[IDX_IRQ_S1_READY_NINT]; in sa1111_pcmcia_add()
167 s->soc.stat[SOC_STAT_CD].irq = irqs[IDX_IRQ_S1_CD_VALID]; in sa1111_pcmcia_add()
169 s->soc.stat[SOC_STAT_BVD1].irq = irqs[IDX_IRQ_S1_BVD1_STSCHG]; in sa1111_pcmcia_add()
172 s->soc.socket.pci_irq = irqs[IDX_IRQ_S0_READY_NINT]; in sa1111_pcmcia_add()
173 s->soc.stat[SOC_STAT_CD].irq = irqs[IDX_IRQ_S0_CD_VALID]; in sa1111_pcmcia_add()
175 s->soc.stat[SOC_STAT_BVD1].irq = irqs[IDX_IRQ_S0_BVD1_STSCHG]; in sa1111_pcmcia_add()
/linux/Documentation/power/
H A Dsuspend-and-interrupts.rst9 Suspending and Resuming Device IRQs
12 Device interrupt request lines (IRQs) are generally disabled during system
21 interrupt handlers for shared IRQs that device drivers implementing them were
29 Device IRQs are re-enabled during system resume, right before the "early" phase
91 not executed for system wakeup IRQs. They are only executed for IRQF_NO_SUSPEND
92 IRQs at that time, but those IRQs should not be configured for system wakeup
126 Second, both enable_irq_wake() and IRQF_NO_SUSPEND apply to entire IRQs and not
133 must be able to discern spurious IRQs from genuine wakeup events (signalling
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dst,stih407-irq-syscfg.yaml7 title: STMicroelectronics STi System Configuration Controlled IRQs
14 Management), and PL310 L2 Cache IRQs are controlled using System
26 description: Array of IRQs to enable.
40 description: External IRQs can be inverted at will. This property inverts
41 these three IRQs using bitwise logic, each one being encoded respectively
/linux/drivers/pci/pcie/
H A Dportdrv.c108 * @irqs: Array of interrupt vectors to populate
113 static int pcie_port_enable_irq_vec(struct pci_dev *dev, int *irqs, int mask) in pcie_port_enable_irq_vec() argument
155 irqs[PCIE_PORT_SERVICE_PME_SHIFT] = pcie_irq; in pcie_port_enable_irq_vec()
156 irqs[PCIE_PORT_SERVICE_HP_SHIFT] = pcie_irq; in pcie_port_enable_irq_vec()
157 irqs[PCIE_PORT_SERVICE_BWCTRL_SHIFT] = pcie_irq; in pcie_port_enable_irq_vec()
161 irqs[PCIE_PORT_SERVICE_AER_SHIFT] = pci_irq_vector(dev, aer); in pcie_port_enable_irq_vec()
164 irqs[PCIE_PORT_SERVICE_DPC_SHIFT] = pci_irq_vector(dev, dpc); in pcie_port_enable_irq_vec()
170 * pcie_init_service_irqs - initialize irqs for PCI Express port services
172 * @irqs: Array of irqs to populate
177 static int pcie_init_service_irqs(struct pci_dev *dev, int *irqs, int mask) in pcie_init_service_irqs() argument
[all …]
/linux/arch/arc/kernel/
H A Dintc-arcv2.c17 unsigned int pad:3, firq:1, prio:4, exts:8, irqs:8, ver:8; member
19 unsigned int ver:8, irqs:8, exts:8, prio:4, firq:1, pad:3;
61 * Linux by default uses lower prio 1 for most irqs, reserving 0 for in arc_init_IRQ()
79 for (i = NR_EXCEPTIONS; i < irq_bcr.irqs + NR_EXCEPTIONS; i++) { in arc_init_IRQ()
84 * Only mask cpu private IRQs here. in arc_init_IRQ()
136 * core intc IRQs [16, 23]: in arcv2_irq_map()
168 nr_cpu_irqs = irq_bcr.irqs + NR_EXCEPTIONS; in init_onchip_IRQ()
/linux/tools/testing/selftests/kvm/aarch64/
H A Dvgic_irq.c3 * vgic_irq.c - Test userspace injection of IRQs
5 * This test validates the injection of IRQs from userspace using various
27 uint32_t nr_irqs; /* number of KVM supported IRQs. */
288 * Restore the active state of multiple concurrent IRQs (given by
290 * destination side assuming there are some active IRQs that were not
301 * Set the priorities of the first (KVM_NUM_PRIOS - 1) IRQs in guest_restore_active()
324 /* finish handling the IRQs starting with the highest priority one. */ in guest_restore_active()
341 * This function should only be used in test_inject_preemption (with IRQs
357 * Inject multiple concurrent IRQs (num IRQs starting at first_intid) and
368 /* Set the priorities of the first (KVM_NUM_PRIOS - 1) IRQs in test_inject_preemption()
[all …]
/linux/arch/powerpc/platforms/ps3/
H A Dspu.c246 0, &spu->irqs[0]); in setup_interrupts()
252 1, &spu->irqs[1]); in setup_interrupts()
258 2, &spu->irqs[2]); in setup_interrupts()
266 ps3_spe_irq_destroy(spu->irqs[1]); in setup_interrupts()
268 ps3_spe_irq_destroy(spu->irqs[0]); in setup_interrupts()
270 spu->irqs[0] = spu->irqs[1] = spu->irqs[2] = 0; in setup_interrupts()
316 ps3_spe_irq_destroy(spu->irqs[2]); in ps3_destroy_spu()
317 ps3_spe_irq_destroy(spu->irqs[1]); in ps3_destroy_spu()
318 ps3_spe_irq_destroy(spu->irqs[0]); in ps3_destroy_spu()
320 spu->irqs[0] = spu->irqs[1] = spu->irqs[2] = 0; in ps3_destroy_spu()
/linux/drivers/misc/cxl/
H A Dirq.c192 irq_off = hwirq - ctx->irqs.offset[r]; in cxl_irq_afu()
193 range = ctx->irqs.range[r]; in cxl_irq_afu()
311 if ((rc = cxl_ops->alloc_irq_ranges(&ctx->irqs, ctx->afu->adapter, in afu_allocate_irqs()
317 ctx->irqs.offset[0] = ctx->afu->native->psl_hwirq; in afu_allocate_irqs()
318 ctx->irqs.range[0] = 1; in afu_allocate_irqs()
328 * actual hardware IRQs. in afu_allocate_irqs()
331 for (i = 0; i < ctx->irqs.range[r]; i++) { in afu_allocate_irqs()
351 cxl_ops->release_irq_ranges(&ctx->irqs, ctx->afu->adapter); in afu_allocate_irqs()
367 hwirq = ctx->irqs.offset[r]; in afu_register_hwirqs()
368 for (i = 0; i < ctx->irqs.range[r]; hwirq++, i++) { in afu_register_hwirqs()
[all …]
/linux/arch/powerpc/platforms/cell/
H A Dspu_base.c387 if (spu->irqs[0]) { in spu_request_irqs()
390 ret = request_irq(spu->irqs[0], spu_irq_class_0, in spu_request_irqs()
395 if (spu->irqs[1]) { in spu_request_irqs()
398 ret = request_irq(spu->irqs[1], spu_irq_class_1, in spu_request_irqs()
403 if (spu->irqs[2]) { in spu_request_irqs()
406 ret = request_irq(spu->irqs[2], spu_irq_class_2, in spu_request_irqs()
414 if (spu->irqs[1]) in spu_request_irqs()
415 free_irq(spu->irqs[1], spu); in spu_request_irqs()
417 if (spu->irqs[0]) in spu_request_irqs()
418 free_irq(spu->irqs[0], spu); in spu_request_irqs()
[all …]

12345678910>>...63