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/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dmstar,mst-intc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/mstar,mst-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark-PK Tsai <mark-pk.tsai@mediatek.com>
21 const: mstar,mst-intc
23 interrupt-controller: true
25 "#interrupt-cells":
33 mstar,irqs-map-range:
35 The range <start, end> of parent interrupt controller's interrupt
[all …]
/linux/Documentation/core-api/irq/
H A Dirq-domain.rst9 that each one gets assigned non-overlapping allocations of Linux
24 For this reason we need a mechanism to separate controller-local
29 the controller-local IRQ (hwirq) number into the Linux IRQ number
55 the hwirq, and call the .map() callback so the driver can perform any
61 - irq_resolve_mapping() returns a pointer to the irq_desc structure
64 - irq_find_mapping() returns a Linux IRQ number for a given domain and
66 - irq_linear_revmap() is now identical to irq_find_mapping(), and is
68 - generic_handle_domain_irq() handles an interrupt described by a
72 compatible with a RCU read-side critical section.
80 callbacks) then it can be directly obtained from irq_data->hwirq.
[all …]
/linux/drivers/soc/ti/
H A Dknav_qmss_queue.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com
12 #include <linux/dma-mapping.h>
44 * are to be re-defined
57 (kdev->instances + (idx << kdev->inst_shift))
60 list_for_each_entry_rcu(qh, &inst->handles, list, \
64 for (idx = 0, inst = kdev->instances; \
65 idx < (kdev)->num_queues_in_use; \
84 * @inst: - qmss queue instance like accumulator
95 if (atomic_read(&qh->notifier_enabled) <= 0) in knav_queue_notify()
[all …]
/linux/arch/sparc/kernel/
H A Dof_device_32.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/dma-mapping.h>
29 * parent as-is, not with the PCI translate in of_bus_pci_match()
50 static int of_bus_pci_map(u32 *addr, const u32 *range, in of_bus_pci_map() argument
57 if ((addr[0] ^ range[0]) & 0x03000000) in of_bus_pci_map()
58 return -EINVAL; in of_bus_pci_map()
60 if (of_out_of_range(addr + 1, range + 1, range + na + pna, in of_bus_pci_map()
61 na - 1, ns)) in of_bus_pci_map()
62 return -EINVAL; in of_bus_pci_map()
64 /* Start with the parent range base. */ in of_bus_pci_map()
[all …]
/linux/include/linux/gpio/
H A Ddriver.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 #include <linux/pinctrl/pinconf-generic.h>
48 * struct gpio_irq_chip - GPIO interrupt controller
78 * If non-NULL, will be set as the parent of this GPIO interrupt
90 * hardware IRQs correspond to the GPIO index 0..ngpio-1 (see the
97 * If some ranges of hardware IRQs do not have a corresponding parent
98 * HWIRQ, return -EINVAL, but also make sure to fill in @valid_mask and
113 * &gpiochip_populate_parent_fwspec_twocell will be used. A four-cell
148 * GPIO IRQs, provided by GPIO driver.
219 * @map:
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/linux/arch/arm/boot/dts/sigmastar/
H A Dmstar-v7.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/mstar-msc313-mpll.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
14 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a7";
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/linux/drivers/irqchip/
H A Dirq-ti-sci-inta.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/
24 #include <asm-generic/msi.h>
44 * struct ti_sci_inta_event_desc - Description of an event coming to
59 * struct ti_sci_inta_vint_desc - Description of a virtual interrupt coming out
78 * struct ti_sci_inta_irq_domain - Structure representing a TISCI based
87 * @ti_sci_id: TI-SCI device identifier
89 * @unmapped_dev_ids: Pointer to an array of TI-SCI device identifiers of
91 * Unmapped Events are not part of the Global Event Map and
95 * generating Unmapped Event, we must use the INTA's TI-SCI
[all …]
H A Dirq-mst-intc.c1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
4 * Author Mark-PK Tsai <mark-pk.tsai@mediatek.com>
49 raw_spin_lock_irqsave(&cd->lock, flags); in mst_set_irq()
50 val = readw_relaxed(cd->base + offset) | mask; in mst_set_irq()
51 writew_relaxed(val, cd->base + offset); in mst_set_irq()
52 raw_spin_unlock_irqrestore(&cd->lock, flags); in mst_set_irq()
65 raw_spin_lock_irqsave(&cd->lock, flags); in mst_clear_irq()
66 val = readw_relaxed(cd->base + offset) & ~mask; in mst_clear_irq()
67 writew_relaxed(val, cd->base + offset); in mst_clear_irq()
68 raw_spin_unlock_irqrestore(&cd->lock, flags); in mst_clear_irq()
[all …]
H A Dirq-i8259.c6 * Code to handle x86 style IRQs plus some generic interrupt stuff.
9 * Copyright (C) 1994 - 2000 Ralf Baechle
35 static int i8259A_auto_eoi = -1;
44 .name = "XT-PIC",
70 unsigned int mask, irq = d->irq - I8259A_IRQ_BASE; in disable_8259A_irq()
85 unsigned int mask, irq = d->irq - I8259A_IRQ_BASE; in enable_8259A_irq()
136 unsigned int irqmask, irq = d->irq - I8259A_IRQ_BASE; in mask_and_ack_8259A()
143 * to overdo spurious IRQ handling - it's usually a sign in mask_and_ack_8259A()
147 * Note that IRQ7 and IRQ15 (the two spurious IRQs in mask_and_ack_8259A()
148 * usually resulting from the 8259A-1|2 PICs) occur in mask_and_ack_8259A()
[all …]
/linux/arch/mips/ralink/
H A Dirq.c1 // SPDX-License-Identifier: GPL-2.0-only
29 /* we have a cascade of 8 irqs */
32 /* we have 32 SoC irqs */
71 rt_intc_w32(BIT(d->hwirq), INTC_REG_ENABLE); in ralink_intc_irq_unmask()
76 rt_intc_w32(BIT(d->hwirq), INTC_REG_DISABLE); in ralink_intc_irq_mask()
143 .map = intc_map,
153 if (!of_property_read_u32_array(node, "ralink,intc-registers", in intc_of_init()
155 pr_info("intc: using register map from devicetree\n"); in intc_of_init()
162 panic("Failed to get intc memory range"); in intc_of_init()
195 { .compatible = "mti,cpu-interrupt-controller", .data = mips_cpu_irq_of_init },
[all …]
/linux/drivers/pinctrl/
H A Dpinctrl-single.c25 #include <linux/pinctrl/pinconf-generic.h>
30 #include <linux/platform_data/pinctrl-single.h>
37 #define DRIVER_NAME "pinctrl-single"
41 * struct pcs_func_vals - mux function register offset and value pair
53 * struct pcs_conf_vals - pinconf parameter, pinconf register offset
70 * struct pcs_conf_type - pinconf property name, pinconf param pair
80 * struct pcs_function - pinctrl function
98 * struct pcs_gpiofunc_range - pin ranges with same mux value of gpio function
112 * struct pcs_data - wrapper for data needed by pinctrl framework
126 * struct pcs_soc_data - SoC specific settings
[all …]
/linux/arch/powerpc/platforms/52xx/
H A Dmpc52xx_pic.c23 * -----------------
26 * group has 3 irqs, External IRQ0, slice timer 0 irq, and wake from deep
27 * sleep. Main group include the other 3 external IRQs, slice timer 1, RTC,
29 * remaining irq sources from all of the on-chip peripherals (PSCs, Ethernet,
33 * -----
39 * a unique range of the global IRQ# space.
41 * To define a range of virq numbers for this controller, this driver first
61 * -------------------
62 * For actually manipulating IRQs (masking, enabling, clearing, etc) this
74 * register even though one of the external IRQs is in the critical group and
[all …]
/linux/arch/mips/lantiq/
H A Dirq.c1 // SPDX-License-Identifier: GPL-2.0-only
23 /* register definitions - internal irqs */
32 /* register definitions - external irqs */
45 * irqs generated by devices attached to the EBU need to be acked in
59 /* we have a cascade of 8 irqs */
75 return -1; in ltq_eiu_get_irq()
80 unsigned long offset = d->hwirq - MIPS_CPU_IRQ_CASCADE; in ltq_disable_irq()
98 unsigned long offset = d->hwirq - MIPS_CPU_IRQ_CASCADE; in ltq_mask_and_ack_irq()
117 unsigned long offset = d->hwirq - MIPS_CPU_IRQ_CASCADE; in ltq_ack_irq()
133 unsigned long offset = d->hwirq - MIPS_CPU_IRQ_CASCADE; in ltq_enable_irq()
[all …]
/linux/arch/powerpc/platforms/embedded6xx/
H A Dflipper-pic.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * arch/powerpc/platforms/embedded6xx/flipper-pic.c
6 * Copyright (C) 2004-2009 The GameCube Linux Team
9 #define DRV_MODULE_NAME "flipper-pic"
20 #include "flipper-pic.h"
84 .name = "flipper-pic",
101 irq_set_chip_data(virq, h->host_data); in flipper_pic_map()
108 .map = flipper_pic_map,
118 /* mask and ack all IRQs */ in __flipper_quiesce()
136 if (!of_device_is_compatible(pi, "nintendo,flipper-pi")) { in flipper_pic_init()
[all …]
H A Dhlwd-pic.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * arch/powerpc/platforms/embedded6xx/hlwd-pic.c
9 #define DRV_MODULE_NAME "hlwd-pic"
19 #include "hlwd-pic.h"
81 .name = "hlwd-pic",
98 irq_set_chip_data(virq, h->host_data); in hlwd_pic_map()
105 .map = hlwd_pic_map,
110 void __iomem *io_base = h->host_data; in __hlwd_pic_get_irq()
116 return 0; /* no more IRQs pending */ in __hlwd_pic_get_irq()
127 raw_spin_lock(&desc->lock); in hlwd_pic_irq_cascade()
[all …]
/linux/drivers/pci/hotplug/
H A Dcpqphp_ctrl.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
72 func = cpqhp_slot_find(ctrl->bus, in handle_switch_change()
73 (hp_slot + ctrl->slot_device_offset), 0); in handle_switch_change()
78 taskInfo = &(ctrl->event_queue[ctrl->next_event]); in handle_switch_change()
79 ctrl->next_event = (ctrl->next_event + 1) % 10; in handle_switch_change()
80 taskInfo->hp_slot = hp_slot; in handle_switch_change()
84 temp_word = ctrl->ctrl_int_comp >> 16; in handle_switch_change()
85 func->presence_save = (temp_word >> hp_slot) & 0x01; in handle_switch_change()
86 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02; in handle_switch_change()
[all …]
/linux/drivers/scsi/cxlflash/
H A Docxl_hw.c1 // SPDX-License-Identifier: GPL-2.0-or-later
29 * Pseudo-filesystem to allocate inodes.
39 return init_pseudo(fc, OCXLFLASH_FS_MAGIC) ? 0 : -ENOMEM; in ocxlflash_fs_init_fs_context()
50 * ocxlflash_release_mapping() - release the memory mapping
55 if (ctx->mapping) in ocxlflash_release_mapping()
57 ctx->mapping = NULL; in ocxlflash_release_mapping()
61 * ocxlflash_getfile() - allocate pseudo filesystem, inode, and the file
78 if (fops->owner && !try_module_get(fops->owner)) { in ocxlflash_getfile()
80 rc = -ENOENT; in ocxlflash_getfile()
92 inode = alloc_anon_inode(ocxlflash_vfs_mount->mnt_sb); in ocxlflash_getfile()
[all …]
/linux/drivers/pnp/
H A Dquirks.c1 // SPDX-License-Identifier: GPL-2.0
8 * Copyright (c) 2000 Peter Denison <peterd@pnd-pc.demon.co.uk>
9 * Copyright (C) 2008 Hewlett-Packard Development Company, L.P.
34 dev_err(&dev->dev, "couldn't add ioport region to option set " in quirk_awe32_add_ports()
40 new_option->u.port.min += offset; in quirk_awe32_add_ports()
41 new_option->u.port.max += offset; in quirk_awe32_add_ports()
42 list_add(&new_option->list, &option->list); in quirk_awe32_add_ports()
44 dev_info(&dev->dev, "added ioport region %#llx-%#llx to set %d\n", in quirk_awe32_add_ports()
45 (unsigned long long) new_option->u.port.min, in quirk_awe32_add_ports()
46 (unsigned long long) new_option->u.port.max, in quirk_awe32_add_ports()
[all …]
/linux/arch/powerpc/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
5 def_bool PPC64 && $(cc-option, -mabi=elfv2)
8 def_bool PPC64 && $(cc-option, -mcpu=power10 -mprefixed)
11 # Clang has a bug (https://github.com/llvm/llvm-project/issues/62372)
12 # where pcrel code is not generated if -msof
[all...]
/linux/arch/powerpc/platforms/44x/
H A Dhsta_msi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
18 #include <asm/ppc-pci.h>
30 /* An array mapping offsets to hardware IRQs */
45 /* We don't support MSI-X */ in hsta_setup_msi_irqs()
47 pr_debug("%s: MSI-X not supported.\n", __func__); in hsta_setup_msi_irqs()
48 return -EINVAL; in hsta_setup_msi_irqs()
51 msi_for_each_desc(entry, &dev->dev, MSI_DESC_NOTASSOCIATED) { in hsta_setup_msi_irqs()
62 return -EINVAL; in hsta_setup_msi_irqs()
66 * HSTA generates interrupts on writes to 128-bit aligned in hsta_setup_msi_irqs()
84 return -EINVAL; in hsta_setup_msi_irqs()
[all …]
/linux/drivers/pinctrl/nomadik/
H A Dpinctrl-abx500.h1 /* SPDX-License-Identifier: GPL-2.0 */
34 * struct abx500_function - ABx500 pinctrl mux function
46 * struct abx500_pingroup - describes a ABx500 pin group
49 * from the driver-local pin enumeration space
73 #define UNUSED -1
109 * struct abx500_gpio_irq_cluster - indicates GPIOs which are interrupt
113 * @to_irq: The ABx500 GPIO's associated IRQs are clustered
116 * read-in values into the cluster information table
126 * struct abx500_pinrange - map pin numbers to GPIO offsets
129 * @npins: number of pins to map from both offsets
[all …]
/linux/drivers/mfd/
H A Dmax14577.c1 // SPDX-License-Identifier: GPL-2.0+
3 // max14577.c - mfd core driver for the Maxim 14577/77836
18 #include <linux/mfd/max14577-private.h>
42 * maxim_charger_calc_reg_current - Calculate register value for current
54 * - is always between <limits.min, limits.max>;
55 * - is always less or equal to max_ua;
56 * - is the highest possible value;
57 * - may be lower than min_ua.
59 * On success returns 0. On error returns -EINVAL (requested min/max current
68 return -EINVAL; in maxim_charger_calc_reg_current()
[all …]
/linux/include/linux/
H A Dregmap.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * Register map access API
54 #define REGMAP_UPSHIFT(s) (-(s))
66 * struct reg_default - Default value for a register.
80 * struct reg_sequence - An individual write from a sequence of writes.
103 * regmap_read_poll_timeout - Poll until a condition is met or a timeout occurs
105 * @map: Regmap to read from
110 * tight-loops). Should be less than ~20ms since usleep_range
111 * is used (see Documentation/timers/timers-howto.rst).
114 * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read
[all …]
/linux/arch/arm/mm/
H A Dcache-uniphier.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2015-2016 Socionext Inc.
15 #include <asm/hardware/cache-uniphier.h>
21 #define UNIPHIER_SSCC_ACT BIT(19) /* Inst-Data separate */
23 #define UNIPHIER_SSCC_PRD BIT(17) /* enable pre-fetch */
37 #define UNIPHIER_SSCOPE_CM_FLUSH_PREFETCH 0x9 /* flush p-fetch buf */
56 /* Is the operation region specified by address range? */
61 * struct uniphier_cache_data - UniPhier outer cache specific data
71 * @range_op_max_size: max size that can be handled by a single range operation
93 * __uniphier_cache_sync - perform a sync point for a particular cache level
[all …]
/linux/drivers/net/wireless/ath/ath11k/
H A Dahb.c1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
12 #include <linux/dma-mapping.h>
28 { .compatible = "qcom,ipq8074-wifi",
31 { .compatible = "qcom,ipq6018-wifi",
34 { .compatible = "qcom,wcn6750-wifi",
37 { .compatible = "qcom,ipq5018-wifi",
48 "misc-pulse1",
49 "misc-latch",
[all …]

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