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Searched full:irq1 (Results 1 – 25 of 141) sorted by relevance

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/linux/drivers/net/ieee802154/
H A Dadf7242.c95 #define REG_IRQ1_EN0 0x3C7 /* RW Interrupt Mask set bits for IRQ1 */
96 #define REG_IRQ1_EN1 0x3C8 /* RW Interrupt Mask set bits for IRQ1 */
250 /* IRQ1 */
941 static void adf7242_debug(struct adf7242_local *lp, u8 irq1) in adf7242_debug() argument
948 dev_dbg(&lp->spi->dev, "%s IRQ1 = %X:\n%s%s%s%s%s%s%s%s\n", in adf7242_debug()
949 __func__, irq1, in adf7242_debug()
950 irq1 & IRQ_CCA_COMPLETE ? "IRQ_CCA_COMPLETE\n" : "", in adf7242_debug()
951 irq1 & IRQ_SFD_RX ? "IRQ_SFD_RX\n" : "", in adf7242_debug()
952 irq1 & IRQ_SFD_TX ? "IRQ_SFD_TX\n" : "", in adf7242_debug()
953 irq1 & IRQ_RX_PKT_RCVD ? "IRQ_RX_PKT_RCVD\n" : "", in adf7242_debug()
[all …]
/linux/arch/sh/kernel/cpu/sh3/
H A Dsetup-sh3.c19 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, enumerator
23 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
32 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
38 { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
42 { 0xa4000010, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
/linux/arch/sh/include/mach-se/mach/
H A Dse7722.h82 #define SE7722_FPGA_IRQ_MRSHPC0 2 /* IRQ1 */
83 #define SE7722_FPGA_IRQ_MRSHPC1 3 /* IRQ1 */
84 #define SE7722_FPGA_IRQ_MRSHPC2 4 /* IRQ1 */
85 #define SE7722_FPGA_IRQ_MRSHPC3 5 /* IRQ1 */
/linux/drivers/gpu/drm/v3d/
H A Dv3d_irq.c231 int irq1, ret, core; in v3d_irq_init() local
242 irq1 = platform_get_irq_optional(v3d_to_pdev(v3d), 1); in v3d_irq_init()
243 if (irq1 == -EPROBE_DEFER) in v3d_irq_init()
244 return irq1; in v3d_irq_init()
245 if (irq1 > 0) { in v3d_irq_init()
246 ret = devm_request_irq(v3d->drm.dev, irq1, in v3d_irq_init()
/linux/drivers/mfd/
H A Dcs47l15-tables.c662 { 0x00001840, 0xffff }, /* R6208 (0x1840) - IRQ1 Mask 1 */
663 { 0x00001841, 0xffff }, /* R6209 (0x1841) - IRQ1 Mask 2 */
664 { 0x00001842, 0xffff }, /* R6210 (0x1842) - IRQ1 Mask 3 */
665 { 0x00001843, 0xffff }, /* R6211 (0x1843) - IRQ1 Mask 4 */
666 { 0x00001844, 0xffff }, /* R6212 (0x1844) - IRQ1 Mask 5 */
667 { 0x00001845, 0xffff }, /* R6213 (0x1845) - IRQ1 Mask 6 */
668 { 0x00001846, 0xffff }, /* R6214 (0x1846) - IRQ1 Mask 7 */
669 { 0x00001847, 0xffff }, /* R6215 (0x1847) - IRQ1 Mask 8 */
670 { 0x00001848, 0xffff }, /* R6216 (0x1848) - IRQ1 Mask 9 */
671 { 0x00001849, 0xffff }, /* R6217 (0x1849) - IRQ1 Mask 10 */
[all …]
H A Dcs47l35-tables.c747 { 0x00001840, 0xffff }, /* R6208 (0x1840) - IRQ1 Mask 1 */
748 { 0x00001841, 0xffff }, /* R6209 (0x1841) - IRQ1 Mask 2 */
749 { 0x00001842, 0xffff }, /* R6210 (0x1842) - IRQ1 Mask 3 */
750 { 0x00001843, 0xffff }, /* R6211 (0x1843) - IRQ1 Mask 4 */
751 { 0x00001844, 0xffff }, /* R6212 (0x1844) - IRQ1 Mask 5 */
752 { 0x00001845, 0xffff }, /* R6213 (0x1845) - IRQ1 Mask 6 */
753 { 0x00001846, 0xffff }, /* R6214 (0x1846) - IRQ1 Mask 7 */
754 { 0x00001847, 0xffff }, /* R6215 (0x1847) - IRQ1 Mask 8 */
755 { 0x00001848, 0xffff }, /* R6216 (0x1848) - IRQ1 Mask 9 */
756 { 0x00001849, 0xffff }, /* R6217 (0x1849) - IRQ1 Mask 10 */
[all …]
H A Dcs47l92-tables.c1033 { 0x00001840, 0x1200 }, /* R6208 (0x1840) - IRQ1 Mask 1 */
1034 { 0x00001841, 0x77e0 }, /* R6209 (0x1841) - IRQ1 Mask 2 */
1035 { 0x00001842, 0xffff }, /* R6210 (0x1842) - IRQ1 Mask 3 */
1036 { 0x00001843, 0xffff }, /* R6211 (0x1843) - IRQ1 Mask 4 */
1037 { 0x00001844, 0xffff }, /* R6212 (0x1844) - IRQ1 Mask 5 */
1038 { 0x00001845, 0x0301 }, /* R6213 (0x1845) - IRQ1 Mask 6 */
1039 { 0x00001846, 0x0f3f }, /* R6214 (0x1846) - IRQ1 Mask 7 */
1040 { 0x00001847, 0xffff }, /* R6215 (0x1847) - IRQ1 Mask 8 */
1041 { 0x00001848, 0x031f }, /* R6216 (0x1848) - IRQ1 Mask 9 */
1042 { 0x00001849, 0x031f }, /* R6217 (0x1849) - IRQ1 Mask 10 */
[all …]
H A Dcs47l90-tables.c1357 { 0x00001840, 0xffff }, /* R6208 (0x1840) - IRQ1 Mask 1 */
1358 { 0x00001841, 0xffff }, /* R6209 (0x1841) - IRQ1 Mask 2 */
1359 { 0x00001842, 0xffff }, /* R6210 (0x1842) - IRQ1 Mask 3 */
1360 { 0x00001843, 0xffff }, /* R6211 (0x1843) - IRQ1 Mask 4 */
1361 { 0x00001844, 0xffff }, /* R6212 (0x1844) - IRQ1 Mask 5 */
1362 { 0x00001845, 0xffff }, /* R6213 (0x1845) - IRQ1 Mask 6 */
1363 { 0x00001846, 0xffff }, /* R6214 (0x1846) - IRQ1 Mask 7 */
1364 { 0x00001847, 0xffff }, /* R6215 (0x1847) - IRQ1 Mask 8 */
1365 { 0x00001848, 0xffff }, /* R6216 (0x1848) - IRQ1 Mask 9 */
1366 { 0x00001849, 0xffff }, /* R6217 (0x1849) - IRQ1 Mask 10 */
[all …]
/linux/drivers/gpio/
H A Dgpio-pxa.c85 int irq1; member
468 } else if (in_irq == pchip->irq1) { in pxa_gpio_direct_handler()
616 int irq0 = 0, irq1 = 0, irq_mux; in pxa_gpio_probe() local
646 irq1 = platform_get_irq_byname_optional(pdev, "gpio1"); in pxa_gpio_probe()
648 if ((irq0 > 0 && irq1 <= 0) || (irq0 <= 0 && irq1 > 0) in pxa_gpio_probe()
653 pchip->irq1 = irq1; in pxa_gpio_probe()
689 if (irq1 > 0) { in pxa_gpio_probe()
691 irq1, pxa_gpio_direct_handler, 0, in pxa_gpio_probe()
/linux/drivers/spi/
H A Dspi-mpc52xx.c69 int irq1; /* SPIF irq */ member
441 ms->irq1 = irq_of_parse_and_map(op->dev.of_node, 1); in mpc52xx_spi_probe()
475 if (ms->irq0 && ms->irq1) { in mpc52xx_spi_probe()
478 rc |= request_irq(ms->irq1, mpc52xx_spi_irq, 0, in mpc52xx_spi_probe()
482 free_irq(ms->irq1, ms); in mpc52xx_spi_probe()
483 ms->irq0 = ms->irq1 = 0; in mpc52xx_spi_probe()
487 ms->irq0 = ms->irq1 = 0; in mpc52xx_spi_probe()
525 free_irq(ms->irq1, ms); in mpc52xx_spi_remove()
/linux/arch/sh/kernel/cpu/sh4a/
H A Dsetup-sh7366.c254 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator
275 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
342 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
359 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
364 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
369 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
H A Dsetup-sh7343.c310 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator
333 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
405 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
420 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
425 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
430 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
H A Dsetup-sh7763.c239 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator
339 INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280),
347 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
351 { 0xffd00010, 0, 32, 4, /* INTPRI */ { IRQ0, IRQ1, IRQ2, IRQ3,
356 { 0xffd0001c, 32, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3,
362 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
H A Dsetup-sh7780.c303 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator
383 INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280),
391 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
395 { 0xffd00010, 0, 32, 4, /* INTPRI */ { IRQ0, IRQ1, IRQ2, IRQ3,
400 { 0xffd0001c, 32, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3,
406 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
H A Dsetup-sh7734.c299 IRQ0, IRQ1, IRQ2, IRQ3, enumerator
532 INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280),
538 { IRQ0, IRQ1, IRQ2, IRQ3, } },
543 { IRQ0, IRQ1, IRQ2, IRQ3, } },
548 { IRQ0, IRQ1, IRQ2, IRQ3, } },
553 { IRQ0, IRQ1, IRQ2, IRQ3, } },
H A Dsetup-shx3.c168 IRQ0, IRQ1, IRQ2, IRQ3, enumerator
262 { IRQ0, IRQ1, IRQ2, IRQ3 } },
289 { 0xfe410010, 0, 32, 4, /* INTPRI */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
314 INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280),
319 { 0xfe41001c, 32, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
H A Dsetup-sh7723.c437 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator
474 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
606 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
623 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
628 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
633 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
H A Dsetup-sh7785.c376 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator
440 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
460 { 0xffd00010, 0, 32, 4, /* INTPRI */ { IRQ0, IRQ1, IRQ2, IRQ3,
484 INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280),
494 { 0xffd0001c, 32, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3,
500 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
H A Dsetup-sh7722.c526 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator
548 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
619 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
636 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
641 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
646 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
H A Dsetup-sh7770.c333 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, enumerator
456 INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280),
463 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, } },
467 { 0xffd00010, 0, 32, 4, /* INTPRI */ { IRQ0, IRQ1, IRQ2, IRQ3,
472 { 0xffd0001c, 32, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3,
/linux/arch/sh/kernel/cpu/sh2/
H A Dsetup-sh7619.c21 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator
30 INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65),
49 { 0xf8140006, 0, 16, 4, /* IPRA */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
/linux/drivers/power/supply/
H A Drt9455_charger.c52 #define RT9455_REG_IRQ1 0x08 /* IRQ1 reg address */
77 F_TSDI, F_VINOVPI, F_BATAB, /* IRQ1 reg fields */
416 dev_err(dev, "Failed to read IRQ1 register\n"); in rt9455_charger_get_health()
855 unsigned int irq1, mask1, mask2; in rt9455_irq_handler_check_irq1_register() local
861 ret = regmap_read(info->regmap, RT9455_REG_IRQ1, &irq1); in rt9455_irq_handler_check_irq1_register()
863 dev_err(dev, "Failed to read IRQ1 register\n"); in rt9455_irq_handler_check_irq1_register()
873 if (irq1 & GET_MASK(F_TSDI)) { in rt9455_irq_handler_check_irq1_register()
878 if (irq1 & GET_MASK(F_VINOVPI)) { in rt9455_irq_handler_check_irq1_register()
883 if (irq1 & GET_MASK(F_BATAB)) { in rt9455_irq_handler_check_irq1_register()
1145 * case: interrupt occurs only in IRQ1 register, in rt9455_irq_handler_thread()
[all …]
/linux/arch/sh/kernel/cpu/sh2a/
H A Dsetup-mxg.c18 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator
34 INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65),
86 { 0xfffd9418, 0, 16, 4, /* IPR01 */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
/linux/Documentation/devicetree/bindings/net/
H A Dairoha,en7581-eth.yaml36 - description: QDMA lan irq1
40 - description: QDMA wan irq1
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Drenesas,rzg2l-irqc.yaml54 - description: IRQ1 interrupt
106 - const: irq1
264 "irq0", "irq1", "irq2", "irq3",

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