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/linux/arch/sh/kernel/cpu/sh3/
H A Dsetup-sh3.c13 /* All SH3 devices are equipped with IRQ0->5 (except sh7708) */
19 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, enumerator
23 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
32 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
38 { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
42 { 0xa4000010, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
H A Dsetup-sh7710.c22 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, enumerator
32 /* IRQ0->5 are handled in setup-sh3.c */
60 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
H A Dsetup-sh7705.c23 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, enumerator
35 /* IRQ0->5 are handled in setup-sh3.c */
58 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
H A Dsetup-sh770x.c27 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, enumerator
48 /* IRQ0->5 are handled in setup-sh3.c */
73 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
H A Dsetup-sh7720.c225 IRQ0, IRQ1, IRQ2, IRQ3, enumerator
237 /* IRQ0->5 are handled in setup-sh3.c */
269 { 0xA4140016UL, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
/linux/arch/sh/boards/
H A Dboard-shmin.c21 __raw_writew(0x2a00, PFC_PHCR); // IRQ0-3=IRQ in init_shmin_irq()
22 __raw_writew(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active. in init_shmin_irq()
/linux/arch/sh/kernel/cpu/sh4a/
H A Dsetup-sh7366.c254 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator
275 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
342 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
359 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
364 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
369 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
H A Dsetup-sh7343.c310 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator
333 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
405 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
420 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
425 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
430 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
H A Dsetup-sh7763.c239 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator
339 INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280),
347 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
351 { 0xffd00010, 0, 32, 4, /* INTPRI */ { IRQ0, IRQ1, IRQ2, IRQ3,
356 { 0xffd0001c, 32, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3,
362 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
H A Dsetup-sh7780.c303 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator
383 INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280),
391 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
395 { 0xffd00010, 0, 32, 4, /* INTPRI */ { IRQ0, IRQ1, IRQ2, IRQ3,
400 { 0xffd0001c, 32, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3,
406 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
H A Dsetup-sh7734.c299 IRQ0, IRQ1, IRQ2, IRQ3, enumerator
532 INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280),
538 { IRQ0, IRQ1, IRQ2, IRQ3, } },
543 { IRQ0, IRQ1, IRQ2, IRQ3, } },
548 { IRQ0, IRQ1, IRQ2, IRQ3, } },
553 { IRQ0, IRQ1, IRQ2, IRQ3, } },
H A Dsetup-sh7723.c437 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator
474 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
606 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
623 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
628 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
633 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
H A Dsetup-sh7785.c376 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator
440 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
460 { 0xffd00010, 0, 32, 4, /* INTPRI */ { IRQ0, IRQ1, IRQ2, IRQ3,
484 INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280),
494 { 0xffd0001c, 32, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3,
500 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
H A Dsetup-sh7722.c526 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator
548 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
619 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
636 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
641 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
646 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
H A Dsetup-sh7770.c333 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, enumerator
456 INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280),
463 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, } },
467 { 0xffd00010, 0, 32, 4, /* INTPRI */ { IRQ0, IRQ1, IRQ2, IRQ3,
472 { 0xffd0001c, 32, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3,
H A Dsetup-sh7786.c459 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator
559 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 },
602 { 0xfe410010, 0, 32, 4, /* INTPRI */ { IRQ0, IRQ1, IRQ2, IRQ3,
667 INTC_VECT(IRQ0, 0x200), INTC_VECT(IRQ1, 0x240),
677 { 0xfe41001c, 32, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3,
683 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
/linux/arch/mips/pci/
H A Dmsi-octeon.c201 int irq0; in arch_teardown_msi_irq() local
210 irq0 = irq % 64; in arch_teardown_msi_irq()
218 while ((irq0 + number_irqs < 64) && in arch_teardown_msi_irq()
220 & (1ull << (irq0 + number_irqs)))) in arch_teardown_msi_irq()
226 bitmask <<= irq0; in arch_teardown_msi_irq()
/linux/arch/sh/kernel/cpu/sh2/
H A Dsetup-sh7619.c21 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator
30 INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65),
49 { 0xf8140006, 0, 16, 4, /* IPRA */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
/linux/arch/sh/kernel/cpu/sh2a/
H A Dsetup-mxg.c18 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator
34 INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65),
86 { 0xfffd9418, 0, 16, 4, /* IPR01 */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
H A Dsetup-sh7206.c20 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator
43 INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65),
107 { 0xfffe0818, 0, 16, 4, /* IPR01 */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
/linux/arch/alpha/kernel/
H A Dsys_eiger.c84 * us whether an interrupt has come in on IRQ0 or IRQ1. If in eiger_device_interrupt()
85 * it's IRQ1 it's a PCI interrupt; if it's IRQ0, it's in eiger_device_interrupt()
86 * probably ISA, but PCI interrupts can come through IRQ0 in eiger_device_interrupt()
/linux/arch/sh/include/mach-se/mach/
H A Dse7722.h80 #define SE7722_FPGA_IRQ_USB 0 /* IRQ0 */
81 #define SE7722_FPGA_IRQ_SMC 1 /* IRQ0 */
/linux/arch/sh/include/mach-common/mach/
H A Dsdk7780.h40 #define FPGA_IRQ0SR (PA_FPGA + 0x010) /* IRQ0 status */
41 #define FPGA_IRQ0MR (PA_FPGA + 0x020) /* IRQ0 mask */
/linux/arch/x86/pci/
H A Dintel_mid.c249 /* Special treatment for IRQ0 */ in intel_mid_pci_irq_enable()
253 * IRQ0 assigned and not used by the kernel. in intel_mid_pci_irq_enable()
258 * TNG has IRQ0 assigned to eMMC controller. But there in intel_mid_pci_irq_enable()
260 * that have IRQ0 assigned. This check ensures that in intel_mid_pci_irq_enable()
/linux/include/dt-bindings/interrupt-controller/
H A Dirqc-rzg2l.h15 /* IRQ0-7 map to SPI1-8 */

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